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From: Aurabindo Pillai <aurabindo.pillai@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Qingqing.Zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	Anson.Jacob@amd.com, Aurabindo.Pillai@amd.com,
	Michael Strauss <michael.strauss@amd.com>,
	Bhawanpreet.Lakha@amd.com,
	Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>,
	bindu.r@amd.com
Subject: [PATCH 10/19] drm/amd/display: Add link rate optimization logs for ILR
Date: Fri, 16 Apr 2021 10:34:08 -0400
Message-ID: <20210416143417.611019-11-aurabindo.pillai@amd.com> (raw)
In-Reply-To: <20210416143417.611019-1-aurabindo.pillai@amd.com>

From: Michael Strauss <michael.strauss@amd.com>

[Why&How]
Add logs to verify ILR optimization behaviour on boot

Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c                 | 1 +
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c         | 9 +++++++--
 .../gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c  | 4 ++++
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 79c652eaddb6..4713f09bcbf1 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1434,6 +1434,7 @@ bool dc_validate_seamless_boot_timing(const struct dc *dc,
 	}
 
 	if (is_edp_ilr_optimization_required(link, crtc_timing)) {
+		DC_LOG_EVENT_LINK_TRAINING("Seamless boot disabled to optimize eDP link rate\n");
 		return false;
 	}
 
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index bbf2865b25c5..3ff3d9e90983 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -4739,8 +4739,10 @@ bool is_edp_ilr_optimization_required(struct dc_link *link, struct dc_crtc_timin
 	core_link_read_dpcd(link, DP_LINK_BW_SET,
 				&link_bw_set, sizeof(link_bw_set));
 
-	if (link_bw_set)
+	if (link_bw_set) {
+		DC_LOG_EVENT_LINK_TRAINING("eDP ILR: Optimization required, VBIOS used link_bw_set\n");
 		return true;
+	}
 
 	// Read DPCD 00115h to find the edp link rate set used
 	core_link_read_dpcd(link, DP_LINK_RATE_SET,
@@ -4755,9 +4757,12 @@ bool is_edp_ilr_optimization_required(struct dc_link *link, struct dc_crtc_timin
 	decide_edp_link_settings(link, &link_setting, req_bw);
 
 	if (link->dpcd_caps.edp_supported_link_rates[link_rate_set] != link_setting.link_rate ||
-			lane_count_set.bits.LANE_COUNT_SET != link_setting.lane_count)
+			lane_count_set.bits.LANE_COUNT_SET != link_setting.lane_count) {
+		DC_LOG_EVENT_LINK_TRAINING("eDP ILR: Optimization required, VBIOS link_rate_set not optimal\n");
 		return true;
+	}
 
+	DC_LOG_EVENT_LINK_TRAINING("eDP ILR: No optimization required, VBIOS set optimal link_rate_set\n");
 	return false;
 }
 
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index dd903b267ca5..5ddeee96bf23 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1695,6 +1695,8 @@ void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context)
 	bool can_apply_edp_fast_boot = false;
 	bool can_apply_seamless_boot = false;
 	bool keep_edp_vdd_on = false;
+	DC_LOGGER_INIT();
+
 
 	get_edp_links_with_sink(dc, edp_links_with_sink, &edp_with_sink_num);
 	get_edp_links(dc, edp_links, &edp_num);
@@ -1717,6 +1719,8 @@ void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context)
 					edp_stream = edp_streams[0];
 					can_apply_edp_fast_boot = !is_edp_ilr_optimization_required(edp_stream->link, &edp_stream->timing);
 					edp_stream->apply_edp_fast_boot_optimization = can_apply_edp_fast_boot;
+					if (can_apply_edp_fast_boot)
+						DC_LOG_EVENT_LINK_TRAINING("eDP fast boot disabled to optimize link rate\n");
 
 					break;
 				}
-- 
2.31.1

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  parent reply index

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-16 14:33 [PATCH 00/19] DC Patches for 2021 April 19 Aurabindo Pillai
2021-04-16 14:33 ` [PATCH 01/19] drm/amd/display: fixed divide by zero kernel crash during dsc enablement Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 02/19] drm/amd/display: Add DSC check to seamless boot validation Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 03/19] drm/amd/display: update hdcp display using correct CP type Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 04/19] drm/amd/display: add handling for hdcp2 rx id list validation Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 05/19] drm/amd/display: disable seamless boot for external DP Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 06/19] drm/amd/display: removed unused function dc_link_reallocate_mst_payload Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 07/19] drm/amd/display: treat memory as a single-channel for asymmetric memory v2 Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 08/19] drm/amd/display: Fix FreeSync when RGB MPO in use Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 09/19] drm/amd/display: Unconditionally clear training pattern set after lt Aurabindo Pillai
2021-04-16 14:34 ` Aurabindo Pillai [this message]
2021-04-16 14:34 ` [PATCH 11/19] drm/amd/display: Always poll for rxstatus in authenticate Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 12/19] drm/amd/display: Fixed typo in function name Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 13/19] drm/amd/display: force CP to DESIRED when removing display Aurabindo Pillai
2021-04-19 15:42   ` Pillai, Aurabindo
2021-04-16 14:34 ` [PATCH 14/19] drm/amd/display: fix HDCP drm prop update for MST Aurabindo Pillai
2021-04-19 15:42   ` Pillai, Aurabindo
2021-04-16 14:34 ` [PATCH 15/19] drm/amd/display: Fix call to pass bpp in 16ths of a bit Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 16/19] drm/amd/display: Report Proper Quantization Range in AVI Infoframe Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 17/19] drm/amd/display: add helper for enabling mst stream features Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 18/19] drm/amd/display: [FW Promotion] Release 0.0.62 Aurabindo Pillai
2021-04-16 14:34 ` [PATCH 19/19] drm/amd/display: 3.2.132 Aurabindo Pillai
2021-04-19 15:45 ` [PATCH 00/19] DC Patches for 2021 April 19 Wheeler, Daniel

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