From: Darren Powell <darren.powell@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Darren Powell <darren.powell@amd.com>
Subject: [PATCH 3/3] amdgpu/pm: set pp_dpm_dcefclk to readonly on smu_v11 gpus
Date: Fri, 16 Apr 2021 18:29:56 -0400 [thread overview]
Message-ID: <20210416222956.4580-4-darren.powell@amd.com> (raw)
In-Reply-To: <20210416222956.4580-1-darren.powell@amd.com>
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch prevents user from successfully writing to file pp_dpm_dcefclk on smu_vv11
parts and gives better user feedback that this operation is not allowed.
Signed-off-by: Darren Powell <darren.powell@amd.com>
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 204e34549013..317e9b47db53 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -1891,6 +1891,19 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
}
}
+ if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) {
+ /* SMU MP1 does not support dcefclk level setting */
+ if (asic_type == CHIP_NAVI10 ||
+ asic_type == CHIP_NAVI14 ||
+ asic_type == CHIP_NAVI12 ||
+ asic_type == CHIP_SIENNA_CICHLID ||
+ asic_type == CHIP_NAVY_FLOUNDER ||
+ asic_type == CHIP_DIMGREY_CAVEFISH ) {
+ dev_attr->attr.mode &= ~S_IWUGO;
+ dev_attr->store = NULL;
+ }
+ }
+
#undef DEVICE_ATTR_IS
return 0;
--
2.25.1
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next prev parent reply other threads:[~2021-04-16 22:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 22:29 [PATCH 0/3] Prevent set of DCEFCLK on smu_v11 gpus Darren Powell
2021-04-16 22:29 ` [PATCH 1/3] amdgpu/pm: add extra info to SMU msg pre-check failed message Darren Powell
2021-04-16 22:29 ` [PATCH 2/3] amdgpu/pm: Prevent force of DCEFCLK on NAVI10 and SIENNA_CICHLID Darren Powell
2021-04-16 22:29 ` Darren Powell [this message]
2021-04-19 0:47 ` [PATCH 3/3] amdgpu/pm: set pp_dpm_dcefclk to readonly on smu_v11 gpus Feng, Kenneth
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