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* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-19  6:26 Roy Sun
  2021-04-19  6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun
  0 siblings, 1 reply; 32+ messages in thread
From: Roy Sun @ 2021-04-19  6:26 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
  2021-04-19  6:26 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun
@ 2021-04-19  6:26 ` Roy Sun
  2021-04-20  8:53   ` Sun, Roy
  2021-04-20  9:57   ` Christian König
  0 siblings, 2 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-19  6:26 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Tracking devices, process info and fence info using
/proc/pid/fdinfo

Signed-off-by: David M Nieto <David.Nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/Makefile        |  2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c    | 61 ++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h    |  5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c    |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     | 24 ++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h     |  4 +
 10 files changed, 239 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
 	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
 	amdgpu_fw_attestation.o amdgpu_securedisplay.o
 
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
 amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
 
 # add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
 #include "amdgpu_gfxhub.h"
 #include "amdgpu_df.h"
 #include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
 
 #define MAX_GPU_INSTANCE		16
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
 	idr_destroy(&mgr->ctx_handles);
 	mutex_destroy(&mgr->lock);
 }
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
+		ktime_t *total, ktime_t *max)
+{
+	ktime_t now, t1;
+	uint32_t i;
+
+	now = ktime_get();
+	for (i = 0; i < amdgpu_sched_jobs; i++) {
+		struct dma_fence *fence;
+		struct drm_sched_fence *s_fence;
+
+		spin_lock(&ctx->ring_lock);
+		fence = dma_fence_get(centity->fences[i]);
+		spin_unlock(&ctx->ring_lock);
+		if (!fence)
+			continue;
+		s_fence = to_drm_sched_fence(fence);
+		if (!dma_fence_is_signaled(&s_fence->scheduled))
+			continue;
+		t1 = s_fence->scheduled.timestamp;
+		if (t1 >= now)
+			continue;
+		if (dma_fence_is_signaled(&s_fence->finished) &&
+			s_fence->finished.timestamp < now)
+			*total += ktime_sub(s_fence->finished.timestamp, t1);
+		else
+			*total += ktime_sub(now, t1);
+		t1 = ktime_sub(now, t1);
+		dma_fence_put(fence);
+		*max = max(t1, *max);
+	}
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+		uint32_t idx, uint64_t *elapsed)
+{
+	struct idr *idp;
+	struct amdgpu_ctx *ctx;
+	uint32_t id;
+	struct amdgpu_ctx_entity *centity;
+	ktime_t total = 0, max = 0;
+
+	if (idx >= AMDGPU_MAX_ENTITY_NUM)
+		return 0;
+	idp = &mgr->ctx_handles;
+	mutex_lock(&mgr->lock);
+	idr_for_each_entry(idp, ctx, id) {
+		if (!ctx->entities[hwip][idx])
+			continue;
+
+		centity = ctx->entities[hwip][idx];
+		amdgpu_ctx_fence_time(ctx, centity, &total, &max);
+	}
+
+	mutex_unlock(&mgr->lock);
+	if (elapsed)
+		*elapsed = max;
+
+	return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
 void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
 long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
 void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+		uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
+		ktime_t *total, ktime_t *max);
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0369d3532bf0..01603378dbc9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -42,7 +42,7 @@
 #include "amdgpu_irq.h"
 #include "amdgpu_dma_buf.h"
 #include "amdgpu_sched.h"
-
+#include "amdgpu_fdinfo.h"
 #include "amdgpu_amdkfd.h"
 
 #include "amdgpu_ras.h"
@@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = {
 #ifdef CONFIG_COMPAT
 	.compat_ioctl = amdgpu_kms_compat_ioctl,
 #endif
+#ifdef CONFIG_PROC_FS
+	.show_fdinfo = amdgpu_show_fdinfo
+#endif
 };
 
 int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
new file mode 100644
index 000000000000..781a06101c22
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: MIT
+/* Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: David Nieto
+ *          Roy Sun
+ */
+
+#include <linux/debugfs.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/uaccess.h>
+#include <linux/reboot.h>
+#include <linux/syscalls.h>
+
+#include <drm/amdgpu_drm.h>
+#include <drm/drm_debugfs.h>
+
+#include "amdgpu.h"
+#include "amdgpu_vm.h"
+#include "amdgpu_gem.h"
+#include "amdgpu_ctx.h"
+#include "amdgpu_fdinfo.h"
+
+
+static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
+	[AMDGPU_HW_IP_GFX]	=	"gfx",
+	[AMDGPU_HW_IP_COMPUTE]	=	"compute",
+	[AMDGPU_HW_IP_DMA]	=	"dma",
+	[AMDGPU_HW_IP_UVD]	=	"dec",
+	[AMDGPU_HW_IP_VCE]	=	"enc",
+	[AMDGPU_HW_IP_UVD_ENC]	=	"enc_1",
+	[AMDGPU_HW_IP_VCN_DEC]	=	"dec",
+	[AMDGPU_HW_IP_VCN_ENC]	=	"enc",
+	[AMDGPU_HW_IP_VCN_JPEG]	=	"jpeg",
+};
+
+void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
+{
+	struct amdgpu_fpriv *fpriv;
+	uint32_t bus, dev, fn, i;
+	uint64_t vram_mem = 0, gtt_mem = 0;
+	struct drm_file *file = f->private_data;
+	struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
+
+	if (amdgpu_file_to_fpriv(f, &fpriv))
+		return;
+	bus = adev->pdev->bus->number;
+	dev = PCI_SLOT(adev->pdev->devfn);
+	fn = PCI_FUNC(adev->pdev->devfn);
+
+	amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, &gtt_mem);
+	seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn,
+			fpriv->vm.pasid);
+	seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
+	seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL);
+
+	for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
+		uint32_t count = amdgpu_ctx_num_entities[i];
+		int idx = 0;
+		uint64_t total = 0, min = 0;
+		uint32_t perc, frac;
+
+		for (idx = 0; idx < count; idx++) {
+			total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr,
+				i, idx, &min);
+			if ((total == 0) || (min == 0))
+				continue;
+
+			perc = div64_u64(10000 * total, min);
+			frac = perc % 100;
+
+			seq_printf(m, "%s%d:\t%d.%d%%\n",
+					amdgpu_ip_name[i],
+					idx, perc/100, frac);
+		}
+	}
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
new file mode 100644
index 000000000000..41a4c7056729
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: MIT
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: David Nieto
+ *          Roy Sun
+ */
+#ifndef __AMDGPU_SMI_H__
+#define __AMDGPU_SMI_H__
+
+#include <linux/idr.h>
+#include <linux/kfifo.h>
+#include <linux/rbtree.h>
+#include <drm/gpu_scheduler.h>
+#include <drm/drm_file.h>
+#include <drm/ttm/ttm_bo_driver.h>
+#include <linux/sched/mm.h>
+
+#include "amdgpu_sync.h"
+#include "amdgpu_ring.h"
+#include "amdgpu_ids.h"
+
+uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id);
+void amdgpu_show_fdinfo(struct seq_file *m, struct file *f);
+
+#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 39ee88d29cca..b2e774aeab45 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -41,6 +41,7 @@
 #include "amdgpu_gem.h"
 #include "amdgpu_display.h"
 #include "amdgpu_ras.h"
+#include "amdgpu_fdinfo.h"
 
 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev)
 {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index f95bcda8463f..773acb4437f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -25,6 +25,7 @@
  *          Alex Deucher
  *          Jerome Glisse
  */
+
 #include <linux/dma-fence-array.h>
 #include <linux/interval_tree_generic.h>
 #include <linux/idr.h>
@@ -322,6 +323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
 	base->vm = vm;
 	base->bo = bo;
 	base->next = NULL;
+	INIT_LIST_HEAD(&base->bo_head);
 	INIT_LIST_HEAD(&base->vm_status);
 
 	if (!bo)
@@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
 	base->next = bo->vm_bo;
 	bo->vm_bo = base;
 
+	list_add(&base->bo_head, &vm->bo_list);
 	if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv)
 		return;
 
@@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
 
 	spin_lock(&vm->invalidated_lock);
 	list_del(&bo_va->base.vm_status);
+	list_del(&bo_va->base.bo_head);
 	spin_unlock(&vm->invalidated_lock);
 
 	list_for_each_entry_safe(mapping, next, &bo_va->valids, list) {
@@ -2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 	spin_lock_init(&vm->invalidated_lock);
 	INIT_LIST_HEAD(&vm->freed);
 	INIT_LIST_HEAD(&vm->done);
+	INIT_LIST_HEAD(&vm->bo_list);
 
 	/* create scheduler entities for page table updates */
 	r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL,
@@ -3267,6 +3272,25 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid,
 	spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
 }
 
+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
+				uint64_t *gtt_mem)
+{
+	struct amdgpu_vm_bo_base *base = &vm->root.base;
+
+	list_for_each_entry(base, &vm->bo_list, bo_head){
+		struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo);
+		if (!bo)
+			continue;
+		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) ==
+				AMDGPU_GEM_DOMAIN_VRAM)
+				*vram_mem += amdgpu_bo_size(bo);
+		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) ==
+				AMDGPU_GEM_DOMAIN_GTT)
+				*gtt_mem += amdgpu_bo_size(bo);
+		amdgpu_bo_unref(&bo);
+	}
+
+}
 /**
  * amdgpu_vm_set_task_info - Sets VMs task info.
  *
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 848e175e99ff..72727117c479 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base {
 	/* protected by spinlock */
 	struct list_head		vm_status;
 
+	struct list_head		bo_head;
 	/* protected by the BO being reserved */
 	bool				moved;
 };
@@ -274,6 +275,7 @@ struct amdgpu_vm {
 	struct list_head	invalidated;
 	spinlock_t		invalidated_lock;
 
+	struct list_head	bo_list;
 	/* BO mappings freed, but not yet updated in the PT */
 	struct list_head	freed;
 
@@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
 				struct amdgpu_vm *vm);
 void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo);
 
+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
+				uint64_t *gtt_mem);
 #if defined(CONFIG_DEBUG_FS)
 void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m);
 #endif
-- 
2.31.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* RE: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
  2021-04-19  6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun
@ 2021-04-20  8:53   ` Sun, Roy
  2021-04-20  9:32     ` Deng, Emily
  2021-04-20  9:57   ` Christian König
  1 sibling, 1 reply; 32+ messages in thread
From: Sun, Roy @ 2021-04-20  8:53 UTC (permalink / raw)
  To: Sun, Roy, amd-gfx; +Cc: Nieto, David M

[AMD Official Use Only - Internal Distribution Only]

Ping.
Could you help review this patch again?

BR
Roy

-----Original Message-----
From: Roy Sun <Roy.Sun@amd.com> 
Sent: Monday, April 19, 2021 2:26 PM
To: amd-gfx@lists.freedesktop.org
Cc: Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
Subject: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface

Tracking devices, process info and fence info using /proc/pid/fdinfo

Signed-off-by: David M Nieto <David.Nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/Makefile        |  2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c    | 61 ++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h    |  5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++++++++++++++++++++++  drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c    |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     | 24 ++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h     |  4 +
 10 files changed, 239 insertions(+), 2 deletions(-)  create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index ee85e8aba636..d216b7ecb5d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
 	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
 	amdgpu_fw_attestation.o amdgpu_securedisplay.o
 
+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
+
 amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
 
 # add asic specific block
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 125b25a5ce5b..3365feae15e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -107,6 +107,7 @@
 #include "amdgpu_gfxhub.h"
 #include "amdgpu_df.h"
 #include "amdgpu_smuio.h"
+#include "amdgpu_fdinfo.h"
 
 #define MAX_GPU_INSTANCE		16
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 0350205c4897..01fe60fedcbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
 	idr_destroy(&mgr->ctx_handles);
 	mutex_destroy(&mgr->lock);
 }
+
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
+		ktime_t *total, ktime_t *max)
+{
+	ktime_t now, t1;
+	uint32_t i;
+
+	now = ktime_get();
+	for (i = 0; i < amdgpu_sched_jobs; i++) {
+		struct dma_fence *fence;
+		struct drm_sched_fence *s_fence;
+
+		spin_lock(&ctx->ring_lock);
+		fence = dma_fence_get(centity->fences[i]);
+		spin_unlock(&ctx->ring_lock);
+		if (!fence)
+			continue;
+		s_fence = to_drm_sched_fence(fence);
+		if (!dma_fence_is_signaled(&s_fence->scheduled))
+			continue;
+		t1 = s_fence->scheduled.timestamp;
+		if (t1 >= now)
+			continue;
+		if (dma_fence_is_signaled(&s_fence->finished) &&
+			s_fence->finished.timestamp < now)
+			*total += ktime_sub(s_fence->finished.timestamp, t1);
+		else
+			*total += ktime_sub(now, t1);
+		t1 = ktime_sub(now, t1);
+		dma_fence_put(fence);
+		*max = max(t1, *max);
+	}
+}
+
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+		uint32_t idx, uint64_t *elapsed)
+{
+	struct idr *idp;
+	struct amdgpu_ctx *ctx;
+	uint32_t id;
+	struct amdgpu_ctx_entity *centity;
+	ktime_t total = 0, max = 0;
+
+	if (idx >= AMDGPU_MAX_ENTITY_NUM)
+		return 0;
+	idp = &mgr->ctx_handles;
+	mutex_lock(&mgr->lock);
+	idr_for_each_entry(idp, ctx, id) {
+		if (!ctx->entities[hwip][idx])
+			continue;
+
+		centity = ctx->entities[hwip][idx];
+		amdgpu_ctx_fence_time(ctx, centity, &total, &max);
+	}
+
+	mutex_unlock(&mgr->lock);
+	if (elapsed)
+		*elapsed = max;
+
+	return total;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
index f54e10314661..10dcf59a5c6b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);  void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);  long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);  void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
-
+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
+		uint32_t idx, uint64_t *elapsed);
+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
+		ktime_t *total, ktime_t *max);
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0369d3532bf0..01603378dbc9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -42,7 +42,7 @@
 #include "amdgpu_irq.h"
 #include "amdgpu_dma_buf.h"
 #include "amdgpu_sched.h"
-
+#include "amdgpu_fdinfo.h"
 #include "amdgpu_amdkfd.h"
 
 #include "amdgpu_ras.h"
@@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = {  #ifdef CONFIG_COMPAT
 	.compat_ioctl = amdgpu_kms_compat_ioctl,  #endif
+#ifdef CONFIG_PROC_FS
+	.show_fdinfo = amdgpu_show_fdinfo
+#endif
 };
 
 int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
new file mode 100644
index 000000000000..781a06101c22
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: MIT
+/* Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person 
+obtaining a
+ * copy of this software and associated documentation files (the 
+"Software"),
+ * to deal in the Software without restriction, including without 
+limitation
+ * the rights to use, copy, modify, merge, publish, distribute, 
+sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom 
+the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be 
+included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
+EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
+MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT 
+SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, 
+DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
+OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE 
+OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: David Nieto
+ *          Roy Sun
+ */
+
+#include <linux/debugfs.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/uaccess.h>
+#include <linux/reboot.h>
+#include <linux/syscalls.h>
+
+#include <drm/amdgpu_drm.h>
+#include <drm/drm_debugfs.h>
+
+#include "amdgpu.h"
+#include "amdgpu_vm.h"
+#include "amdgpu_gem.h"
+#include "amdgpu_ctx.h"
+#include "amdgpu_fdinfo.h"
+
+
+static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
+	[AMDGPU_HW_IP_GFX]	=	"gfx",
+	[AMDGPU_HW_IP_COMPUTE]	=	"compute",
+	[AMDGPU_HW_IP_DMA]	=	"dma",
+	[AMDGPU_HW_IP_UVD]	=	"dec",
+	[AMDGPU_HW_IP_VCE]	=	"enc",
+	[AMDGPU_HW_IP_UVD_ENC]	=	"enc_1",
+	[AMDGPU_HW_IP_VCN_DEC]	=	"dec",
+	[AMDGPU_HW_IP_VCN_ENC]	=	"enc",
+	[AMDGPU_HW_IP_VCN_JPEG]	=	"jpeg",
+};
+
+void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) {
+	struct amdgpu_fpriv *fpriv;
+	uint32_t bus, dev, fn, i;
+	uint64_t vram_mem = 0, gtt_mem = 0;
+	struct drm_file *file = f->private_data;
+	struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
+
+	if (amdgpu_file_to_fpriv(f, &fpriv))
+		return;
+	bus = adev->pdev->bus->number;
+	dev = PCI_SLOT(adev->pdev->devfn);
+	fn = PCI_FUNC(adev->pdev->devfn);
+
+	amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, &gtt_mem);
+	seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn,
+			fpriv->vm.pasid);
+	seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
+	seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL);
+
+	for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
+		uint32_t count = amdgpu_ctx_num_entities[i];
+		int idx = 0;
+		uint64_t total = 0, min = 0;
+		uint32_t perc, frac;
+
+		for (idx = 0; idx < count; idx++) {
+			total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr,
+				i, idx, &min);
+			if ((total == 0) || (min == 0))
+				continue;
+
+			perc = div64_u64(10000 * total, min);
+			frac = perc % 100;
+
+			seq_printf(m, "%s%d:\t%d.%d%%\n",
+					amdgpu_ip_name[i],
+					idx, perc/100, frac);
+		}
+	}
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
new file mode 100644
index 000000000000..41a4c7056729
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: MIT
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person 
+obtaining a
+ * copy of this software and associated documentation files (the 
+"Software"),
+ * to deal in the Software without restriction, including without 
+limitation
+ * the rights to use, copy, modify, merge, publish, distribute, 
+sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom 
+the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be 
+included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
+EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
+MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT 
+SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, 
+DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
+OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE 
+OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: David Nieto
+ *          Roy Sun
+ */
+#ifndef __AMDGPU_SMI_H__
+#define __AMDGPU_SMI_H__
+
+#include <linux/idr.h>
+#include <linux/kfifo.h>
+#include <linux/rbtree.h>
+#include <drm/gpu_scheduler.h>
+#include <drm/drm_file.h>
+#include <drm/ttm/ttm_bo_driver.h>
+#include <linux/sched/mm.h>
+
+#include "amdgpu_sync.h"
+#include "amdgpu_ring.h"
+#include "amdgpu_ids.h"
+
+uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); void 
+amdgpu_show_fdinfo(struct seq_file *m, struct file *f);
+
+#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 39ee88d29cca..b2e774aeab45 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -41,6 +41,7 @@
 #include "amdgpu_gem.h"
 #include "amdgpu_display.h"
 #include "amdgpu_ras.h"
+#include "amdgpu_fdinfo.h"
 
 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev)  { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index f95bcda8463f..773acb4437f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -25,6 +25,7 @@
  *          Alex Deucher
  *          Jerome Glisse
  */
+
 #include <linux/dma-fence-array.h>
 #include <linux/interval_tree_generic.h>  #include <linux/idr.h> @@ -322,6 +323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
 	base->vm = vm;
 	base->bo = bo;
 	base->next = NULL;
+	INIT_LIST_HEAD(&base->bo_head);
 	INIT_LIST_HEAD(&base->vm_status);
 
 	if (!bo)
@@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
 	base->next = bo->vm_bo;
 	bo->vm_bo = base;
 
+	list_add(&base->bo_head, &vm->bo_list);
 	if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv)
 		return;
 
@@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
 
 	spin_lock(&vm->invalidated_lock);
 	list_del(&bo_va->base.vm_status);
+	list_del(&bo_va->base.bo_head);
 	spin_unlock(&vm->invalidated_lock);
 
 	list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { @@ -2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 	spin_lock_init(&vm->invalidated_lock);
 	INIT_LIST_HEAD(&vm->freed);
 	INIT_LIST_HEAD(&vm->done);
+	INIT_LIST_HEAD(&vm->bo_list);
 
 	/* create scheduler entities for page table updates */
 	r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL, @@ -3267,6 +3272,25 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid,
 	spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);  }
 
+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
+				uint64_t *gtt_mem)
+{
+	struct amdgpu_vm_bo_base *base = &vm->root.base;
+
+	list_for_each_entry(base, &vm->bo_list, bo_head){
+		struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo);
+		if (!bo)
+			continue;
+		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) ==
+				AMDGPU_GEM_DOMAIN_VRAM)
+				*vram_mem += amdgpu_bo_size(bo);
+		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) ==
+				AMDGPU_GEM_DOMAIN_GTT)
+				*gtt_mem += amdgpu_bo_size(bo);
+		amdgpu_bo_unref(&bo);
+	}
+
+}
 /**
  * amdgpu_vm_set_task_info - Sets VMs task info.
  *
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 848e175e99ff..72727117c479 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base {
 	/* protected by spinlock */
 	struct list_head		vm_status;
 
+	struct list_head		bo_head;
 	/* protected by the BO being reserved */
 	bool				moved;
 };
@@ -274,6 +275,7 @@ struct amdgpu_vm {
 	struct list_head	invalidated;
 	spinlock_t		invalidated_lock;
 
+	struct list_head	bo_list;
 	/* BO mappings freed, but not yet updated in the PT */
 	struct list_head	freed;
 
@@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
 				struct amdgpu_vm *vm);
 void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo);
 
+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
+				uint64_t *gtt_mem);
 #if defined(CONFIG_DEBUG_FS)
 void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m);  #endif
--
2.31.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 32+ messages in thread

* RE: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
  2021-04-20  8:53   ` Sun, Roy
@ 2021-04-20  9:32     ` Deng, Emily
  0 siblings, 0 replies; 32+ messages in thread
From: Deng, Emily @ 2021-04-20  9:32 UTC (permalink / raw)
  To: Sun, Roy, Sun, Roy, amd-gfx, Christian König
  Cc: Wang, Yin, Chang, HaiJun, Kuo, Richard, Nieto, David M


[-- Attachment #1: Type: text/plain, Size: 16495 bytes --]

Hi Christian,
     Could you help to review these patches again, thanks.

Best wishes
Emily Deng
>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Sun, Roy
>Sent: Tuesday, April 20, 2021 4:54 PM
>To: Sun, Roy <Roy.Sun@amd.com>; amd-gfx@lists.freedesktop.org
>Cc: Nieto, David M <David.Nieto@amd.com>
>Subject: RE: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
>
>[AMD Official Use Only - Internal Distribution Only]
>
>Ping.
>Could you help review this patch again?
>
>BR
>Roy
>
>-----Original Message-----
>From: Roy Sun <Roy.Sun@amd.com>
>Sent: Monday, April 19, 2021 2:26 PM
>To: amd-gfx@lists.freedesktop.org
>Cc: Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>Subject: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
>
>Tracking devices, process info and fence info using /proc/pid/fdinfo
>
>Signed-off-by: David M Nieto <David.Nieto@amd.com>
>Signed-off-by: Roy Sun <Roy.Sun@amd.com>
>---
> drivers/gpu/drm/amd/amdgpu/Makefile        |  2 +
> drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c    | 61 ++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h    |  5 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  5 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95
>++++++++++++++++++++++  drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h |
>43 ++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c    |  1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     | 24 ++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h     |  4 +
> 10 files changed, 239 insertions(+), 2 deletions(-)  create mode 100644
>drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
> create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
>b/drivers/gpu/drm/amd/amdgpu/Makefile
>index ee85e8aba636..d216b7ecb5d1 100644
>--- a/drivers/gpu/drm/amd/amdgpu/Makefile
>+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
>@@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
> 	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o
>amdgpu_rap.o \
> 	amdgpu_fw_attestation.o amdgpu_securedisplay.o
>
>+amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
>+
> amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
>
> # add asic specific block
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>index 125b25a5ce5b..3365feae15e1 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>@@ -107,6 +107,7 @@
> #include "amdgpu_gfxhub.h"
> #include "amdgpu_df.h"
> #include "amdgpu_smuio.h"
>+#include "amdgpu_fdinfo.h"
>
> #define MAX_GPU_INSTANCE		16
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>index 0350205c4897..01fe60fedcbe 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>@@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr
>*mgr)
> 	idr_destroy(&mgr->ctx_handles);
> 	mutex_destroy(&mgr->lock);
> }
>+
>+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct
>amdgpu_ctx_entity *centity,
>+		ktime_t *total, ktime_t *max)
>+{
>+	ktime_t now, t1;
>+	uint32_t i;
>+
>+	now = ktime_get();
>+	for (i = 0; i < amdgpu_sched_jobs; i++) {
>+		struct dma_fence *fence;
>+		struct drm_sched_fence *s_fence;
>+
>+		spin_lock(&ctx->ring_lock);
>+		fence = dma_fence_get(centity->fences[i]);
>+		spin_unlock(&ctx->ring_lock);
>+		if (!fence)
>+			continue;
>+		s_fence = to_drm_sched_fence(fence);
>+		if (!dma_fence_is_signaled(&s_fence->scheduled))
>+			continue;
>+		t1 = s_fence->scheduled.timestamp;
>+		if (t1 >= now)
>+			continue;
>+		if (dma_fence_is_signaled(&s_fence->finished) &&
>+			s_fence->finished.timestamp < now)
>+			*total += ktime_sub(s_fence->finished.timestamp, t1);
>+		else
>+			*total += ktime_sub(now, t1);
>+		t1 = ktime_sub(now, t1);
>+		dma_fence_put(fence);
>+		*max = max(t1, *max);
>+	}
>+}
>+
>+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr,
>uint32_t hwip,
>+		uint32_t idx, uint64_t *elapsed)
>+{
>+	struct idr *idp;
>+	struct amdgpu_ctx *ctx;
>+	uint32_t id;
>+	struct amdgpu_ctx_entity *centity;
>+	ktime_t total = 0, max = 0;
>+
>+	if (idx >= AMDGPU_MAX_ENTITY_NUM)
>+		return 0;
>+	idp = &mgr->ctx_handles;
>+	mutex_lock(&mgr->lock);
>+	idr_for_each_entry(idp, ctx, id) {
>+		if (!ctx->entities[hwip][idx])
>+			continue;
>+
>+		centity = ctx->entities[hwip][idx];
>+		amdgpu_ctx_fence_time(ctx, centity, &total, &max);
>+	}
>+
>+	mutex_unlock(&mgr->lock);
>+	if (elapsed)
>+		*elapsed = max;
>+
>+	return total;
>+}
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
>index f54e10314661..10dcf59a5c6b 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
>@@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
>void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);  long
>amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
>void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
>-
>+ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr,
>uint32_t hwip,
>+		uint32_t idx, uint64_t *elapsed);
>+void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct
>amdgpu_ctx_entity *centity,
>+		ktime_t *total, ktime_t *max);
> #endif
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>index 0369d3532bf0..01603378dbc9 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>@@ -42,7 +42,7 @@
> #include "amdgpu_irq.h"
> #include "amdgpu_dma_buf.h"
> #include "amdgpu_sched.h"
>-
>+#include "amdgpu_fdinfo.h"
> #include "amdgpu_amdkfd.h"
>
> #include "amdgpu_ras.h"
>@@ -1692,6 +1692,9 @@ static const struct file_operations
>amdgpu_driver_kms_fops = {  #ifdef CONFIG_COMPAT
> 	.compat_ioctl = amdgpu_kms_compat_ioctl,  #endif
>+#ifdef CONFIG_PROC_FS
>+	.show_fdinfo = amdgpu_show_fdinfo
>+#endif
> };
>
> int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) diff --git
>a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
>new file mode 100644
>index 000000000000..781a06101c22
>--- /dev/null
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
>@@ -0,0 +1,95 @@
>+// SPDX-License-Identifier: MIT
>+/* Copyright 2021 Advanced Micro Devices, Inc.
>+ *
>+ * Permission is hereby granted, free of charge, to any person
>+obtaining a
>+ * copy of this software and associated documentation files (the
>+"Software"),
>+ * to deal in the Software without restriction, including without
>+limitation
>+ * the rights to use, copy, modify, merge, publish, distribute,
>+sublicense,
>+ * and/or sell copies of the Software, and to permit persons to whom
>+the
>+ * Software is furnished to do so, subject to the following conditions:
>+ *
>+ * The above copyright notice and this permission notice shall be
>+included in
>+ * all copies or substantial portions of the Software.
>+ *
>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>+EXPRESS OR
>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>+MERCHANTABILITY,
>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
>EVENT
>+SHALL
>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
>+DAMAGES OR
>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
>+OTHERWISE,
>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
>USE
>+OR
>+ * OTHER DEALINGS IN THE SOFTWARE.
>+ *
>+ * Authors: David Nieto
>+ *          Roy Sun
>+ */
>+
>+#include <linux/debugfs.h>
>+#include <linux/list.h>
>+#include <linux/module.h>
>+#include <linux/uaccess.h>
>+#include <linux/reboot.h>
>+#include <linux/syscalls.h>
>+
>+#include <drm/amdgpu_drm.h>
>+#include <drm/drm_debugfs.h>
>+
>+#include "amdgpu.h"
>+#include "amdgpu_vm.h"
>+#include "amdgpu_gem.h"
>+#include "amdgpu_ctx.h"
>+#include "amdgpu_fdinfo.h"
>+
>+
>+static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
>+	[AMDGPU_HW_IP_GFX]	=	"gfx",
>+	[AMDGPU_HW_IP_COMPUTE]	=	"compute",
>+	[AMDGPU_HW_IP_DMA]	=	"dma",
>+	[AMDGPU_HW_IP_UVD]	=	"dec",
>+	[AMDGPU_HW_IP_VCE]	=	"enc",
>+	[AMDGPU_HW_IP_UVD_ENC]	=	"enc_1",
>+	[AMDGPU_HW_IP_VCN_DEC]	=	"dec",
>+	[AMDGPU_HW_IP_VCN_ENC]	=	"enc",
>+	[AMDGPU_HW_IP_VCN_JPEG]	=	"jpeg",
>+};
>+
>+void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) {
>+	struct amdgpu_fpriv *fpriv;
>+	uint32_t bus, dev, fn, i;
>+	uint64_t vram_mem = 0, gtt_mem = 0;
>+	struct drm_file *file = f->private_data;
>+	struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
>+
>+	if (amdgpu_file_to_fpriv(f, &fpriv))
>+		return;
>+	bus = adev->pdev->bus->number;
>+	dev = PCI_SLOT(adev->pdev->devfn);
>+	fn = PCI_FUNC(adev->pdev->devfn);
>+
>+	amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, &gtt_mem);
>+	seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn,
>+			fpriv->vm.pasid);
>+	seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
>+	seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL);
>+
>+	for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
>+		uint32_t count = amdgpu_ctx_num_entities[i];
>+		int idx = 0;
>+		uint64_t total = 0, min = 0;
>+		uint32_t perc, frac;
>+
>+		for (idx = 0; idx < count; idx++) {
>+			total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr,
>+				i, idx, &min);
>+			if ((total == 0) || (min == 0))
>+				continue;
>+
>+			perc = div64_u64(10000 * total, min);
>+			frac = perc % 100;
>+
>+			seq_printf(m, "%s%d:\t%d.%d%%\n",
>+					amdgpu_ip_name[i],
>+					idx, perc/100, frac);
>+		}
>+	}
>+}
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
>new file mode 100644
>index 000000000000..41a4c7056729
>--- /dev/null
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
>@@ -0,0 +1,43 @@
>+/* SPDX-License-Identifier: MIT
>+ * Copyright 2021 Advanced Micro Devices, Inc.
>+ *
>+ * Permission is hereby granted, free of charge, to any person
>+obtaining a
>+ * copy of this software and associated documentation files (the
>+"Software"),
>+ * to deal in the Software without restriction, including without
>+limitation
>+ * the rights to use, copy, modify, merge, publish, distribute,
>+sublicense,
>+ * and/or sell copies of the Software, and to permit persons to whom
>+the
>+ * Software is furnished to do so, subject to the following conditions:
>+ *
>+ * The above copyright notice and this permission notice shall be
>+included in
>+ * all copies or substantial portions of the Software.
>+ *
>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>+EXPRESS OR
>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>+MERCHANTABILITY,
>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
>EVENT
>+SHALL
>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
>+DAMAGES OR
>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
>+OTHERWISE,
>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
>USE
>+OR
>+ * OTHER DEALINGS IN THE SOFTWARE.
>+ *
>+ * Authors: David Nieto
>+ *          Roy Sun
>+ */
>+#ifndef __AMDGPU_SMI_H__
>+#define __AMDGPU_SMI_H__
>+
>+#include <linux/idr.h>
>+#include <linux/kfifo.h>
>+#include <linux/rbtree.h>
>+#include <drm/gpu_scheduler.h>
>+#include <drm/drm_file.h>
>+#include <drm/ttm/ttm_bo_driver.h>
>+#include <linux/sched/mm.h>
>+
>+#include "amdgpu_sync.h"
>+#include "amdgpu_ring.h"
>+#include "amdgpu_ids.h"
>+
>+uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id); void
>+amdgpu_show_fdinfo(struct seq_file *m, struct file *f);
>+
>+#endif
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>index 39ee88d29cca..b2e774aeab45 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>@@ -41,6 +41,7 @@
> #include "amdgpu_gem.h"
> #include "amdgpu_display.h"
> #include "amdgpu_ras.h"
>+#include "amdgpu_fdinfo.h"
>
> void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev)  { diff --git
>a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>index f95bcda8463f..773acb4437f7 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>@@ -25,6 +25,7 @@
>  *          Alex Deucher
>  *          Jerome Glisse
>  */
>+
> #include <linux/dma-fence-array.h>
> #include <linux/interval_tree_generic.h>  #include <linux/idr.h> @@ -322,6
>+323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base
>*base,
> 	base->vm = vm;
> 	base->bo = bo;
> 	base->next = NULL;
>+	INIT_LIST_HEAD(&base->bo_head);
> 	INIT_LIST_HEAD(&base->vm_status);
>
> 	if (!bo)
>@@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct
>amdgpu_vm_bo_base *base,
> 	base->next = bo->vm_bo;
> 	bo->vm_bo = base;
>
>+	list_add(&base->bo_head, &vm->bo_list);
> 	if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv)
> 		return;
>
>@@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device
>*adev,
>
> 	spin_lock(&vm->invalidated_lock);
> 	list_del(&bo_va->base.vm_status);
>+	list_del(&bo_va->base.bo_head);
> 	spin_unlock(&vm->invalidated_lock);
>
> 	list_for_each_entry_safe(mapping, next, &bo_va->valids, list) { @@ -
>2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct
>amdgpu_vm *vm,
> 	spin_lock_init(&vm->invalidated_lock);
> 	INIT_LIST_HEAD(&vm->freed);
> 	INIT_LIST_HEAD(&vm->done);
>+	INIT_LIST_HEAD(&vm->bo_list);
>
> 	/* create scheduler entities for page table updates */
> 	r = drm_sched_entity_init(&vm->immediate,
>DRM_SCHED_PRIORITY_NORMAL, @@ -3267,6 +3272,25 @@ void
>amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid,
> 	spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);  }
>
>+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
>+				uint64_t *gtt_mem)
>+{
>+	struct amdgpu_vm_bo_base *base = &vm->root.base;
>+
>+	list_for_each_entry(base, &vm->bo_list, bo_head){
>+		struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo);
>+		if (!bo)
>+			continue;
>+		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type)
>==
>+				AMDGPU_GEM_DOMAIN_VRAM)
>+				*vram_mem += amdgpu_bo_size(bo);
>+		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type)
>==
>+				AMDGPU_GEM_DOMAIN_GTT)
>+				*gtt_mem += amdgpu_bo_size(bo);
>+		amdgpu_bo_unref(&bo);
>+	}
>+
>+}
> /**
>  * amdgpu_vm_set_task_info - Sets VMs task info.
>  *
>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>index 848e175e99ff..72727117c479 100644
>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
>@@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base {
> 	/* protected by spinlock */
> 	struct list_head		vm_status;
>
>+	struct list_head		bo_head;
> 	/* protected by the BO being reserved */
> 	bool				moved;
> };
>@@ -274,6 +275,7 @@ struct amdgpu_vm {
> 	struct list_head	invalidated;
> 	spinlock_t		invalidated_lock;
>
>+	struct list_head	bo_list;
> 	/* BO mappings freed, but not yet updated in the PT */
> 	struct list_head	freed;
>
>@@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct
>amdgpu_device *adev,
> 				struct amdgpu_vm *vm);
> void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo);
>
>+void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
>+				uint64_t *gtt_mem);
> #if defined(CONFIG_DEBUG_FS)
> void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m);
>#endif
>--
>2.31.1
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>edesktop.org%2Fmailman%2Flistinfo%2Famd-
>gfx&amp;data=04%7C01%7CEmily.Deng%40amd.com%7Cabab61f43c93486c53e
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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface
  2021-04-19  6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun
  2021-04-20  8:53   ` Sun, Roy
@ 2021-04-20  9:57   ` Christian König
  1 sibling, 0 replies; 32+ messages in thread
From: Christian König @ 2021-04-20  9:57 UTC (permalink / raw)
  To: Roy Sun, amd-gfx; +Cc: David M Nieto

Am 19.04.21 um 08:26 schrieb Roy Sun:
> Tracking devices, process info and fence info using
> /proc/pid/fdinfo
>
> Signed-off-by: David M Nieto <David.Nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/Makefile        |  2 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c    | 61 ++++++++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h    |  5 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c    |  5 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 95 ++++++++++++++++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h | 43 ++++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c    |  1 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c     | 24 ++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h     |  4 +
>   10 files changed, 239 insertions(+), 2 deletions(-)
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
> index ee85e8aba636..d216b7ecb5d1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/Makefile
> +++ b/drivers/gpu/drm/amd/amdgpu/Makefile
> @@ -58,6 +58,8 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
>   	amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
>   	amdgpu_fw_attestation.o amdgpu_securedisplay.o
>   
> +amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o
> +
>   amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
>   
>   # add asic specific block
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 125b25a5ce5b..3365feae15e1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -107,6 +107,7 @@
>   #include "amdgpu_gfxhub.h"
>   #include "amdgpu_df.h"
>   #include "amdgpu_smuio.h"
> +#include "amdgpu_fdinfo.h"
>   
>   #define MAX_GPU_INSTANCE		16
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> index 0350205c4897..01fe60fedcbe 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
> @@ -651,3 +651,64 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
>   	idr_destroy(&mgr->ctx_handles);
>   	mutex_destroy(&mgr->lock);
>   }
> +
> +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
> +		ktime_t *total, ktime_t *max)
> +{
> +	ktime_t now, t1;
> +	uint32_t i;
> +
> +	now = ktime_get();
> +	for (i = 0; i < amdgpu_sched_jobs; i++) {
> +		struct dma_fence *fence;
> +		struct drm_sched_fence *s_fence;
> +
> +		spin_lock(&ctx->ring_lock);
> +		fence = dma_fence_get(centity->fences[i]);
> +		spin_unlock(&ctx->ring_lock);
> +		if (!fence)
> +			continue;
> +		s_fence = to_drm_sched_fence(fence);
> +		if (!dma_fence_is_signaled(&s_fence->scheduled))
> +			continue;
> +		t1 = s_fence->scheduled.timestamp;
> +		if (t1 >= now)
> +			continue;
> +		if (dma_fence_is_signaled(&s_fence->finished) &&
> +			s_fence->finished.timestamp < now)
> +			*total += ktime_sub(s_fence->finished.timestamp, t1);
> +		else
> +			*total += ktime_sub(now, t1);
> +		t1 = ktime_sub(now, t1);
> +		dma_fence_put(fence);
> +		*max = max(t1, *max);
> +	}
> +}
> +
> +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
> +		uint32_t idx, uint64_t *elapsed)
> +{
> +	struct idr *idp;
> +	struct amdgpu_ctx *ctx;
> +	uint32_t id;
> +	struct amdgpu_ctx_entity *centity;
> +	ktime_t total = 0, max = 0;
> +
> +	if (idx >= AMDGPU_MAX_ENTITY_NUM)
> +		return 0;
> +	idp = &mgr->ctx_handles;
> +	mutex_lock(&mgr->lock);
> +	idr_for_each_entry(idp, ctx, id) {
> +		if (!ctx->entities[hwip][idx])
> +			continue;
> +
> +		centity = ctx->entities[hwip][idx];
> +		amdgpu_ctx_fence_time(ctx, centity, &total, &max);
> +	}
> +
> +	mutex_unlock(&mgr->lock);
> +	if (elapsed)
> +		*elapsed = max;
> +
> +	return total;
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
> index f54e10314661..10dcf59a5c6b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
> @@ -87,5 +87,8 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
>   void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr);
>   long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
>   void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
> -
> +ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
> +		uint32_t idx, uint64_t *elapsed);
> +void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
> +		ktime_t *total, ktime_t *max);
>   #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 0369d3532bf0..01603378dbc9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -42,7 +42,7 @@
>   #include "amdgpu_irq.h"
>   #include "amdgpu_dma_buf.h"
>   #include "amdgpu_sched.h"
> -
> +#include "amdgpu_fdinfo.h"
>   #include "amdgpu_amdkfd.h"
>   
>   #include "amdgpu_ras.h"
> @@ -1692,6 +1692,9 @@ static const struct file_operations amdgpu_driver_kms_fops = {
>   #ifdef CONFIG_COMPAT
>   	.compat_ioctl = amdgpu_kms_compat_ioctl,
>   #endif
> +#ifdef CONFIG_PROC_FS
> +	.show_fdinfo = amdgpu_show_fdinfo
> +#endif
>   };
>   
>   int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
> new file mode 100644
> index 000000000000..781a06101c22
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
> @@ -0,0 +1,95 @@
> +// SPDX-License-Identifier: MIT
> +/* Copyright 2021 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: David Nieto
> + *          Roy Sun
> + */
> +
> +#include <linux/debugfs.h>
> +#include <linux/list.h>
> +#include <linux/module.h>
> +#include <linux/uaccess.h>
> +#include <linux/reboot.h>
> +#include <linux/syscalls.h>
> +
> +#include <drm/amdgpu_drm.h>
> +#include <drm/drm_debugfs.h>
> +
> +#include "amdgpu.h"
> +#include "amdgpu_vm.h"
> +#include "amdgpu_gem.h"
> +#include "amdgpu_ctx.h"
> +#include "amdgpu_fdinfo.h"
> +
> +
> +static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
> +	[AMDGPU_HW_IP_GFX]	=	"gfx",
> +	[AMDGPU_HW_IP_COMPUTE]	=	"compute",
> +	[AMDGPU_HW_IP_DMA]	=	"dma",
> +	[AMDGPU_HW_IP_UVD]	=	"dec",
> +	[AMDGPU_HW_IP_VCE]	=	"enc",
> +	[AMDGPU_HW_IP_UVD_ENC]	=	"enc_1",
> +	[AMDGPU_HW_IP_VCN_DEC]	=	"dec",
> +	[AMDGPU_HW_IP_VCN_ENC]	=	"enc",
> +	[AMDGPU_HW_IP_VCN_JPEG]	=	"jpeg",
> +};
> +
> +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
> +{
> +	struct amdgpu_fpriv *fpriv;
> +	uint32_t bus, dev, fn, i;
> +	uint64_t vram_mem = 0, gtt_mem = 0;
> +	struct drm_file *file = f->private_data;
> +	struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
> +
> +	if (amdgpu_file_to_fpriv(f, &fpriv))
> +		return;
> +	bus = adev->pdev->bus->number;
> +	dev = PCI_SLOT(adev->pdev->devfn);
> +	fn = PCI_FUNC(adev->pdev->devfn);
> +
> +	amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, &gtt_mem);
> +	seq_printf(m, "pdev:\t%02x:%02x.%d\npasid:\t%u\n", bus, dev, fn,
> +			fpriv->vm.pasid);
> +	seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
> +	seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL);
> +
> +	for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
> +		uint32_t count = amdgpu_ctx_num_entities[i];
> +		int idx = 0;
> +		uint64_t total = 0, min = 0;
> +		uint32_t perc, frac;
> +
> +		for (idx = 0; idx < count; idx++) {
> +			total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr,
> +				i, idx, &min);
> +			if ((total == 0) || (min == 0))
> +				continue;
> +
> +			perc = div64_u64(10000 * total, min);
> +			frac = perc % 100;
> +
> +			seq_printf(m, "%s%d:\t%d.%d%%\n",
> +					amdgpu_ip_name[i],
> +					idx, perc/100, frac);
> +		}
> +	}
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
> new file mode 100644
> index 000000000000..41a4c7056729
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h
> @@ -0,0 +1,43 @@
> +/* SPDX-License-Identifier: MIT
> + * Copyright 2021 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: David Nieto
> + *          Roy Sun
> + */
> +#ifndef __AMDGPU_SMI_H__
> +#define __AMDGPU_SMI_H__
> +
> +#include <linux/idr.h>
> +#include <linux/kfifo.h>
> +#include <linux/rbtree.h>
> +#include <drm/gpu_scheduler.h>
> +#include <drm/drm_file.h>
> +#include <drm/ttm/ttm_bo_driver.h>
> +#include <linux/sched/mm.h>
> +
> +#include "amdgpu_sync.h"
> +#include "amdgpu_ring.h"
> +#include "amdgpu_ids.h"
> +
> +uint32_t amdgpu_get_ip_count(struct amdgpu_device *adev, int id);
> +void amdgpu_show_fdinfo(struct seq_file *m, struct file *f);
> +
> +#endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 39ee88d29cca..b2e774aeab45 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -41,6 +41,7 @@
>   #include "amdgpu_gem.h"
>   #include "amdgpu_display.h"
>   #include "amdgpu_ras.h"
> +#include "amdgpu_fdinfo.h"
>   
>   void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev)
>   {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index f95bcda8463f..773acb4437f7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -25,6 +25,7 @@
>    *          Alex Deucher
>    *          Jerome Glisse
>    */
> +
>   #include <linux/dma-fence-array.h>
>   #include <linux/interval_tree_generic.h>
>   #include <linux/idr.h>
> @@ -322,6 +323,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
>   	base->vm = vm;
>   	base->bo = bo;
>   	base->next = NULL;
> +	INIT_LIST_HEAD(&base->bo_head);
>   	INIT_LIST_HEAD(&base->vm_status);
>   
>   	if (!bo)
> @@ -329,6 +331,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
>   	base->next = bo->vm_bo;
>   	bo->vm_bo = base;
>   
> +	list_add(&base->bo_head, &vm->bo_list);
>   	if (bo->tbo.base.resv != vm->root.base.bo->tbo.base.resv)
>   		return;
>   
> @@ -2541,6 +2544,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
>   
>   	spin_lock(&vm->invalidated_lock);
>   	list_del(&bo_va->base.vm_status);
> +	list_del(&bo_va->base.bo_head);
>   	spin_unlock(&vm->invalidated_lock);
>   
>   	list_for_each_entry_safe(mapping, next, &bo_va->valids, list) {
> @@ -2800,6 +2804,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>   	spin_lock_init(&vm->invalidated_lock);
>   	INIT_LIST_HEAD(&vm->freed);
>   	INIT_LIST_HEAD(&vm->done);
> +	INIT_LIST_HEAD(&vm->bo_list);
>   
>   	/* create scheduler entities for page table updates */
>   	r = drm_sched_entity_init(&vm->immediate, DRM_SCHED_PRIORITY_NORMAL,
> @@ -3267,6 +3272,25 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid,
>   	spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
>   }
>   
> +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
> +				uint64_t *gtt_mem)
> +{
> +	struct amdgpu_vm_bo_base *base = &vm->root.base;
> +
> +	list_for_each_entry(base, &vm->bo_list, bo_head){
> +		struct amdgpu_bo *bo = amdgpu_bo_ref(base->bo);
> +		if (!bo)
> +			continue;
> +		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) ==
> +				AMDGPU_GEM_DOMAIN_VRAM)
> +				*vram_mem += amdgpu_bo_size(bo);
> +		if (amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type) ==
> +				AMDGPU_GEM_DOMAIN_GTT)
> +				*gtt_mem += amdgpu_bo_size(bo);
> +		amdgpu_bo_unref(&bo);
> +	}
> +
> +}
>   /**
>    * amdgpu_vm_set_task_info - Sets VMs task info.
>    *
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 848e175e99ff..72727117c479 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -150,6 +150,7 @@ struct amdgpu_vm_bo_base {
>   	/* protected by spinlock */
>   	struct list_head		vm_status;
>   
> +	struct list_head		bo_head;

That is a clear NAK, we already have the status list and you are just 
duplicating that.

See amdgpu_debugfs_vm_bo_info() how to use it how to use it.

Regards,
Christian.

>   	/* protected by the BO being reserved */
>   	bool				moved;
>   };
> @@ -274,6 +275,7 @@ struct amdgpu_vm {
>   	struct list_head	invalidated;
>   	spinlock_t		invalidated_lock;
>   
> +	struct list_head	bo_list;
>   	/* BO mappings freed, but not yet updated in the PT */
>   	struct list_head	freed;
>   
> @@ -458,6 +460,8 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
>   				struct amdgpu_vm *vm);
>   void amdgpu_vm_del_from_lru_notify(struct ttm_buffer_object *bo);
>   
> +void amdgpu_vm_get_memory(struct amdgpu_vm *vm, uint64_t *vram_mem,
> +				uint64_t *gtt_mem);
>   #if defined(CONFIG_DEBUG_FS)
>   void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m);
>   #endif

_______________________________________________
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amd-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-05-05  7:27                 ` Christian König
@ 2021-05-05 19:55                   ` Nieto, David M
  0 siblings, 0 replies; 32+ messages in thread
From: Nieto, David M @ 2021-05-05 19:55 UTC (permalink / raw)
  To: Christian König, Alex Deucher
  Cc: Deucher, Alexander, Deng, Emily, Sun, Roy, amd-gfx list

[-- Attachment #1.1: Type: text/plain, Size: 7031 bytes --]

[AMD Official Use Only - Internal Distribution Only]

Thanks,

Do we know when those changes will make it back to amd-staging-drm-next ?
________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: Wednesday, May 5, 2021 12:27 AM
To: Alex Deucher <alexdeucher@gmail.com>
Cc: Deng, Emily <Emily.Deng@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

I had to rebase them and was on sick leave last week.

Changed a few things on patch #1 and pushed the result a minute ago.

Christian.

Am 04.05.21 um 22:23 schrieb Alex Deucher:
> Did you push this yet?  I don't see it in drm-misc.
>
> Thanks,
>
> Alex
>
> On Wed, Apr 28, 2021 at 5:06 AM Christian König
> <ckoenig.leichtzumerken@gmail.com> wrote:
>> Well none. As I said I will push this upstream through drm-misc-next.
>>
>> Christian.
>>
>> Am 28.04.21 um 10:32 schrieb Deng, Emily:
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>> Hi Alex and Christian,
>>
>> What extra work Roy need to do about this patch? And fdinfo?
>>
>>
>>
>> Best wishes
>>
>> Emily Deng
>>
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Deucher, Alexander
>> Sent: Tuesday, April 27, 2021 3:52 AM
>> To: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Cc: Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> Fair point.  Either way works for me.
>>
>>
>>
>> Alex
>>
>> ________________________________
>>
>> From: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Sent: Monday, April 26, 2021 3:48 PM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>
>> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> My concern is more to get this tested from more people than just AMD.
>>
>> Christian.
>>
>> Am 26.04.21 um 21:40 schrieb Deucher, Alexander:
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> That said, it would be easier for me to merge through the AMD tree since a relatively big AMD feature depends on it.  Not sure how much conflict potential there is if this goes through the AMD tree.
>>
>>
>>
>> Alex
>>
>>
>>
>> ________________________________
>>
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher@amd.com>
>> Sent: Monday, April 26, 2021 3:24 PM
>> To: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> No objections from me.
>>
>>
>>
>> Thanks!
>>
>>
>>
>> Alex
>>
>>
>>
>> ________________________________
>>
>> From: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Sent: Monday, April 26, 2021 2:49 AM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>
>> Cc: Nieto, David M <David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> Hey Alex,
>>
>> any objections that we merge those two patches through drm-misc-next?
>>
>> Thanks,
>> Christian.
>>
>> Am 26.04.21 um 08:27 schrieb Roy Sun:
>>> Update the timestamp of scheduled fence on HW
>>> completion of the previous fences
>>>
>>> This allow more accurate tracking of the fence
>>> execution in HW
>>>
>>> Signed-off-by: David M Nieto <david.nieto@amd.com>
>>> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
>>> ---
>>>    drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>>>    1 file changed, 10 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
>>> index 92d8de24d0a1..f8e39ab0c41b 100644
>>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>>> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>>>    EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>>>
>>>    /**
>>> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
>>> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>>>     *
>>>     * @sched: scheduler instance
>>>     * @max: job numbers to relaunch
>>> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>>>    static struct drm_sched_job *
>>>    drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>>>    {
>>> -     struct drm_sched_job *job;
>>> +     struct drm_sched_job *job, *next;
>>>
>>>         /*
>>>          * Don't destroy jobs while the timeout worker is running  OR thread
>>> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>>>         if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>>>                 /* remove job from pending_list */
>>>                 list_del_init(&job->list);
>>> We just need to record the scheduled time of the next job. So we
>>> need not to check the rest job.
>>> +             /* account for the next fence in the queue */
>>> +             next = list_first_entry_or_null(&sched->pending_list,
>>> +                             struct drm_sched_job, list);
>>> +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
>>> +                     &job->s_fence->finished.flags)) {
>>> +                     next->s_fence->scheduled.timestamp =
>>> +                             job->s_fence->finished.timestamp;
>>> +             }
>>>         } else {
>>>                 job = NULL;
>>>                 /* queue timeout for next job */
>>
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CDavid.Nieto%40amd.com%7C7e7e640953954b94e2d408d90f9744a1%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637557964635531548%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Yk2XfdFcbeimlcdh3VXWldS1cRD9LA32PMlN0kbfUME%3D&amp;reserved=0


[-- Attachment #1.2: Type: text/html, Size: 12337 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-05-04 20:23               ` Alex Deucher
@ 2021-05-05  7:27                 ` Christian König
  2021-05-05 19:55                   ` Nieto, David M
  0 siblings, 1 reply; 32+ messages in thread
From: Christian König @ 2021-05-05  7:27 UTC (permalink / raw)
  To: Alex Deucher
  Cc: Deucher, Alexander, Deng, Emily, Sun, Roy, amd-gfx list, Nieto, David M

I had to rebase them and was on sick leave last week.

Changed a few things on patch #1 and pushed the result a minute ago.

Christian.

Am 04.05.21 um 22:23 schrieb Alex Deucher:
> Did you push this yet?  I don't see it in drm-misc.
>
> Thanks,
>
> Alex
>
> On Wed, Apr 28, 2021 at 5:06 AM Christian König
> <ckoenig.leichtzumerken@gmail.com> wrote:
>> Well none. As I said I will push this upstream through drm-misc-next.
>>
>> Christian.
>>
>> Am 28.04.21 um 10:32 schrieb Deng, Emily:
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>> Hi Alex and Christian,
>>
>> What extra work Roy need to do about this patch? And fdinfo?
>>
>>
>>
>> Best wishes
>>
>> Emily Deng
>>
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Deucher, Alexander
>> Sent: Tuesday, April 27, 2021 3:52 AM
>> To: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Cc: Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> Fair point.  Either way works for me.
>>
>>
>>
>> Alex
>>
>> ________________________________
>>
>> From: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Sent: Monday, April 26, 2021 3:48 PM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>
>> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> My concern is more to get this tested from more people than just AMD.
>>
>> Christian.
>>
>> Am 26.04.21 um 21:40 schrieb Deucher, Alexander:
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> That said, it would be easier for me to merge through the AMD tree since a relatively big AMD feature depends on it.  Not sure how much conflict potential there is if this goes through the AMD tree.
>>
>>
>>
>> Alex
>>
>>
>>
>> ________________________________
>>
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher@amd.com>
>> Sent: Monday, April 26, 2021 3:24 PM
>> To: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> No objections from me.
>>
>>
>>
>> Thanks!
>>
>>
>>
>> Alex
>>
>>
>>
>> ________________________________
>>
>> From: Christian König <ckoenig.leichtzumerken@gmail.com>
>> Sent: Monday, April 26, 2021 2:49 AM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>
>> Cc: Nieto, David M <David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>>
>>
>>
>> Hey Alex,
>>
>> any objections that we merge those two patches through drm-misc-next?
>>
>> Thanks,
>> Christian.
>>
>> Am 26.04.21 um 08:27 schrieb Roy Sun:
>>> Update the timestamp of scheduled fence on HW
>>> completion of the previous fences
>>>
>>> This allow more accurate tracking of the fence
>>> execution in HW
>>>
>>> Signed-off-by: David M Nieto <david.nieto@amd.com>
>>> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
>>> ---
>>>    drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>>>    1 file changed, 10 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
>>> index 92d8de24d0a1..f8e39ab0c41b 100644
>>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>>> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>>>    EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>>>
>>>    /**
>>> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
>>> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>>>     *
>>>     * @sched: scheduler instance
>>>     * @max: job numbers to relaunch
>>> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>>>    static struct drm_sched_job *
>>>    drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>>>    {
>>> -     struct drm_sched_job *job;
>>> +     struct drm_sched_job *job, *next;
>>>
>>>         /*
>>>          * Don't destroy jobs while the timeout worker is running  OR thread
>>> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>>>         if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>>>                 /* remove job from pending_list */
>>>                 list_del_init(&job->list);
>>> We just need to record the scheduled time of the next job. So we
>>> need not to check the rest job.
>>> +             /* account for the next fence in the queue */
>>> +             next = list_first_entry_or_null(&sched->pending_list,
>>> +                             struct drm_sched_job, list);
>>> +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
>>> +                     &job->s_fence->finished.flags)) {
>>> +                     next->s_fence->scheduled.timestamp =
>>> +                             job->s_fence->finished.timestamp;
>>> +             }
>>>         } else {
>>>                 job = NULL;
>>>                 /* queue timeout for next job */
>>
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-28  9:06             ` Christian König
  2021-04-28  9:15               ` Deng, Emily
@ 2021-05-04 20:23               ` Alex Deucher
  2021-05-05  7:27                 ` Christian König
  1 sibling, 1 reply; 32+ messages in thread
From: Alex Deucher @ 2021-05-04 20:23 UTC (permalink / raw)
  To: Christian König
  Cc: Deucher, Alexander, Deng, Emily, Sun, Roy, amd-gfx list, Nieto, David M

Did you push this yet?  I don't see it in drm-misc.

Thanks,

Alex

On Wed, Apr 28, 2021 at 5:06 AM Christian König
<ckoenig.leichtzumerken@gmail.com> wrote:
>
> Well none. As I said I will push this upstream through drm-misc-next.
>
> Christian.
>
> Am 28.04.21 um 10:32 schrieb Deng, Emily:
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
> Hi Alex and Christian,
>
> What extra work Roy need to do about this patch? And fdinfo?
>
>
>
> Best wishes
>
> Emily Deng
>
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Deucher, Alexander
> Sent: Tuesday, April 27, 2021 3:52 AM
> To: Christian König <ckoenig.leichtzumerken@gmail.com>
> Cc: Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Nieto, David M <David.Nieto@amd.com>
> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>
>
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
>
> Fair point.  Either way works for me.
>
>
>
> Alex
>
> ________________________________
>
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: Monday, April 26, 2021 3:48 PM
> To: Deucher, Alexander <Alexander.Deucher@amd.com>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>
>
>
> My concern is more to get this tested from more people than just AMD.
>
> Christian.
>
> Am 26.04.21 um 21:40 schrieb Deucher, Alexander:
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
>
> That said, it would be easier for me to merge through the AMD tree since a relatively big AMD feature depends on it.  Not sure how much conflict potential there is if this goes through the AMD tree.
>
>
>
> Alex
>
>
>
> ________________________________
>
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher@amd.com>
> Sent: Monday, April 26, 2021 3:24 PM
> To: Christian König <ckoenig.leichtzumerken@gmail.com>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>
>
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
>
> No objections from me.
>
>
>
> Thanks!
>
>
>
> Alex
>
>
>
> ________________________________
>
> From: Christian König <ckoenig.leichtzumerken@gmail.com>
> Sent: Monday, April 26, 2021 2:49 AM
> To: Deucher, Alexander <Alexander.Deucher@amd.com>
> Cc: Nieto, David M <David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>
>
>
> Hey Alex,
>
> any objections that we merge those two patches through drm-misc-next?
>
> Thanks,
> Christian.
>
> Am 26.04.21 um 08:27 schrieb Roy Sun:
> > Update the timestamp of scheduled fence on HW
> > completion of the previous fences
> >
> > This allow more accurate tracking of the fence
> > execution in HW
> >
> > Signed-off-by: David M Nieto <david.nieto@amd.com>
> > Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> > ---
> >   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
> >   1 file changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> > index 92d8de24d0a1..f8e39ab0c41b 100644
> > --- a/drivers/gpu/drm/scheduler/sched_main.c
> > +++ b/drivers/gpu/drm/scheduler/sched_main.c
> > @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
> >   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
> >
> >   /**
> > - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> > + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
> >    *
> >    * @sched: scheduler instance
> >    * @max: job numbers to relaunch
> > @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
> >   static struct drm_sched_job *
> >   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
> >   {
> > -     struct drm_sched_job *job;
> > +     struct drm_sched_job *job, *next;
> >
> >        /*
> >         * Don't destroy jobs while the timeout worker is running  OR thread
> > @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
> >        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
> >                /* remove job from pending_list */
> >                list_del_init(&job->list);
> > We just need to record the scheduled time of the next job. So we
> > need not to check the rest job.
> > +             /* account for the next fence in the queue */
> > +             next = list_first_entry_or_null(&sched->pending_list,
> > +                             struct drm_sched_job, list);
> > +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> > +                     &job->s_fence->finished.flags)) {
> > +                     next->s_fence->scheduled.timestamp =
> > +                             job->s_fence->finished.timestamp;
> > +             }
> >        } else {
> >                job = NULL;
> >                /* queue timeout for next job */
>
>
>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* RE: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-28  9:06             ` Christian König
@ 2021-04-28  9:15               ` Deng, Emily
  2021-05-04 20:23               ` Alex Deucher
  1 sibling, 0 replies; 32+ messages in thread
From: Deng, Emily @ 2021-04-28  9:15 UTC (permalink / raw)
  To: Christian König, Deucher, Alexander
  Cc: amd-gfx list, Sun, Roy, Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 6319 bytes --]

[AMD Official Use Only - Internal Distribution Only]

Hi Christian,
Good to know, thanks very much.

Best wishes
Emily Deng
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: Wednesday, April 28, 2021 5:07 PM
To: Deng, Emily <Emily.Deng@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Nieto, David M <David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Well none. As I said I will push this upstream through drm-misc-next.

Christian.
Am 28.04.21 um 10:32 schrieb Deng, Emily:

[AMD Official Use Only - Internal Distribution Only]

Hi Alex and Christian,
What extra work Roy need to do about this patch? And fdinfo?

Best wishes
Emily Deng
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org><mailto:amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Deucher, Alexander
Sent: Tuesday, April 27, 2021 3:52 AM
To: Christian König <ckoenig.leichtzumerken@gmail.com><mailto:ckoenig.leichtzumerken@gmail.com>
Cc: Sun, Roy <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org><mailto:amd-gfx@lists.freedesktop.org>; Nieto, David M <David.Nieto@amd.com><mailto:David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track


[AMD Official Use Only - Internal Distribution Only]


[AMD Official Use Only - Internal Distribution Only]

Fair point.  Either way works for me.

Alex
________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com<mailto:ckoenig.leichtzumerken@gmail.com>>
Sent: Monday, April 26, 2021 3:48 PM
To: Deucher, Alexander <Alexander.Deucher@amd.com<mailto:Alexander.Deucher@amd.com>>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>>; Sun, Roy <Roy.Sun@amd.com<mailto:Roy.Sun@amd.com>>; Nieto, David M <David.Nieto@amd.com<mailto:David.Nieto@amd.com>>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

My concern is more to get this tested from more people than just AMD.

Christian.
Am 26.04.21 um 21:40 schrieb Deucher, Alexander:

[AMD Official Use Only - Internal Distribution Only]

That said, it would be easier for me to merge through the AMD tree since a relatively big AMD feature depends on it.  Not sure how much conflict potential there is if this goes through the AMD tree.

Alex

________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org><mailto:amd-gfx-bounces@lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher@amd.com><mailto:Alexander.Deucher@amd.com>
Sent: Monday, April 26, 2021 3:24 PM
To: Christian König <ckoenig.leichtzumerken@gmail.com><mailto:ckoenig.leichtzumerken@gmail.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org><mailto:amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com><mailto:David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track


[AMD Official Use Only - Internal Distribution Only]


[AMD Official Use Only - Internal Distribution Only]

No objections from me.

Thanks!

Alex

________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com><mailto:ckoenig.leichtzumerken@gmail.com>
Sent: Monday, April 26, 2021 2:49 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com><mailto:Alexander.Deucher@amd.com>
Cc: Nieto, David M <David.Nieto@amd.com><mailto:David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org><mailto:amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Hey Alex,

any objections that we merge those two patches through drm-misc-next?

Thanks,
Christian.

Am 26.04.21 um 08:27 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com><mailto:david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>
> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..f8e39ab0c41b 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -     struct drm_sched_job *job;
> +     struct drm_sched_job *job, *next;
>
>        /*
>         * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>                /* remove job from pending_list */
>                list_del_init(&job->list);
> We just need to record the scheduled time of the next job. So we
> need not to check the rest job.
> +             /* account for the next fence in the queue */
> +             next = list_first_entry_or_null(&sched->pending_list,
> +                             struct drm_sched_job, list);
> +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> +                     &job->s_fence->finished.flags)) {
> +                     next->s_fence->scheduled.timestamp =
> +                             job->s_fence->finished.timestamp;
> +             }
>        } else {
>                job = NULL;
>                /* queue timeout for next job */



[-- Attachment #1.2: Type: text/html, Size: 15358 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-28  8:32           ` Deng, Emily
@ 2021-04-28  9:06             ` Christian König
  2021-04-28  9:15               ` Deng, Emily
  2021-05-04 20:23               ` Alex Deucher
  0 siblings, 2 replies; 32+ messages in thread
From: Christian König @ 2021-04-28  9:06 UTC (permalink / raw)
  To: Deng, Emily, Deucher, Alexander; +Cc: amd-gfx list, Sun, Roy, Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 6270 bytes --]

Well none. As I said I will push this upstream through drm-misc-next.

Christian.

Am 28.04.21 um 10:32 schrieb Deng, Emily:
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
> Hi Alex and Christian,
>
> What extra work Roy need to do about this patch? And fdinfo?
>
> Best wishes
>
> Emily Deng
>
> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> *On Behalf Of 
> *Deucher, Alexander
> *Sent:* Tuesday, April 27, 2021 3:52 AM
> *To:* Christian König <ckoenig.leichtzumerken@gmail.com>
> *Cc:* Sun, Roy <Roy.Sun@amd.com>; amd-gfx list 
> <amd-gfx@lists.freedesktop.org>; Nieto, David M <David.Nieto@amd.com>
> *Subject:* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>
> [AMD Official Use Only - Internal Distribution Only]
>
> [AMD Official Use Only - Internal Distribution Only]
>
> Fair point. Either way works for me.
>
> Alex
>
> ------------------------------------------------------------------------
>
> *From:*Christian König <ckoenig.leichtzumerken@gmail.com 
> <mailto:ckoenig.leichtzumerken@gmail.com>>
> *Sent:* Monday, April 26, 2021 3:48 PM
> *To:* Deucher, Alexander <Alexander.Deucher@amd.com 
> <mailto:Alexander.Deucher@amd.com>>
> *Cc:* amd-gfx list <amd-gfx@lists.freedesktop.org 
> <mailto:amd-gfx@lists.freedesktop.org>>; Sun, Roy <Roy.Sun@amd.com 
> <mailto:Roy.Sun@amd.com>>; Nieto, David M <David.Nieto@amd.com 
> <mailto:David.Nieto@amd.com>>
> *Subject:* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>
> My concern is more to get this tested from more people than just AMD.
>
> Christian.
>
> Am 26.04.21 um 21:40 schrieb Deucher, Alexander:
>
>     [AMD Official Use Only - Internal Distribution Only]
>
>     That said, it would be easier for me to merge through the AMD tree
>     since a relatively big AMD feature depends on it.  Not sure how
>     much conflict potential there is if this goes through the AMD tree.
>
>     Alex
>
>     ------------------------------------------------------------------------
>
>     *From:*amd-gfx <amd-gfx-bounces@lists.freedesktop.org>
>     <mailto:amd-gfx-bounces@lists.freedesktop.org> on behalf of
>     Deucher, Alexander <Alexander.Deucher@amd.com>
>     <mailto:Alexander.Deucher@amd.com>
>     *Sent:* Monday, April 26, 2021 3:24 PM
>     *To:* Christian König <ckoenig.leichtzumerken@gmail.com>
>     <mailto:ckoenig.leichtzumerken@gmail.com>
>     *Cc:* amd-gfx list <amd-gfx@lists.freedesktop.org>
>     <mailto:amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>
>     <mailto:Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>     <mailto:David.Nieto@amd.com>
>     *Subject:* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence
>     track
>
>     [AMD Official Use Only - Internal Distribution Only]
>
>     [AMD Official Use Only - Internal Distribution Only]
>
>     No objections from me.
>
>     Thanks!
>
>     Alex
>
>     ------------------------------------------------------------------------
>
>     *From:*Christian König <ckoenig.leichtzumerken@gmail.com>
>     <mailto:ckoenig.leichtzumerken@gmail.com>
>     *Sent:* Monday, April 26, 2021 2:49 AM
>     *To:* Deucher, Alexander <Alexander.Deucher@amd.com>
>     <mailto:Alexander.Deucher@amd.com>
>     *Cc:* Nieto, David M <David.Nieto@amd.com>
>     <mailto:David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com>
>     <mailto:Roy.Sun@amd.com>; amd-gfx list
>     <amd-gfx@lists.freedesktop.org> <mailto:amd-gfx@lists.freedesktop.org>
>     *Subject:* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence
>     track
>
>     Hey Alex,
>
>     any objections that we merge those two patches through drm-misc-next?
>
>     Thanks,
>     Christian.
>
>     Am 26.04.21 um 08:27 schrieb Roy Sun:
>     > Update the timestamp of scheduled fence on HW
>     > completion of the previous fences
>     >
>     > This allow more accurate tracking of the fence
>     > execution in HW
>     >
>     > Signed-off-by: David M Nieto <david.nieto@amd.com>
>     <mailto:david.nieto@amd.com>
>     > Signed-off-by: Roy Sun <Roy.Sun@amd.com> <mailto:Roy.Sun@amd.com>
>     > ---
>     > drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>     >   1 file changed, 10 insertions(+), 2 deletions(-)
>     >
>     > diff --git a/drivers/gpu/drm/scheduler/sched_main.c
>     b/drivers/gpu/drm/scheduler/sched_main.c
>     > index 92d8de24d0a1..f8e39ab0c41b 100644
>     > --- a/drivers/gpu/drm/scheduler/sched_main.c
>     > +++ b/drivers/gpu/drm/scheduler/sched_main.c
>     > @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct
>     drm_gpu_scheduler *sched)
>     > EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>     >
>     >   /**
>     > - * drm_sched_resubmit_jobs_ext - helper to relunch certain
>     number of jobs from mirror ring list
>     > + * drm_sched_resubmit_jobs_ext - helper to relaunch certain
>     number of jobs from pending list
>     >    *
>     >    * @sched: scheduler instance
>     >    * @max: job numbers to relaunch
>     > @@ -671,7 +671,7 @@ drm_sched_select_entity(struct
>     drm_gpu_scheduler *sched)
>     >   static struct drm_sched_job *
>     > drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>     >   {
>     > -     struct drm_sched_job *job;
>     > +     struct drm_sched_job *job, *next;
>     >
>     >        /*
>     >         * Don't destroy jobs while the timeout worker is running
>     OR thread
>     > @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct
>     drm_gpu_scheduler *sched)
>     >        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>     >                /* remove job from pending_list */
>     > list_del_init(&job->list);
>     > We just need to record the scheduled time of the next job. So we
>     > need not to check the rest job.
>     > +             /* account for the next fence in the queue */
>     > +             next = list_first_entry_or_null(&sched->pending_list,
>     > + struct drm_sched_job, list);
>     > +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
>     > + &job->s_fence->finished.flags)) {
>     > + next->s_fence->scheduled.timestamp =
>     > + job->s_fence->finished.timestamp;
>     > +             }
>     >        } else {
>     >                job = NULL;
>     >                /* queue timeout for next job */
>


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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* RE: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26 19:51         ` Deucher, Alexander
@ 2021-04-28  8:32           ` Deng, Emily
  2021-04-28  9:06             ` Christian König
  0 siblings, 1 reply; 32+ messages in thread
From: Deng, Emily @ 2021-04-28  8:32 UTC (permalink / raw)
  To: Deucher, Alexander, Christian König
  Cc: amd-gfx list, Sun, Roy, Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 5506 bytes --]

[AMD Official Use Only - Internal Distribution Only]

Hi Alex and Christian,
What extra work Roy need to do about this patch? And fdinfo?

Best wishes
Emily Deng
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Deucher, Alexander
Sent: Tuesday, April 27, 2021 3:52 AM
To: Christian König <ckoenig.leichtzumerken@gmail.com>
Cc: Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>; Nieto, David M <David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track


[AMD Official Use Only - Internal Distribution Only]


[AMD Official Use Only - Internal Distribution Only]

Fair point.  Either way works for me.

Alex
________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com<mailto:ckoenig.leichtzumerken@gmail.com>>
Sent: Monday, April 26, 2021 3:48 PM
To: Deucher, Alexander <Alexander.Deucher@amd.com<mailto:Alexander.Deucher@amd.com>>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>>; Sun, Roy <Roy.Sun@amd.com<mailto:Roy.Sun@amd.com>>; Nieto, David M <David.Nieto@amd.com<mailto:David.Nieto@amd.com>>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

My concern is more to get this tested from more people than just AMD.

Christian.
Am 26.04.21 um 21:40 schrieb Deucher, Alexander:

[AMD Official Use Only - Internal Distribution Only]

That said, it would be easier for me to merge through the AMD tree since a relatively big AMD feature depends on it.  Not sure how much conflict potential there is if this goes through the AMD tree.

Alex

________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org><mailto:amd-gfx-bounces@lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher@amd.com><mailto:Alexander.Deucher@amd.com>
Sent: Monday, April 26, 2021 3:24 PM
To: Christian König <ckoenig.leichtzumerken@gmail.com><mailto:ckoenig.leichtzumerken@gmail.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org><mailto:amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com><mailto:David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track


[AMD Official Use Only - Internal Distribution Only]


[AMD Official Use Only - Internal Distribution Only]

No objections from me.

Thanks!

Alex

________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com><mailto:ckoenig.leichtzumerken@gmail.com>
Sent: Monday, April 26, 2021 2:49 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com><mailto:Alexander.Deucher@amd.com>
Cc: Nieto, David M <David.Nieto@amd.com><mailto:David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org><mailto:amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Hey Alex,

any objections that we merge those two patches through drm-misc-next?

Thanks,
Christian.

Am 26.04.21 um 08:27 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com><mailto:david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>
> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..f8e39ab0c41b 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -     struct drm_sched_job *job;
> +     struct drm_sched_job *job, *next;
>
>        /*
>         * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>                /* remove job from pending_list */
>                list_del_init(&job->list);
> We just need to record the scheduled time of the next job. So we
> need not to check the rest job.
> +             /* account for the next fence in the queue */
> +             next = list_first_entry_or_null(&sched->pending_list,
> +                             struct drm_sched_job, list);
> +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> +                     &job->s_fence->finished.flags)) {
> +                     next->s_fence->scheduled.timestamp =
> +                             job->s_fence->finished.timestamp;
> +             }
>        } else {
>                job = NULL;
>                /* queue timeout for next job */


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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26 19:48       ` Christian König
@ 2021-04-26 19:51         ` Deucher, Alexander
  2021-04-28  8:32           ` Deng, Emily
  0 siblings, 1 reply; 32+ messages in thread
From: Deucher, Alexander @ 2021-04-26 19:51 UTC (permalink / raw)
  To: Christian König; +Cc: Sun, Roy, amd-gfx list, Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 4746 bytes --]

[AMD Official Use Only - Internal Distribution Only]

Fair point.  Either way works for me.

Alex
________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: Monday, April 26, 2021 3:48 PM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

My concern is more to get this tested from more people than just AMD.

Christian.

Am 26.04.21 um 21:40 schrieb Deucher, Alexander:

[AMD Official Use Only - Internal Distribution Only]

That said, it would be easier for me to merge through the AMD tree since a relatively big AMD feature depends on it.  Not sure how much conflict potential there is if this goes through the AMD tree.

Alex

________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org><mailto:amd-gfx-bounces@lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher@amd.com><mailto:Alexander.Deucher@amd.com>
Sent: Monday, April 26, 2021 3:24 PM
To: Christian König <ckoenig.leichtzumerken@gmail.com><mailto:ckoenig.leichtzumerken@gmail.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org><mailto:amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com><mailto:David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track


[AMD Official Use Only - Internal Distribution Only]


[AMD Official Use Only - Internal Distribution Only]

No objections from me.

Thanks!

Alex

________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com><mailto:ckoenig.leichtzumerken@gmail.com>
Sent: Monday, April 26, 2021 2:49 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com><mailto:Alexander.Deucher@amd.com>
Cc: Nieto, David M <David.Nieto@amd.com><mailto:David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org><mailto:amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Hey Alex,

any objections that we merge those two patches through drm-misc-next?

Thanks,
Christian.

Am 26.04.21 um 08:27 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com><mailto:david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com><mailto:Roy.Sun@amd.com>
> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..f8e39ab0c41b 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -     struct drm_sched_job *job;
> +     struct drm_sched_job *job, *next;
>
>        /*
>         * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>                /* remove job from pending_list */
>                list_del_init(&job->list);
> We just need to record the scheduled time of the next job. So we
> need not to check the rest job.
> +             /* account for the next fence in the queue */
> +             next = list_first_entry_or_null(&sched->pending_list,
> +                             struct drm_sched_job, list);
> +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> +                     &job->s_fence->finished.flags)) {
> +                     next->s_fence->scheduled.timestamp =
> +                             job->s_fence->finished.timestamp;
> +             }
>        } else {
>                job = NULL;
>                /* queue timeout for next job */



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_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26 19:40     ` Deucher, Alexander
@ 2021-04-26 19:48       ` Christian König
  2021-04-26 19:51         ` Deucher, Alexander
  0 siblings, 1 reply; 32+ messages in thread
From: Christian König @ 2021-04-26 19:48 UTC (permalink / raw)
  To: Deucher, Alexander; +Cc: Sun, Roy, amd-gfx list, Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 3968 bytes --]

My concern is more to get this tested from more people than just AMD.

Christian.

Am 26.04.21 um 21:40 schrieb Deucher, Alexander:
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
> That said, it would be easier for me to merge through the AMD tree 
> since a relatively big AMD feature depends on it.  Not sure how much 
> conflict potential there is if this goes through the AMD tree.
>
> Alex
>
> ------------------------------------------------------------------------
> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of 
> Deucher, Alexander <Alexander.Deucher@amd.com>
> *Sent:* Monday, April 26, 2021 3:24 PM
> *To:* Christian König <ckoenig.leichtzumerken@gmail.com>
> *Cc:* amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy 
> <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
> *Subject:* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
> No objections from me.
>
> Thanks!
>
> Alex
>
> ------------------------------------------------------------------------
> *From:* Christian König <ckoenig.leichtzumerken@gmail.com>
> *Sent:* Monday, April 26, 2021 2:49 AM
> *To:* Deucher, Alexander <Alexander.Deucher@amd.com>
> *Cc:* Nieto, David M <David.Nieto@amd.com>; Sun, Roy 
> <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
> *Subject:* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
> Hey Alex,
>
> any objections that we merge those two patches through drm-misc-next?
>
> Thanks,
> Christian.
>
> Am 26.04.21 um 08:27 schrieb Roy Sun:
> > Update the timestamp of scheduled fence on HW
> > completion of the previous fences
> >
> > This allow more accurate tracking of the fence
> > execution in HW
> >
> > Signed-off-by: David M Nieto <david.nieto@amd.com>
> > Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> > ---
> >   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
> >   1 file changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/scheduler/sched_main.c 
> b/drivers/gpu/drm/scheduler/sched_main.c
> > index 92d8de24d0a1..f8e39ab0c41b 100644
> > --- a/drivers/gpu/drm/scheduler/sched_main.c
> > +++ b/drivers/gpu/drm/scheduler/sched_main.c
> > @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct 
> drm_gpu_scheduler *sched)
> >   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
> >
> >   /**
> > - * drm_sched_resubmit_jobs_ext - helper to relunch certain number 
> of jobs from mirror ring list
> > + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number 
> of jobs from pending list
> >    *
> >    * @sched: scheduler instance
> >    * @max: job numbers to relaunch
> > @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler 
> *sched)
> >   static struct drm_sched_job *
> >   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
> >   {
> > -     struct drm_sched_job *job;
> > +     struct drm_sched_job *job, *next;
> >
> >        /*
> >         * Don't destroy jobs while the timeout worker is running  OR 
> thread
> > @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct 
> drm_gpu_scheduler *sched)
> >        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
> >                /* remove job from pending_list */
> > list_del_init(&job->list);
> > We just need to record the scheduled time of the next job. So we
> > need not to check the rest job.
> > +             /* account for the next fence in the queue */
> > +             next = list_first_entry_or_null(&sched->pending_list,
> > +                             struct drm_sched_job, list);
> > +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> > + &job->s_fence->finished.flags)) {
> > + next->s_fence->scheduled.timestamp =
> > + job->s_fence->finished.timestamp;
> > +             }
> >        } else {
> >                job = NULL;
> >                /* queue timeout for next job */
>


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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26 19:24   ` Deucher, Alexander
@ 2021-04-26 19:40     ` Deucher, Alexander
  2021-04-26 19:48       ` Christian König
  0 siblings, 1 reply; 32+ messages in thread
From: Deucher, Alexander @ 2021-04-26 19:40 UTC (permalink / raw)
  To: Christian König; +Cc: Sun, Roy, amd-gfx list, Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 3704 bytes --]

[AMD Official Use Only - Internal Distribution Only]

That said, it would be easier for me to merge through the AMD tree since a relatively big AMD feature depends on it.  Not sure how much conflict potential there is if this goes through the AMD tree.

Alex

________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher@amd.com>
Sent: Monday, April 26, 2021 3:24 PM
To: Christian König <ckoenig.leichtzumerken@gmail.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track


[AMD Official Use Only - Internal Distribution Only]


[AMD Official Use Only - Internal Distribution Only]

No objections from me.

Thanks!

Alex

________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: Monday, April 26, 2021 2:49 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: Nieto, David M <David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Hey Alex,

any objections that we merge those two patches through drm-misc-next?

Thanks,
Christian.

Am 26.04.21 um 08:27 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..f8e39ab0c41b 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -     struct drm_sched_job *job;
> +     struct drm_sched_job *job, *next;
>
>        /*
>         * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>                /* remove job from pending_list */
>                list_del_init(&job->list);
> We just need to record the scheduled time of the next job. So we
> need not to check the rest job.
> +             /* account for the next fence in the queue */
> +             next = list_first_entry_or_null(&sched->pending_list,
> +                             struct drm_sched_job, list);
> +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> +                     &job->s_fence->finished.flags)) {
> +                     next->s_fence->scheduled.timestamp =
> +                             job->s_fence->finished.timestamp;
> +             }
>        } else {
>                job = NULL;
>                /* queue timeout for next job */


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_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26  6:49 ` Christian König
@ 2021-04-26 19:24   ` Deucher, Alexander
  2021-04-26 19:40     ` Deucher, Alexander
  0 siblings, 1 reply; 32+ messages in thread
From: Deucher, Alexander @ 2021-04-26 19:24 UTC (permalink / raw)
  To: Christian König; +Cc: amd-gfx list, Sun, Roy, Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 2947 bytes --]

[AMD Official Use Only - Internal Distribution Only]

No objections from me.

Thanks!

Alex

________________________________
From: Christian König <ckoenig.leichtzumerken@gmail.com>
Sent: Monday, April 26, 2021 2:49 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: Nieto, David M <David.Nieto@amd.com>; Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Hey Alex,

any objections that we merge those two patches through drm-misc-next?

Thanks,
Christian.

Am 26.04.21 um 08:27 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..f8e39ab0c41b 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -     struct drm_sched_job *job;
> +     struct drm_sched_job *job, *next;
>
>        /*
>         * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>        if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>                /* remove job from pending_list */
>                list_del_init(&job->list);
> We just need to record the scheduled time of the next job. So we
> need not to check the rest job.
> +             /* account for the next fence in the queue */
> +             next = list_first_entry_or_null(&sched->pending_list,
> +                             struct drm_sched_job, list);
> +             if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> +                     &job->s_fence->finished.flags)) {
> +                     next->s_fence->scheduled.timestamp =
> +                             job->s_fence->finished.timestamp;
> +             }
>        } else {
>                job = NULL;
>                /* queue timeout for next job */


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https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26 15:30 ` Wang, Kevin(Yang)
@ 2021-04-26 16:08   ` Christian König
  0 siblings, 0 replies; 32+ messages in thread
From: Christian König @ 2021-04-26 16:08 UTC (permalink / raw)
  To: Wang, Kevin(Yang), Sun, Roy, amd-gfx; +Cc: Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 4316 bytes --]



Am 26.04.21 um 17:30 schrieb Wang, Kevin(Yang):
>
> [AMD Official Use Only - Internal Distribution Only]
>
>
>
>
> ------------------------------------------------------------------------
> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of 
> Roy Sun <Roy.Sun@amd.com>
> *Sent:* Monday, April 26, 2021 2:27 PM
> *To:* amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
> *Cc:* Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
> *Subject:* [PATCH 1/2] drm/scheduler: Change scheduled fence track
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> ---
>  drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c 
> b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..f8e39ab0c41b 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct 
> drm_gpu_scheduler *sched)
>  EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>
>  /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of 
> jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of 
> jobs from pending list
>   *
>   * @sched: scheduler instance
>   * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler 
> *sched)
>  static struct drm_sched_job *
>  drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>  {
> -       struct drm_sched_job *job;
> +       struct drm_sched_job *job, *next;
>
>          /*
>           * Don't destroy jobs while the timeout worker is running  OR 
> thread
> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct 
> drm_gpu_scheduler *sched)
>          if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>                  /* remove job from pending_list */
>                  list_del_init(&job->list);
> We just need to record the scheduled time of the next job. So we
> need not to check the rest job.
>
> [kevin]:
> ok, it is fine for me with the timestamp flag check.
> Reviewed-by: Kevin Wang <kevin1.wang@amd.com>

Actually please drop that extra check.

The timestamp is guaranteed to be set on the next job or otherwise we 
wouldn't got here in the first place.

I've considered dropping the flag for quite a while and don't want any 
new users of this.

Christian.

>
> +               /* account for the next fence in the queue */
> +               next = list_first_entry_or_null(&sched->pending_list,
> +                               struct drm_sched_job, list);
> +               if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> + &job->s_fence->finished.flags)) {
> + next->s_fence->scheduled.timestamp =
> + job->s_fence->finished.timestamp;
> +               }
>          } else {
>                  job = NULL;
>                  /* queue timeout for next job */
> -- 
> 2.31.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CKevin1.Wang%40amd.com%7C0cebaf8d37e144c6b82108d9087c502e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637550152295564379%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Hdiil9BC2sp2pUI1121yZWELoCQqhDqTnbr7E9oVutw%3D&amp;reserved=0 
> <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CKevin1.Wang%40amd.com%7C0cebaf8d37e144c6b82108d9087c502e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637550152295564379%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Hdiil9BC2sp2pUI1121yZWELoCQqhDqTnbr7E9oVutw%3D&amp;reserved=0>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26  6:27 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun
  2021-04-26  6:49 ` Christian König
@ 2021-04-26 15:30 ` Wang, Kevin(Yang)
  2021-04-26 16:08   ` Christian König
  1 sibling, 1 reply; 32+ messages in thread
From: Wang, Kevin(Yang) @ 2021-04-26 15:30 UTC (permalink / raw)
  To: Sun, Roy, amd-gfx; +Cc: Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 3347 bytes --]

[AMD Official Use Only - Internal Distribution Only]



________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Roy Sun <Roy.Sun@amd.com>
Sent: Monday, April 26, 2021 2:27 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
Subject: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..f8e39ab0c41b 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);

 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-       struct drm_sched_job *job;
+       struct drm_sched_job *job, *next;

         /*
          * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
         if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
                 /* remove job from pending_list */
                 list_del_init(&job->list);
We just need to record the scheduled time of the next job. So we
need not to check the rest job.

[kevin]:
ok, it is fine for me with the timestamp flag check.
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>

+               /* account for the next fence in the queue */
+               next = list_first_entry_or_null(&sched->pending_list,
+                               struct drm_sched_job, list);
+               if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
+                       &job->s_fence->finished.flags)) {
+                       next->s_fence->scheduled.timestamp =
+                               job->s_fence->finished.timestamp;
+               }
         } else {
                 job = NULL;
                 /* queue timeout for next job */
--
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-26  6:27 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun
@ 2021-04-26  6:49 ` Christian König
  2021-04-26 19:24   ` Deucher, Alexander
  2021-04-26 15:30 ` Wang, Kevin(Yang)
  1 sibling, 1 reply; 32+ messages in thread
From: Christian König @ 2021-04-26  6:49 UTC (permalink / raw)
  To: Alex Deucher; +Cc: amd-gfx list, Roy Sun, David M Nieto

Hey Alex,

any objections that we merge those two patches through drm-misc-next?

Thanks,
Christian.

Am 26.04.21 um 08:27 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..f8e39ab0c41b 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>   
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -	struct drm_sched_job *job;
> +	struct drm_sched_job *job, *next;
>   
>   	/*
>   	 * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>   		/* remove job from pending_list */
>   		list_del_init(&job->list);
> We just need to record the scheduled time of the next job. So we
> need not to check the rest job.
> +		/* account for the next fence in the queue */
> +		next = list_first_entry_or_null(&sched->pending_list,
> +				struct drm_sched_job, list);
> +		if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
> +			&job->s_fence->finished.flags)) {
> +			next->s_fence->scheduled.timestamp =
> +				job->s_fence->finished.timestamp;
> +		}
>   	} else {
>   		job = NULL;
>   		/* queue timeout for next job */

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-26  6:27 Roy Sun
  2021-04-26  6:49 ` Christian König
  2021-04-26 15:30 ` Wang, Kevin(Yang)
  0 siblings, 2 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-26  6:27 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..f8e39ab0c41b 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
We just need to record the scheduled time of the next job. So we 
need not to check the rest job.
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
+			&job->s_fence->finished.flags)) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-23 10:55 Roy Sun
@ 2021-04-23 11:09 ` Wang, Kevin(Yang)
  0 siblings, 0 replies; 32+ messages in thread
From: Wang, Kevin(Yang) @ 2021-04-23 11:09 UTC (permalink / raw)
  To: Sun, Roy, amd-gfx; +Cc: Nieto, David M

[-- Attachment #1.1: Type: text/plain, Size: 3241 bytes --]

[AMD Official Use Only - Internal Distribution Only]



________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Roy Sun <Roy.Sun@amd.com>
Sent: Friday, April 23, 2021 6:55 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
Subject: [PATCH 1/2] drm/scheduler: Change scheduled fence track

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);

 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-       struct drm_sched_job *job;
+       struct drm_sched_job *job, *next;

         /*
          * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
         if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
                 /* remove job from pending_list */
                 list_del_init(&job->list);
+               /* account for the next fence in the queue */
+               next = list_first_entry_or_null(&sched->pending_list,
+                               struct drm_sched_job, list);
+               if (next) {
+                       next->s_fence->scheduled.timestamp =
+                               job->s_fence->finished.timestamp;
+               }

  1.  the timestamp maybe is invalid, we'd better check DMA_FENCE_FLAG_TIMESTAMP_BIT before use it .
  2.  when hw_submission > 2, do we need to check rest jobs? not only next.

Thanks,
Kevin.

         } else {
                 job = NULL;
                 /* queue timeout for next job */
--
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-23 10:55 Roy Sun
  2021-04-23 11:09 ` Wang, Kevin(Yang)
  0 siblings, 1 reply; 32+ messages in thread
From: Roy Sun @ 2021-04-23 10:55 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-23  9:19 Roy Sun
  0 siblings, 0 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-23  9:19 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---

This is the patch that just return the memory size.

 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-21  3:46 Roy Sun
@ 2021-04-22  7:06 ` Christian König
  0 siblings, 0 replies; 32+ messages in thread
From: Christian König @ 2021-04-22  7:06 UTC (permalink / raw)
  To: Roy Sun, amd-gfx; +Cc: David M Nieto



Am 21.04.21 um 05:46 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com> for the series.

> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
>   1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..dc05a20a8ef2 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>   
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -	struct drm_sched_job *job;
> +	struct drm_sched_job *job, *next;
>   
>   	/*
>   	 * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>   		/* remove job from pending_list */
>   		list_del_init(&job->list);
> +		/* account for the next fence in the queue */
> +		next = list_first_entry_or_null(&sched->pending_list,
> +				struct drm_sched_job, list);
> +		if (next) {
> +			next->s_fence->scheduled.timestamp =
> +				job->s_fence->finished.timestamp;
> +		}
>   	} else {
>   		job = NULL;
>   		/* queue timeout for next job */

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-21  8:03 Roy Sun
  0 siblings, 0 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-21  8:03 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-21  3:46 Roy Sun
  2021-04-22  7:06 ` Christian König
  0 siblings, 1 reply; 32+ messages in thread
From: Roy Sun @ 2021-04-21  3:46 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-20 11:51 Roy Sun
  0 siblings, 0 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-20 11:51 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..dc05a20a8ef2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-16 11:26 ` Christian König
@ 2021-04-16 13:50   ` Nirmoy
  0 siblings, 0 replies; 32+ messages in thread
From: Nirmoy @ 2021-04-16 13:50 UTC (permalink / raw)
  To: Christian König, Roy Sun, amd-gfx, Nirmoy Das; +Cc: David M Nieto


On 4/16/21 1:26 PM, Christian König wrote:
> Am 16.04.21 um 07:04 schrieb Roy Sun:
>> Update the timestamp of scheduled fence on HW
>> completion of the previous fences
>>
>> This allow more accurate tracking of the fence
>> execution in HW
>>
>> Signed-off-by: David M Nieto <david.nieto@amd.com>
>> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
>
> Reviewed-by: Christian König <christian.koenig@amd.com> for the series.
>
> Nirmoy if you are idle again could you give that a testing round? I 
> don't expect it to cause trouble, just want to double check that we 
> haven't forgotten taking a lock or stuff like that.
>

Looks good, Tested-by: Nirmoy Das <nirmoy.das@amd.com>. One minor typo 
below:


> Thanks,
> Christian.
>
>> ---
>>   drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
>>   1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c 
>> b/drivers/gpu/drm/scheduler/sched_main.c
>> index 92d8de24d0a1..4e5d8d4af010 100644
>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct 
>> drm_gpu_scheduler *sched)
>>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>>     /**
>> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of 
>> jobs from mirror ring list
>> + * drm_sched_resubmit_jobs_ext - helper to relunch certain number of 
>> jobs from pending list


relunch -> relaunch


Regards,

Nirmoy


>>    *
>>    * @sched: scheduler instance
>>    * @max: job numbers to relaunch
>> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler 
>> *sched)
>>   static struct drm_sched_job *
>>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>>   {
>> -    struct drm_sched_job *job;
>> +    struct drm_sched_job *job, *next;
>>         /*
>>        * Don't destroy jobs while the timeout worker is running OR 
>> thread
>> @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct 
>> drm_gpu_scheduler *sched)
>>       if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>>           /* remove job from pending_list */
>>           list_del_init(&job->list);
>> +        /* account for the next fence in the queue */
>> +        next = list_first_entry_or_null(&sched->pending_list,
>> +                struct drm_sched_job, list);
>> +        if (next) {
>> +            next->s_fence->scheduled.timestamp =
>> +                job->s_fence->finished.timestamp;
>> +        }
>>       } else {
>>           job = NULL;
>>           /* queue timeout for next job */
>
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^ permalink raw reply	[flat|nested] 32+ messages in thread

* Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track
  2021-04-16  5:04 Roy Sun
@ 2021-04-16 11:26 ` Christian König
  2021-04-16 13:50   ` Nirmoy
  0 siblings, 1 reply; 32+ messages in thread
From: Christian König @ 2021-04-16 11:26 UTC (permalink / raw)
  To: Roy Sun, amd-gfx, Nirmoy Das; +Cc: David M Nieto

Am 16.04.21 um 07:04 schrieb Roy Sun:
> Update the timestamp of scheduled fence on HW
> completion of the previous fences
>
> This allow more accurate tracking of the fence
> execution in HW
>
> Signed-off-by: David M Nieto <david.nieto@amd.com>
> Signed-off-by: Roy Sun <Roy.Sun@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com> for the series.

Nirmoy if you are idle again could you give that a testing round? I 
don't expect it to cause trouble, just want to double check that we 
haven't forgotten taking a lock or stuff like that.

Thanks,
Christian.

> ---
>   drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
>   1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> index 92d8de24d0a1..4e5d8d4af010 100644
> --- a/drivers/gpu/drm/scheduler/sched_main.c
> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
>   EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>   
>   /**
> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
> + * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list
>    *
>    * @sched: scheduler instance
>    * @max: job numbers to relaunch
> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
>   static struct drm_sched_job *
>   drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   {
> -	struct drm_sched_job *job;
> +	struct drm_sched_job *job, *next;
>   
>   	/*
>   	 * Don't destroy jobs while the timeout worker is running  OR thread
> @@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
>   	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
>   		/* remove job from pending_list */
>   		list_del_init(&job->list);
> +		/* account for the next fence in the queue */
> +		next = list_first_entry_or_null(&sched->pending_list,
> +				struct drm_sched_job, list);
> +		if (next) {
> +			next->s_fence->scheduled.timestamp =
> +				job->s_fence->finished.timestamp;
> +		}
>   	} else {
>   		job = NULL;
>   		/* queue timeout for next job */

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-16  5:04 Roy Sun
  2021-04-16 11:26 ` Christian König
  0 siblings, 1 reply; 32+ messages in thread
From: Roy Sun @ 2021-04-16  5:04 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-14 13:59 Roy Sun
  0 siblings, 0 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-14 13:59 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-13 12:14 Roy Sun
  0 siblings, 0 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-13 12:14 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

* [PATCH 1/2] drm/scheduler: Change scheduled fence track
@ 2021-04-12 12:57 Roy Sun
  0 siblings, 0 replies; 32+ messages in thread
From: Roy Sun @ 2021-04-12 12:57 UTC (permalink / raw)
  To: amd-gfx; +Cc: Roy Sun, David M Nieto

Update the timestamp of scheduled fence on HW
completion of the previous fences

This allow more accurate tracking of the fence
execution in HW

Signed-off-by: David M Nieto <david.nieto@amd.com>
Signed-off-by: Roy Sun <Roy.Sun@amd.com>
---
 drivers/gpu/drm/scheduler/sched_main.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
index 92d8de24d0a1..4e5d8d4af010 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_scheduler *sched)
 EXPORT_SYMBOL(drm_sched_resubmit_jobs);
 
 /**
- * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from mirror ring list
+ * drm_sched_resubmit_jobs_ext - helper to relunch certain number of jobs from pending list
  *
  * @sched: scheduler instance
  * @max: job numbers to relaunch
@@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *sched)
 static struct drm_sched_job *
 drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 {
-	struct drm_sched_job *job;
+	struct drm_sched_job *job, *next;
 
 	/*
 	 * Don't destroy jobs while the timeout worker is running  OR thread
@@ -690,6 +690,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched)
 	if (job && dma_fence_is_signaled(&job->s_fence->finished)) {
 		/* remove job from pending_list */
 		list_del_init(&job->list);
+		/* account for the next fence in the queue */
+		next = list_first_entry_or_null(&sched->pending_list,
+				struct drm_sched_job, list);
+		if (next) {
+			next->s_fence->scheduled.timestamp =
+				job->s_fence->finished.timestamp;
+		}
 	} else {
 		job = NULL;
 		/* queue timeout for next job */
-- 
2.31.1

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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 32+ messages in thread

end of thread, back to index

Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-19  6:26 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun
2021-04-19  6:26 ` [PATCH 2/2] drm/amdgpu: Add show_fdinfo() interface Roy Sun
2021-04-20  8:53   ` Sun, Roy
2021-04-20  9:32     ` Deng, Emily
2021-04-20  9:57   ` Christian König
  -- strict thread matches above, loose matches on Subject: below --
2021-04-26  6:27 [PATCH 1/2] drm/scheduler: Change scheduled fence track Roy Sun
2021-04-26  6:49 ` Christian König
2021-04-26 19:24   ` Deucher, Alexander
2021-04-26 19:40     ` Deucher, Alexander
2021-04-26 19:48       ` Christian König
2021-04-26 19:51         ` Deucher, Alexander
2021-04-28  8:32           ` Deng, Emily
2021-04-28  9:06             ` Christian König
2021-04-28  9:15               ` Deng, Emily
2021-05-04 20:23               ` Alex Deucher
2021-05-05  7:27                 ` Christian König
2021-05-05 19:55                   ` Nieto, David M
2021-04-26 15:30 ` Wang, Kevin(Yang)
2021-04-26 16:08   ` Christian König
2021-04-23 10:55 Roy Sun
2021-04-23 11:09 ` Wang, Kevin(Yang)
2021-04-23  9:19 Roy Sun
2021-04-21  8:03 Roy Sun
2021-04-21  3:46 Roy Sun
2021-04-22  7:06 ` Christian König
2021-04-20 11:51 Roy Sun
2021-04-16  5:04 Roy Sun
2021-04-16 11:26 ` Christian König
2021-04-16 13:50   ` Nirmoy
2021-04-14 13:59 Roy Sun
2021-04-13 12:14 Roy Sun
2021-04-12 12:57 Roy Sun

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