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Tue, 21 Sep 2021 18:07:41 +0000 Received: from tr4.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Tue, 21 Sep 2021 13:07:41 -0500 From: Alex Deucher To: CC: Alex Deucher Subject: [PATCH 03/66] drm/amdgpu: store HW IP versions in the driver structure Date: Tue, 21 Sep 2021 14:06:22 -0400 Message-ID: <20210921180725.1985552-4-alexander.deucher@amd.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210921180725.1985552-1-alexander.deucher@amd.com> References: <20210921180725.1985552-1-alexander.deucher@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a1e8f58f-8227-414b-22d7-08d97d2ab466 X-MS-TrafficTypeDiagnostic: CH0PR12MB5090: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:854; 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CAT:NONE; SFS:(4636009)(46966006)(36840700001)(83380400001)(86362001)(8936002)(2906002)(6666004)(8676002)(508600001)(4326008)(26005)(70206006)(70586007)(356005)(6916009)(7696005)(47076005)(5660300002)(426003)(316002)(186003)(16526019)(81166007)(36756003)(336012)(82310400003)(2616005)(36860700001)(1076003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Sep 2021 18:07:41.7527 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a1e8f58f-8227-414b-22d7-08d97d2ab466 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5090 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" So we can check the IP versions directly rather than using asic type. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++++ drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 - 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index cdb963b9bea0..61ef0d81a957 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -760,6 +760,9 @@ enum amd_hw_ip_block_type { #define HWIP_MAX_INSTANCE 10 +#define HW_ID_MAX 300 +#define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv)) + struct amd_powerplay { void *pp_handle; const struct amd_pm_funcs *pp_funcs; @@ -1090,6 +1093,7 @@ struct amdgpu_device { struct pci_saved_state *pci_state; struct amdgpu_reset_control *reset_cntl; + uint32_t ip_versions[HW_ID_MAX]; }; static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index f55613611a02..67e7a46f5020 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -30,7 +30,6 @@ #define mmMM_INDEX 0x0 #define mmMM_INDEX_HI 0x6 #define mmMM_DATA 0x1 -#define HW_ID_MAX 300 static const char *hw_id_names[HW_ID_MAX] = { [MP1_HWID] = "MP1", -- 2.31.1