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From: Anson Jacob <Anson.Jacob@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Harry.Wentland@amd.com>, <Sunpeng.Li@amd.com>,
	<Bhawanpreet.Lakha@amd.com>, <Rodrigo.Siqueira@amd.com>,
	<Aurabindo.Pillai@amd.com>, <qingqing.zhuo@amd.com>,
	<mikita.lipski@amd.com>,  <roman.li@amd.com>,
	<Anson.Jacob@amd.com>, <wayne.lin@amd.com>, <stylon.wang@amd.com>,
	<solomon.chiu@amd.com>, Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Subject: [PATCH 18/24] drm/amd/display: Replace referral of dal with dc
Date: Fri, 24 Sep 2021 15:09:28 -0400	[thread overview]
Message-ID: <20210924190934.1193379-19-Anson.Jacob@amd.com> (raw)
In-Reply-To: <20210924190934.1193379-1-Anson.Jacob@amd.com>

From: Qingqing Zhuo <Qingqing.Zhuo@amd.com>

[Why]
DC should be used in place of DAL in
upstream.

[How]
Replace dal with dc in function names.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
---
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 2 +-
 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c    | 2 +-
 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c | 2 +-
 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h | 2 +-
 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c | 2 +-
 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
index 315466f5aade..2108bff49d4e 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
@@ -243,7 +243,7 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base,
 		pp_smu = &dc->res_pool->pp_smu->nv_funcs;
 
 	for (irq_src = DC_IRQ_SOURCE_HPD1; irq_src <= DC_IRQ_SOURCE_HPD6; irq_src++) {
-		hpd_state = dal_get_hpd_state_dcn20(dc->res_pool->irqs, irq_src);
+		hpd_state = dc_get_hpd_state_dcn20(dc->res_pool->irqs, irq_src);
 		if (hpd_state)
 			break;
 	}
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index 3fabf32a0558..ac2d4c4f04e4 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -152,7 +152,7 @@ void rn_update_clocks(struct clk_mgr *clk_mgr_base,
 			display_count = rn_get_active_display_cnt_wa(dc, context);
 
 			for (irq_src = DC_IRQ_SOURCE_HPD1; irq_src <= DC_IRQ_SOURCE_HPD5; irq_src++) {
-				hpd_state = dal_get_hpd_state_dcn21(dc->res_pool->irqs, irq_src);
+				hpd_state = dc_get_hpd_state_dcn21(dc->res_pool->irqs, irq_src);
 				if (hpd_state)
 					break;
 			}
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
index 49d87fe5c167..9ccafe007b23 100644
--- a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
+++ b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
@@ -132,7 +132,7 @@ enum dc_irq_source to_dal_irq_source_dcn20(
 	}
 }
 
-uint32_t dal_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source)
+uint32_t dc_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source)
 {
 	const struct irq_source_info *info;
 	uint32_t addr;
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h
index f60a203e7188..4d69ab24ca25 100644
--- a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h
+++ b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h
@@ -31,6 +31,6 @@
 struct irq_service *dal_irq_service_dcn20_create(
 	struct irq_service_init_data *init_data);
 
-uint32_t dal_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source);
+uint32_t dc_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source);
 
 #endif
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
index 685528734575..78940cb20e10 100644
--- a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
+++ b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
@@ -135,7 +135,7 @@ enum dc_irq_source to_dal_irq_source_dcn21(
 	return DC_IRQ_SOURCE_INVALID;
 }
 
-uint32_t dal_get_hpd_state_dcn21(struct irq_service *irq_service, enum dc_irq_source source)
+uint32_t dc_get_hpd_state_dcn21(struct irq_service *irq_service, enum dc_irq_source source)
 {
 	const struct irq_source_info *info;
 	uint32_t addr;
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h
index 3df2ceeb2b70..616470e32380 100644
--- a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h
+++ b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.h
@@ -31,6 +31,6 @@
 struct irq_service *dal_irq_service_dcn21_create(
 	struct irq_service_init_data *init_data);
 
-uint32_t dal_get_hpd_state_dcn21(struct irq_service *irq_service, enum dc_irq_source source);
+uint32_t dc_get_hpd_state_dcn21(struct irq_service *irq_service, enum dc_irq_source source);
 
 #endif
-- 
2.25.1


  parent reply	other threads:[~2021-09-24 19:10 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-24 19:09 [PATCH 00/24] DC Patches Sep 24, 2021 Anson Jacob
2021-09-24 19:09 ` [PATCH 01/24] drm/amd/display: use correct vpg instance for 128b/132b encoding Anson Jacob
2021-09-24 19:09 ` [PATCH 02/24] drm/amd/display: [FW Promotion] Release 0.0.85 Anson Jacob
2021-09-24 19:09 ` [PATCH 03/24] drm/amd/display: Don't enable AFMT for DP audio stream Anson Jacob
2021-09-24 19:09 ` [PATCH 04/24] drm/amd/display: add vsync notify to dmub for abm pause Anson Jacob
2021-09-24 19:09 ` [PATCH 05/24] drm/amd/display: Add debug support to override the Minimum DRAM Clock Anson Jacob
2021-09-24 19:09 ` [PATCH 06/24] drm/amd/display: update cur_lane_setting to an array one for each lane Anson Jacob
2021-09-24 19:09 ` [PATCH 07/24] drm/amd/display: add function to convert hw to dpcd lane settings Anson Jacob
2021-09-24 19:09 ` [PATCH 08/24] drm/amd/display: implement decide " Anson Jacob
2021-09-24 19:09 ` [PATCH 09/24] drm/amd/display: rename lane_settings to hw_lane_settings Anson Jacob
2021-09-24 19:09 ` [PATCH 10/24] drm/amd/display: decouple hw_lane_settings from dpcd_lane_settings Anson Jacob
2021-09-24 19:09 ` [PATCH 11/24] drm/amd/display: add two lane settings training options Anson Jacob
2021-09-24 19:09 ` [PATCH 12/24] drm/amd/display: Fix for link encoder access for MST Anson Jacob
2021-09-24 19:09 ` [PATCH 13/24] drm/amd/display: Fix MST link encoder availability check Anson Jacob
2021-09-24 19:09 ` [PATCH 14/24] drm/amd/display: Add PPS immediate update flag for DCN2 Anson Jacob
2021-09-24 19:09 ` [PATCH 15/24] drm/amd/display: Add an extra check for dcn10 OPTC data format Anson Jacob
2021-09-24 19:09 ` [PATCH 16/24] drm/amd/display: [FW Promotion] Release 0.0.86 Anson Jacob
2021-09-24 19:09 ` [PATCH 17/24] drm/amd/display: 3.2.155 Anson Jacob
2021-09-24 19:09 ` Anson Jacob [this message]
2021-09-24 19:09 ` [PATCH 19/24] drm/amd/display: Defer LUT memory powerdown until LUT bypass latches Anson Jacob
2021-09-24 19:09 ` [PATCH 20/24] drm/amd/display: initialize backlight_ramping_override to false Anson Jacob
2021-09-24 19:09 ` [PATCH 21/24] drm/amd/display: make verified link cap not exceeding max link cap Anson Jacob
2021-09-24 19:09 ` [PATCH 22/24] drm/amd/display: Handle Y carry-over in VCP X.Y calculation Anson Jacob
2021-09-24 19:09 ` [PATCH 23/24] drm/amd/display: Update VCP X.Y logging to improve usefulness Anson Jacob
2021-09-24 19:09 ` [PATCH 24/24] drm/amd/display: Pass PCI deviceid into DC Anson Jacob
2021-09-27 13:21 ` [PATCH 00/24] DC Patches Sep 24, 2021 Wheeler, Daniel

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