From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, solomon.chiu@amd.com, Aurabindo.Pillai@amd.com,
wayne.lin@amd.com, Bhawanpreet.Lakha@amd.com,
agustin.gutierrez@amd.com, pavle.kotarac@amd.com
Subject: [PATCH 26/31] drm/amd/display: Move ntuple to insert entry
Date: Fri, 15 Jul 2022 14:17:00 -0400 [thread overview]
Message-ID: <20220715181705.1030401-27-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20220715181705.1030401-1-Rodrigo.Siqueira@amd.com>
Move get_optimal_ntuple to the FPU code and call it inside
insert_entry_into_table_sorted.
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 28 -------------------
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 25 +++++++++++++++++
2 files changed, 25 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
index 32edb3e5715a..adcc83e6ea55 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
@@ -1956,29 +1956,6 @@ void dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context,
DC_FP_END();
}
-static void get_optimal_ntuple(struct _vcs_dpi_voltage_scaling_st *entry)
-{
- if (entry->dcfclk_mhz > 0) {
- float bw_on_sdp = entry->dcfclk_mhz * dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_sdp_bw_after_urgent / 100);
-
- entry->fabricclk_mhz = bw_on_sdp / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_fabric_bw_after_urgent / 100));
- entry->dram_speed_mts = bw_on_sdp / (dcn3_2_soc.num_chans *
- dcn3_2_soc.dram_channel_width_bytes * ((float)dcn3_2_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only / 100));
- } else if (entry->fabricclk_mhz > 0) {
- float bw_on_fabric = entry->fabricclk_mhz * dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_fabric_bw_after_urgent / 100);
-
- entry->dcfclk_mhz = bw_on_fabric / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_sdp_bw_after_urgent / 100));
- entry->dram_speed_mts = bw_on_fabric / (dcn3_2_soc.num_chans *
- dcn3_2_soc.dram_channel_width_bytes * ((float)dcn3_2_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only / 100));
- } else if (entry->dram_speed_mts > 0) {
- float bw_on_dram = entry->dram_speed_mts * dcn3_2_soc.num_chans *
- dcn3_2_soc.dram_channel_width_bytes * ((float)dcn3_2_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only / 100);
-
- entry->fabricclk_mhz = bw_on_dram / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_fabric_bw_after_urgent / 100));
- entry->dcfclk_mhz = bw_on_dram / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_sdp_bw_after_urgent / 100));
- }
-}
-
static void remove_entry_from_table_at_index(struct _vcs_dpi_voltage_scaling_st *table, unsigned int *num_entries,
unsigned int index)
{
@@ -2062,7 +2039,6 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params,
entry.fabricclk_mhz = 0;
entry.dram_speed_mts = 0;
- get_optimal_ntuple(&entry);
DC_FP_START();
insert_entry_into_table_sorted(table, num_entries, &entry);
DC_FP_END();
@@ -2073,7 +2049,6 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params,
entry.fabricclk_mhz = 0;
entry.dram_speed_mts = 0;
- get_optimal_ntuple(&entry);
DC_FP_START();
insert_entry_into_table_sorted(table, num_entries, &entry);
DC_FP_END();
@@ -2084,7 +2059,6 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params,
entry.fabricclk_mhz = 0;
entry.dram_speed_mts = bw_params->clk_table.entries[i].memclk_mhz * 16;
- get_optimal_ntuple(&entry);
DC_FP_START();
insert_entry_into_table_sorted(table, num_entries, &entry);
DC_FP_END();
@@ -2097,7 +2071,6 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params,
entry.fabricclk_mhz = bw_params->clk_table.entries[i].fclk_mhz;
entry.dram_speed_mts = 0;
- get_optimal_ntuple(&entry);
DC_FP_START();
insert_entry_into_table_sorted(table, num_entries, &entry);
DC_FP_END();
@@ -2109,7 +2082,6 @@ static int build_synthetic_soc_states(struct clk_bw_params *bw_params,
entry.fabricclk_mhz = max_fclk_mhz;
entry.dram_speed_mts = 0;
- get_optimal_ntuple(&entry);
DC_FP_START();
insert_entry_into_table_sorted(table, num_entries, &entry);
DC_FP_END();
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index 66102db87265..7c60a954737b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -353,6 +353,29 @@ static float calculate_net_bw_in_kbytes_sec(struct _vcs_dpi_voltage_scaling_st *
return limiting_bw_kbytes_sec;
}
+static void get_optimal_ntuple(struct _vcs_dpi_voltage_scaling_st *entry)
+{
+ if (entry->dcfclk_mhz > 0) {
+ float bw_on_sdp = entry->dcfclk_mhz * dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_sdp_bw_after_urgent / 100);
+
+ entry->fabricclk_mhz = bw_on_sdp / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_fabric_bw_after_urgent / 100));
+ entry->dram_speed_mts = bw_on_sdp / (dcn3_2_soc.num_chans *
+ dcn3_2_soc.dram_channel_width_bytes * ((float)dcn3_2_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only / 100));
+ } else if (entry->fabricclk_mhz > 0) {
+ float bw_on_fabric = entry->fabricclk_mhz * dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_fabric_bw_after_urgent / 100);
+
+ entry->dcfclk_mhz = bw_on_fabric / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_sdp_bw_after_urgent / 100));
+ entry->dram_speed_mts = bw_on_fabric / (dcn3_2_soc.num_chans *
+ dcn3_2_soc.dram_channel_width_bytes * ((float)dcn3_2_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only / 100));
+ } else if (entry->dram_speed_mts > 0) {
+ float bw_on_dram = entry->dram_speed_mts * dcn3_2_soc.num_chans *
+ dcn3_2_soc.dram_channel_width_bytes * ((float)dcn3_2_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only / 100);
+
+ entry->fabricclk_mhz = bw_on_dram / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_fabric_bw_after_urgent / 100));
+ entry->dcfclk_mhz = bw_on_dram / (dcn3_2_soc.return_bus_width_bytes * ((float)dcn3_2_soc.pct_ideal_sdp_bw_after_urgent / 100));
+ }
+}
+
void insert_entry_into_table_sorted(struct _vcs_dpi_voltage_scaling_st *table,
unsigned int *num_entries,
struct _vcs_dpi_voltage_scaling_st *entry)
@@ -363,6 +386,8 @@ void insert_entry_into_table_sorted(struct _vcs_dpi_voltage_scaling_st *table,
dc_assert_fp_enabled();
+ get_optimal_ntuple(entry);
+
if (*num_entries == 0) {
table[0] = *entry;
(*num_entries)++;
--
2.37.0
next prev parent reply other threads:[~2022-07-16 14:40 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 18:16 [PATCH 00/31] DC Patches July 15, 2022 Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 01/31] drm/amd/display: Support vertical interrupt 0 for all dcn ASIC Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 02/31] drm/amd/display: Remove unused variable Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 03/31] drm/amd/display: Update in dml Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 04/31] drm/amd/display: Expose function reset_cur_dp_mst_topology Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 05/31] drm/amd/display: fix trigger_hotplug to support mst case Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 06/31] drm/amd/display: Add is_mst_connector debugfs entry Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 07/31] drm/amd/display: Add tags for indicating mst progress status Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 08/31] drm/amd/display: Create a file dedicated to planes Rodrigo Siqueira
2022-07-18 14:29 ` Alex Deucher
2022-07-18 14:55 ` Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 09/31] drm/amd/display: Create a file dedicated for CRTC Rodrigo Siqueira
2022-07-20 17:36 ` André Almeida
2022-07-15 18:16 ` [PATCH 10/31] drm/amd/display: remove number of DSC slices override in DML Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 11/31] drm/amd/display: Fix hard hang if DSC is disabled Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 12/31] drm/amd/display: Don't set dram clock change requirement for SubVP Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 13/31] drm/amd/display: Update de-tile override to anticipate pipe splitting Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 14/31] drm/amd/display: Disable GPUVM in IP resource configuration Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 15/31] drm/amd/display: Loop through all pipes for DET allocation Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 16/31] drm/amd/display: Update Cursor Attribute MALL cache Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 17/31] drm/amd/display: Update DML logic for unbounded req handling Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 18/31] drm/amd/display: Drop FPU flags from dcn32_clk_mgr Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 19/31] drm/amd/display: Move populate phaton function to dml Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 20/31] drm/amd/display: Move predict pipe to dml fpu folder Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 21/31] drm/amd/display: Move insert entry table to the FPU code Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 22/31] drm/amd/display: Move phanton stream to " Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 23/31] drm/amd/display: Move SubVP functions to dcn32_fpu Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 24/31] drm/amd/display: Move wm and dlg calculation to FPU code Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 25/31] drm/amd/display: Move dlg params calculation Rodrigo Siqueira
2022-07-15 18:17 ` Rodrigo Siqueira [this message]
2022-07-15 18:17 ` [PATCH 27/31] drm/amd/display: Move bounding box to FPU folder Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 28/31] drm/amd/display: Drop FPU flags from dcn32 Makefile Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 29/31] drm/amd/display: Create dcn321_fpu file Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 30/31] drm/amd/display: Drop FPU code from dcn321 resource Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 31/31] drm/amd/display: 3.2.195 Rodrigo Siqueira
2022-07-18 13:15 ` [PATCH 00/31] DC Patches July 15, 2022 Wheeler, Daniel
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