From: Melissa Wen <mwen@igalia.com>
To: amd-gfx@lists.freedesktop.org,
Harry Wentland <harry.wentland@amd.com>,
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
sunpeng.li@amd.com, Alex Deucher <alexander.deucher@amd.com>,
dri-devel@lists.freedesktop.org, christian.koenig@amd.com,
Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch
Cc: Sebastian Wick <sebastian.wick@redhat.com>,
Pekka Paalanen <pekka.paalanen@collabora.com>,
Shashank Sharma <Shashank.Sharma@amd.com>,
Alex Hung <alex.hung@amd.com>, Simon Ser <contact@emersion.fr>,
Xaver Hugl <xaver.hugl@gmail.com>,
kernel-dev@igalia.com,
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
Joshua Ashton <joshua@froggi.es>,
sungjoon.kim@amd.com
Subject: [PATCH v3 12/32] drm/amd/display: add CRTC gamma TF driver-specific property
Date: Mon, 25 Sep 2023 18:49:12 -0100 [thread overview]
Message-ID: <20230925194932.1329483-13-mwen@igalia.com> (raw)
In-Reply-To: <20230925194932.1329483-1-mwen@igalia.com>
Add AMD pre-defined transfer function property to default DRM CRTC
gamma to convert to wire encoding with or without a user gamma LUT.
There is no post-blending regamma ROM for pre-defined TF. When setting
blend TF (!= Identity) and LUT at the same time, the color module will
combine the pre-defined TF and the custom LUT values into the LUT that's
actually programmed.
v2:
- enable CRTC prop in the end of driver-specific prop sequence
- define inverse EOTFs as supported regamma TFs
- reword driver-specific function doc to remove shaper/3D LUT
v3:
- spell out TF+LUT behavior in the commit and comments (Harry)
Co-developed-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Melissa Wen <mwen@igalia.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 7 ++
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 8 +++
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 7 ++
.../amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 72 +++++++++++++++++++
4 files changed, 94 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index f333102845b7..2587847ae318 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -423,6 +423,13 @@ struct amdgpu_mode_info {
* from a combination of pre-defined TF and the custom 1D LUT).
*/
struct drm_property *plane_blend_tf_property;
+ /* @regamma_tf_property: Transfer function for CRTC regamma
+ * (post-blending). Possible values are defined by `enum
+ * amdgpu_transfer_function`. There is no regamma ROM, but we can use
+ * AMD color modules to program LUT parameters from predefined TF (or
+ * from a combination of pre-defined TF and the custom 1D LUT).
+ */
+ struct drm_property *regamma_tf_property;
};
#define AMDGPU_MAX_BL_LEVEL 0xFF
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 0d6f7b0f47bc..0140f4fb903e 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -825,6 +825,14 @@ struct dm_crtc_state {
struct dc_info_packet vrr_infopacket;
int abm_level;
+
+ /**
+ * @regamma_tf:
+ *
+ * Pre-defined transfer function for converting internal FB -> wire
+ * encoding.
+ */
+ enum amdgpu_transfer_function regamma_tf;
};
#define to_dm_crtc_state(x) container_of(x, struct dm_crtc_state, base)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index b76d1eb82267..c9bfb80e9073 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -271,6 +271,13 @@ amdgpu_dm_create_color_properties(struct amdgpu_device *adev)
return -ENOMEM;
adev->mode_info.plane_blend_tf_property = prop;
+ prop = amdgpu_create_tf_property(adev_to_drm(adev),
+ "AMD_CRTC_REGAMMA_TF",
+ amdgpu_inv_eotf);
+ if (!prop)
+ return -ENOMEM;
+ adev->mode_info.regamma_tf_property = prop;
+
return 0;
}
#endif
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index fb51ec4f8d31..128e37ed5397 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@ -260,6 +260,7 @@ static struct drm_crtc_state *dm_crtc_duplicate_state(struct drm_crtc *crtc)
state->freesync_config = cur->freesync_config;
state->cm_has_degamma = cur->cm_has_degamma;
state->cm_is_degamma_srgb = cur->cm_is_degamma_srgb;
+ state->regamma_tf = cur->regamma_tf;
state->crc_skip_count = cur->crc_skip_count;
state->mpo_requested = cur->mpo_requested;
/* TODO Duplicate dc_stream after objects are stream object is flattened */
@@ -296,6 +297,70 @@ static int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc)
}
#endif
+#ifdef AMD_PRIVATE_COLOR
+/**
+ * drm_crtc_additional_color_mgmt - enable additional color properties
+ * @crtc: DRM CRTC
+ *
+ * This function lets the driver enable post-blending CRTC regamma transfer
+ * function property in addition to DRM CRTC gamma LUT. Default value means
+ * linear transfer function, which is the default CRTC gamma LUT behaviour
+ * without this property.
+ */
+static void
+dm_crtc_additional_color_mgmt(struct drm_crtc *crtc)
+{
+ struct amdgpu_device *adev = drm_to_adev(crtc->dev);
+
+ if(adev->dm.dc->caps.color.mpc.ogam_ram)
+ drm_object_attach_property(&crtc->base,
+ adev->mode_info.regamma_tf_property,
+ AMDGPU_TRANSFER_FUNCTION_DEFAULT);
+}
+
+static int
+amdgpu_dm_atomic_crtc_set_property(struct drm_crtc *crtc,
+ struct drm_crtc_state *state,
+ struct drm_property *property,
+ uint64_t val)
+{
+ struct amdgpu_device *adev = drm_to_adev(crtc->dev);
+ struct dm_crtc_state *acrtc_state = to_dm_crtc_state(state);
+
+ if (property == adev->mode_info.regamma_tf_property) {
+ if (acrtc_state->regamma_tf != val) {
+ acrtc_state->regamma_tf = val;
+ acrtc_state->base.color_mgmt_changed |= 1;
+ }
+ } else {
+ drm_dbg_atomic(crtc->dev,
+ "[CRTC:%d:%s] unknown property [PROP:%d:%s]]\n",
+ crtc->base.id, crtc->name,
+ property->base.id, property->name);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int
+amdgpu_dm_atomic_crtc_get_property(struct drm_crtc *crtc,
+ const struct drm_crtc_state *state,
+ struct drm_property *property,
+ uint64_t *val)
+{
+ struct amdgpu_device *adev = drm_to_adev(crtc->dev);
+ struct dm_crtc_state *acrtc_state = to_dm_crtc_state(state);
+
+ if (property == adev->mode_info.regamma_tf_property)
+ *val = acrtc_state->regamma_tf;
+ else
+ return -EINVAL;
+
+ return 0;
+}
+#endif
+
/* Implemented only the options currently available for the driver */
static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = {
.reset = dm_crtc_reset_state,
@@ -314,6 +379,10 @@ static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = {
#if defined(CONFIG_DEBUG_FS)
.late_register = amdgpu_dm_crtc_late_register,
#endif
+#ifdef AMD_PRIVATE_COLOR
+ .atomic_set_property = amdgpu_dm_atomic_crtc_set_property,
+ .atomic_get_property = amdgpu_dm_atomic_crtc_get_property,
+#endif
};
static void dm_crtc_helper_disable(struct drm_crtc *crtc)
@@ -477,6 +546,9 @@ int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
drm_mode_crtc_set_gamma_size(&acrtc->base, MAX_COLOR_LEGACY_LUT_ENTRIES);
+#ifdef AMD_PRIVATE_COLOR
+ dm_crtc_additional_color_mgmt(&acrtc->base);
+#endif
return 0;
fail:
--
2.40.1
next prev parent reply other threads:[~2023-09-25 19:50 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-25 19:49 [PATCH v3 00/32] drm/amd/display: add AMD driver-specific properties for color mgmt Melissa Wen
2023-09-25 19:49 ` [PATCH v3 01/32] drm/drm_mode_object: increase max objects to accommodate new color props Melissa Wen
2023-09-25 19:49 ` [PATCH v3 02/32] drm/drm_property: make replace_property_blob_from_id a DRM helper Melissa Wen
2023-09-25 19:49 ` [PATCH v3 03/32] drm/drm_plane: track color mgmt changes per plane Melissa Wen
2023-09-25 19:49 ` [PATCH v3 04/32] drm/amd/display: add driver-specific property for plane degamma LUT Melissa Wen
2023-09-25 19:49 ` [PATCH v3 05/32] drm/amd/display: add plane degamma TF driver-specific property Melissa Wen
2023-09-25 19:49 ` [PATCH v3 06/32] drm/amd/display: explicitly define EOTF and inverse EOTF Melissa Wen
2023-09-25 19:49 ` [PATCH v3 07/32] drm/amd/display: document AMDGPU pre-defined transfer functions Melissa Wen
2023-09-28 20:16 ` Harry Wentland
2023-09-29 7:35 ` Pekka Paalanen
2023-09-29 13:08 ` Harry Wentland
2023-09-25 19:49 ` [PATCH v3 08/32] drm/amd/display: add plane HDR multiplier driver-specific property Melissa Wen
2023-09-25 19:49 ` [PATCH v3 09/32] drm/amd/display: add plane 3D LUT driver-specific properties Melissa Wen
2023-09-27 18:47 ` Harry Wentland
2023-10-03 16:17 ` Melissa Wen
2023-09-25 19:49 ` [PATCH v3 10/32] drm/amd/display: add plane shaper LUT and TF " Melissa Wen
2023-09-25 19:49 ` [PATCH v3 11/32] drm/amd/display: add plane blend " Melissa Wen
2023-09-25 19:49 ` Melissa Wen [this message]
2023-09-25 19:49 ` [PATCH v3 13/32] drm/amd/display: add comments to describe DM crtc color mgmt behavior Melissa Wen
2023-09-25 19:49 ` [PATCH v3 14/32] drm/amd/display: encapsulate atomic regamma operation Melissa Wen
2023-09-25 19:49 ` [PATCH v3 15/32] drm/amd/display: add CRTC gamma TF support Melissa Wen
2023-09-25 19:49 ` [PATCH v3 16/32] drm/amd/display: set sdr_ref_white_level to 80 for out_transfer_func Melissa Wen
2023-09-25 19:49 ` [PATCH v3 17/32] drm/amd/display: mark plane as needing reset if color props change Melissa Wen
2023-09-25 19:49 ` [PATCH v3 18/32] drm/amd/display: decouple steps for mapping CRTC degamma to DC plane Melissa Wen
2023-09-25 19:49 ` [PATCH v3 19/32] drm/amd/display: add plane degamma TF and LUT support Melissa Wen
2023-09-25 19:49 ` [PATCH v3 20/32] drm/amd/display: reject atomic commit if setting both plane and CRTC degamma Melissa Wen
2023-09-25 19:49 ` [PATCH v3 21/32] drm/amd/display: add dc_fixpt_from_s3132 helper Melissa Wen
2023-09-25 19:49 ` [PATCH v3 22/32] drm/amd/display: add HDR multiplier support Melissa Wen
2023-09-25 19:49 ` [PATCH v3 23/32] drm/amd/display: add plane shaper LUT support Melissa Wen
2023-09-27 18:47 ` Harry Wentland
2023-09-25 19:49 ` [PATCH v3 24/32] drm/amd/display: add plane shaper TF support Melissa Wen
2023-09-25 19:49 ` [PATCH v3 25/32] drm/amd/display: add plane 3D LUT support Melissa Wen
2023-09-25 19:49 ` [PATCH v3 26/32] drm/amd/display: handle empty LUTs in __set_input_tf Melissa Wen
2023-09-25 19:49 ` [PATCH v3 27/32] drm/amd/display: add plane blend LUT and TF support Melissa Wen
2023-09-25 19:49 ` [PATCH v3 28/32] drm/amd/display: allow newer DC hardware to use degamma ROM for PQ/HLG Melissa Wen
2023-09-27 18:49 ` Harry Wentland
2023-09-25 19:49 ` [PATCH v3 29/32] drm/amd/display: copy 3D LUT settings from crtc state to stream_update Melissa Wen
2023-09-25 19:49 ` [PATCH v3 30/32] drm/amd/display: add plane CTM driver-specific property Melissa Wen
2023-09-25 19:49 ` [PATCH v3 31/32] drm/amd/display: add plane CTM support Melissa Wen
2023-09-27 18:52 ` Harry Wentland
2023-09-25 19:49 ` [PATCH v3 32/32] drm/amd/display: Add 3x4 CTM support for plane CTM Melissa Wen
2023-09-27 18:53 ` Harry Wentland
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