From: Aurabindo Pillai <aurabindo.pillai@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, chiahsuan.chung@amd.com, Sunpeng.Li@amd.com,
George Shen <george.shen@amd.com>,
Rodrigo.Siqueira@amd.com, roman.li@amd.com, jerry.zuo@amd.com,
Aurabindo.Pillai@amd.com, hersenxs.wu@amd.com, wayne.lin@amd.com,
Ran Shi <ran.shi@amd.com>,
Harry.Wentland@amd.com, agustin.gutierrez@amd.com
Subject: [PATCH 03/13] drm/amd/display: allow DP40 cables to do UHBR13.5
Date: Wed, 6 Dec 2023 14:52:24 -0500 [thread overview]
Message-ID: <20231206195234.182989-4-aurabindo.pillai@amd.com> (raw)
In-Reply-To: <20231206195234.182989-1-aurabindo.pillai@amd.com>
From: Ran Shi <ran.shi@amd.com>
why:
With DP2.1a expansion we are allowing DP40 cables to do UHBR13.5
how:
Assume UHBR10 means UHBR13.5 also for unknown cable type and
passive cable type.
Reviewed-by: George Shen <george.shen@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Ran Shi <ran.shi@amd.com>
---
.../display/dc/link/protocols/link_dp_capability.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index db87aa7b5c90..3c5334cdb3fb 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -412,12 +412,18 @@ static enum dc_link_rate get_cable_max_link_rate(struct dc_link *link)
{
enum dc_link_rate cable_max_link_rate = LINK_RATE_UNKNOWN;
- if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR20)
+ if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR20) {
cable_max_link_rate = LINK_RATE_UHBR20;
- else if (link->dpcd_caps.cable_id.bits.UHBR13_5_CAPABILITY)
+ } else if (link->dpcd_caps.cable_id.bits.UHBR13_5_CAPABILITY) {
cable_max_link_rate = LINK_RATE_UHBR13_5;
- else if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR10)
- cable_max_link_rate = LINK_RATE_UHBR10;
+ } else if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR10) {
+ // allow DP40 cables to do UHBR13.5 for passive or unknown cable type
+ if (link->dpcd_caps.cable_id.bits.CABLE_TYPE < 2) {
+ cable_max_link_rate = LINK_RATE_UHBR13_5;
+ } else {
+ cable_max_link_rate = LINK_RATE_UHBR10;
+ }
+ }
return cable_max_link_rate;
}
--
2.39.2
next prev parent reply other threads:[~2023-12-06 19:52 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-06 19:52 [PATCH 00/13] DC Patches for Dec 11, 2023 Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 01/13] drm/amd/display: Remove minor revision 5 until proper parser is ready Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 02/13] drm/amd/display: Use explicit size for types in DCCG's struct dp_dto_params Aurabindo Pillai
2023-12-06 19:52 ` Aurabindo Pillai [this message]
2023-12-06 19:52 ` [PATCH 04/13] drm/amd/display: Revert "Fix conversions between bytes and KB" Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 05/13] drm/amd/display: trivial comment change Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 06/13] drm/amd/display: Revert DP2 MST hub triple display fix Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 07/13] drm/amd/display: Populate dtbclk from bounding box Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 08/13] drm/amd/display: Disable OPTC pg to match DC Hubp/dpp pg Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 09/13] drm/amd/display: Exit from idle state before accessing HW data Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 10/13] drm/amd/display: For prefetch mode > 0, extend prefetch if possible Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 11/13] drm/amd/display: Force p-state disallow if leaving no plane config Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 12/13] drm/amd/display: fix HW block PG sequence Aurabindo Pillai
2023-12-06 19:52 ` [PATCH 13/13] drm/amd/display: 3.2.264 Aurabindo Pillai
2023-12-11 14:42 ` [PATCH 00/13] DC Patches for Dec 11, 2023 Wheeler, Daniel
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