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Received: from BN6PR1201MB0228.namprd12.prod.outlook.com (10.174.115.135) by BN6PR1201MB0082.namprd12.prod.outlook.com (10.174.113.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2644.26; Wed, 22 Jan 2020 16:10:45 +0000 Received: from BN6PR1201MB0228.namprd12.prod.outlook.com ([fe80::d8c9:e17c:33f1:6d2]) by BN6PR1201MB0228.namprd12.prod.outlook.com ([fe80::d8c9:e17c:33f1:6d2%3]) with mapi id 15.20.2644.028; Wed, 22 Jan 2020 16:10:45 +0000 Subject: Re: [PATCH 2/5] drm/amd/display: update psp interface header To: Bhawanpreet Lakha , amd-gfx@lists.freedesktop.org References: <20200116202945.21801-1-Bhawanpreet.Lakha@amd.com> <20200116202945.21801-3-Bhawanpreet.Lakha@amd.com> From: Harry Wentland Autocrypt: addr=hwentlan@amd.com; keydata= mQENBFhb4C8BCADhHHUNoBQ7K7LupCP0FsUb443Vuqq+dH0uo4A3lnPkMF6FJmGcJ9Sbx1C6 cd4PbVAaTFZUEmjqfpm+wCRBe11eF55hW3GJ273wvfH69Q/zmAxwO8yk+i5ZWWl8Hns5h69K D9QURHLpXxrcwnfHFah0DwV23TrD1KGB7vowCZyJOw93U/GzAlXKESy0FM7ZOYIJH83X7qhh Q9KX94iTEYTeH86Wy8hwHtqM6ySviwEz0g+UegpG8ebbz0w3b5QmdKCAg+eZTmBekP5o77YE BKqR+Miiwo9+tzm2N5GiF9HDeI2pVe/egOLa5UcmsgdF4Y5FKoMnBbAHNaA6Fev8PHlNABEB AAG0J0hhcnJ5IFdlbnRsYW5kIDxoYXJyeS53ZW50bGFuZEBhbWQuY29tPokBNwQTAQgAIQUC WFvgLwIbAwULCQgHAgYVCAkKCwIEFgIDAQIeAQIXgAAKCRAtWBXJjBS24xUlCAC9MqAlIbZO /a37s41h+MQ+D20C6/hVErWO+RA06nA+jFDPUWrDJKYdn6EDQWdLY3ATeAq3X8GIeOTXGrPD b2OXD6kOViW/RNvlXdrIsnIDacdr39aoAlY1b+bhTzZVz4pto4l+K1PZb5jlMgTk/ks9HesL RfYVq5wOy3qIpocdjdlXnSUKn0WOkGBBd8Nv3o0OI18tiJ1S/QwLBBfZoVvfGinoB2p4j/wO kJxpi3F9TaOtLGcdrgfghg31Fb48DP+6kodZ4ircerp4hyAp0U2iKtsrQ/sVWR4mbe3eTfcn YjBxGd2JOVdNQZa2VTNf9GshIDMD8IIQK6jN0LfY8Py2uQENBFhb4C8BCAC/0KWY3pIbU2cy i7GMj3gqB6h0jGqRuMpMRoSNDoAUIuSh17w+bawuOF6XZPdK3D4lC9cOXMwP3aP9tTJOori2 8vMH8KW9jp9lAYnGWYhSqLdjzIACquMqi96EBtawJDct1e9pVgp+d4JXHlgIrl11ITJo8rCP dEqjro2bCBWxijsIncdCzMjf57+nR7u86SBtGSFcXKapS7YJeWcvM6MzFYgIkxHxxBDvBBvm U2/mAXiL72kwmlV1BNrabQxX2UnIb3xt3UovYJehrnDUMdYjxJgSPRBx27wQ/D05xAlhkmmL FJ01ZYc412CRCC6gjgFPfUi2y7YJTrQHS79WSyANABEBAAGJAR8EGAEIAAkFAlhb4C8CGwwA CgkQLVgVyYwUtuM72Qf+J6JOQ/27pWf5Ulde9GS0BigA1kV9CNfIq396TgvQzeyixHMvgPdq Z36x89zZi0otjMZv6ypIdEg5co1Bvz0wFaKbCiNbTjpnA1VAbQVLSFjCZLQiu0vc+BZ1yKDV T5ASJ97G4XvQNO+XXGY55MrmhoNqMaeIa/3Jas54fPVd5olcnUAyDty29/VWXNllUq38iBCX /0tTF7oav1lzPGfeW2c6B700FFZMTR4YBVSGE8jPIzu2Fj0E8EkDmsgS+nibqSvWXfo1v231 410h35CjbYDlYQO7Z1YD7asqbaOnF0As+rckyRMweQ9CxZn5+YBijtPJA3x5ldbCfQ9rWiTu XQ== Message-ID: <7850186b-9556-1aa2-ca3f-5a02b71da97d@amd.com> Date: Wed, 22 Jan 2020 11:10:43 -0500 User-Agent: Mozilla/5.0 (X11; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On 2020-01-16 3:29 p.m., Bhawanpreet Lakha wrote: > [Why] > We need to support SRM Why do we need to support SRM? Please refer to section 5 "Renewability" of the HDCP 2.x spec and its requirement to store the SRM in non-volatile memory. Why does this involve PSP? Describe that for AMD's content protection solution PSP owns the SRM check but has no ability to store it in SRM memory directly, hence the need for the kernel driver to facilitate it. Why a sysfs? Describe that the kernel driver cannot (or should not) write to the file system. Outline how we expect usermode scripts to facilitate this and use the sysfs to retrieve an SRM from PSP to store it to the filesystem and passes it to PSP from the filesystem. We'll want to highlight at which points (boot, suspend, etc.) we expect this to happen. I recommend documenting this whole process here in the patch description to provide a reference for posterity as it's not necessarily clear from the patches why and what we're doing. Harry > > [How] > Add the interface to the header file > > Signed-off-by: Bhawanpreet Lakha > Reviewed-by: Rodrigo Siqueira > --- > .../drm/amd/display/modules/hdcp/hdcp_psp.h | 26 ++++++++++++++++++- > 1 file changed, 25 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h > index 82a5e997d573..d5cb3f46606f 100644 > --- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h > +++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.h > @@ -117,6 +117,8 @@ struct ta_dtm_shared_memory { > int psp_cmd_submit_buf(struct psp_context *psp, struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd_resp *cmd, > uint64_t fence_mc_addr); > > +enum { PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE = 5120 }; > + > enum ta_hdcp_command { > TA_HDCP_COMMAND__INITIALIZE, > TA_HDCP_COMMAND__HDCP1_CREATE_SESSION, > @@ -134,7 +136,10 @@ enum ta_hdcp_command { > TA_HDCP_COMMAND__UNUSED_3, > TA_HDCP_COMMAND__HDCP2_CREATE_SESSION_V2, > TA_HDCP_COMMAND__HDCP2_PREPARE_PROCESS_AUTHENTICATION_MSG_V2, > - TA_HDCP_COMMAND__HDCP2_ENABLE_DP_STREAM_ENCRYPTION > + TA_HDCP_COMMAND__HDCP2_ENABLE_DP_STREAM_ENCRYPTION, > + TA_HDCP_COMMAND__HDCP_DESTROY_ALL_SESSIONS, > + TA_HDCP_COMMAND__HDCP_SET_SRM, > + TA_HDCP_COMMAND__HDCP_GET_SRM > }; > > enum ta_hdcp2_msg_id { > @@ -415,6 +420,22 @@ struct ta_hdcp_cmd_hdcp2_enable_dp_stream_encryption_input { > uint32_t display_handle; > }; > > +struct ta_hdcp_cmd_set_srm_input { > + uint32_t srm_buf_size; > + uint8_t srm_buf[PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE]; > +}; > + > +struct ta_hdcp_cmd_set_srm_output { > + uint8_t valid_signature; > + uint32_t srm_version; > +}; > + > +struct ta_hdcp_cmd_get_srm_output { > + uint32_t srm_version; > + uint32_t srm_buf_size; > + uint8_t srm_buf[PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE]; > +}; > + > /**********************************************************/ > /* Common input structure for HDCP callbacks */ > union ta_hdcp_cmd_input { > @@ -432,6 +453,7 @@ union ta_hdcp_cmd_input { > struct ta_hdcp_cmd_hdcp2_process_prepare_authentication_message_input_v2 > hdcp2_prepare_process_authentication_message_v2; > struct ta_hdcp_cmd_hdcp2_enable_dp_stream_encryption_input hdcp2_enable_dp_stream_encryption; > + struct ta_hdcp_cmd_set_srm_input hdcp_set_srm; > }; > > /* Common output structure for HDCP callbacks */ > @@ -444,6 +466,8 @@ union ta_hdcp_cmd_output { > struct ta_hdcp_cmd_hdcp2_create_session_output_v2 hdcp2_create_session_v2; > struct ta_hdcp_cmd_hdcp2_process_prepare_authentication_message_output_v2 > hdcp2_prepare_process_authentication_message_v2; > + struct ta_hdcp_cmd_set_srm_output hdcp_set_srm; > + struct ta_hdcp_cmd_get_srm_output hdcp_get_srm; > }; > /**********************************************************/ > > _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx