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Received: from DM6PR12MB3914.namprd12.prod.outlook.com (10.255.174.32) by DM6PR12MB3628.namprd12.prod.outlook.com (20.178.199.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2623.9; Tue, 14 Jan 2020 19:00:04 +0000 Received: from DM6PR12MB3914.namprd12.prod.outlook.com ([fe80::90fd:cd84:e116:6968]) by DM6PR12MB3914.namprd12.prod.outlook.com ([fe80::90fd:cd84:e116:6968%7]) with mapi id 15.20.2623.015; Tue, 14 Jan 2020 19:00:04 +0000 Subject: Re: [PATCH 1/6] drm/amdgpu/vcn: support multiple-instance dpg pause mode To: James Zhu , amd-gfx@lists.freedesktop.org References: <1579024702-27996-1-git-send-email-James.Zhu@amd.com> <1579024702-27996-2-git-send-email-James.Zhu@amd.com> From: Leo Liu Organization: AMD Message-ID: <838ed7fa-ac94-d6bc-10fd-3633a2b1cf8d@amd.com> Date: Tue, 14 Jan 2020 14:00:03 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 In-Reply-To: <1579024702-27996-2-git-send-email-James.Zhu@amd.com> Content-Language: en-US X-ClientProxiedBy: YTXPR0101CA0057.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b00:1::34) To DM6PR12MB3914.namprd12.prod.outlook.com (2603:10b6:5:1c9::32) MIME-Version: 1.0 Received: from [172.27.228.95] (165.204.55.251) by YTXPR0101CA0057.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b00:1::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2644.18 via Frontend Transport; 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charset="us-ascii"; Format="flowed" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Reviewed-by: Leo Liu On 2020-01-14 12:58 p.m., James Zhu wrote: > Add multiple-instance dpg pause mode support for VCN2.5 > > Signed-off-by: James Zhu > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++-- > drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 2 +- > drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 8 ++++---- > drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++-- > 4 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c > index ed106d9..99df693 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c > @@ -298,7 +298,7 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work) > else > new_state.fw_based = VCN_DPG_STATE__UNPAUSE; > > - adev->vcn.pause_dpg_mode(adev, &new_state); > + adev->vcn.pause_dpg_mode(adev, j, &new_state); > } > > fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec); > @@ -341,7 +341,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring) > if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) > new_state.fw_based = VCN_DPG_STATE__PAUSE; > > - adev->vcn.pause_dpg_mode(adev, &new_state); > + adev->vcn.pause_dpg_mode(adev, ring->me, &new_state); > } > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h > index e6dee82..26c6623 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h > @@ -199,7 +199,7 @@ struct amdgpu_vcn { > > unsigned harvest_config; > int (*pause_dpg_mode)(struct amdgpu_device *adev, > - struct dpg_pause_state *new_state); > + int inst_idx, struct dpg_pause_state *new_state); > }; > > int amdgpu_vcn_sw_init(struct amdgpu_device *adev); > diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c > index 3b025a3..a70351f 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c > @@ -50,7 +50,7 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev); > static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev); > static int vcn_v1_0_set_powergating_state(void *handle, enum amd_powergating_state state); > static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, > - struct dpg_pause_state *new_state); > + int inst_idx, struct dpg_pause_state *new_state); > > static void vcn_v1_0_idle_work_handler(struct work_struct *work); > > @@ -1199,7 +1199,7 @@ static int vcn_v1_0_stop(struct amdgpu_device *adev) > } > > static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev, > - struct dpg_pause_state *new_state) > + int inst_idx, struct dpg_pause_state *new_state) > { > int ret_code; > uint32_t reg_data = 0; > @@ -1786,7 +1786,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work) > else > new_state.jpeg = VCN_DPG_STATE__UNPAUSE; > > - adev->vcn.pause_dpg_mode(adev, &new_state); > + adev->vcn.pause_dpg_mode(adev, 0, &new_state); > } > > fences += amdgpu_fence_count_emitted(&adev->jpeg.inst->ring_dec); > @@ -1840,7 +1840,7 @@ void vcn_v1_0_ring_begin_use(struct amdgpu_ring *ring) > else if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) > new_state.jpeg = VCN_DPG_STATE__PAUSE; > > - adev->vcn.pause_dpg_mode(adev, &new_state); > + adev->vcn.pause_dpg_mode(adev, 0, &new_state); > } > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c > index d76ece3..dcdc7ad 100644 > --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c > @@ -58,7 +58,7 @@ static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev); > static int vcn_v2_0_set_powergating_state(void *handle, > enum amd_powergating_state state); > static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, > - struct dpg_pause_state *new_state); > + int inst_idx, struct dpg_pause_state *new_state); > > /** > * vcn_v2_0_early_init - set function pointers > @@ -1135,7 +1135,7 @@ static int vcn_v2_0_stop(struct amdgpu_device *adev) > } > > static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev, > - struct dpg_pause_state *new_state) > + int inst_idx, struct dpg_pause_state *new_state) > { > struct amdgpu_ring *ring; > uint32_t reg_data = 0; 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