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* [PATCH 01/12] drm/amdgpu: Write masked value to control register
@ 2022-07-14 16:44 Maíra Canal
  2022-07-14 16:44 ` [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope Maíra Canal
                   ` (13 more replies)
  0 siblings, 14 replies; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:44 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
should be written into the control register instead of 0.

Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")
Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index f5a29526684d..0a7b1c002822 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -339,7 +339,7 @@ static void dce_v6_0_hpd_fini(struct amdgpu_device *adev)
 
 		tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);
 		tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;
-		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0);
+		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);
 
 		amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 780a8aa972fe..f57f4a25cf5a 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -333,7 +333,7 @@ static void dce_v8_0_hpd_fini(struct amdgpu_device *adev)
 
 		tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);
 		tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;
-		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0);
+		WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);
 
 		amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);
 	}
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
@ 2022-07-14 16:44 ` Maíra Canal
  2022-07-18 18:52   ` Alex Deucher
  2022-07-14 16:44 ` [PATCH 03/12] drm/amd/display: Remove unused clk_src variable Maíra Canal
                   ` (12 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:44 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Turn previously global function into a static function as it is not used
outside the file.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 +-
 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 39f93072b5e0..c5a0a3649e9a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -251,7 +251,7 @@ unsigned int get_total_surface_size_in_mall_bytes(
 	return size;
 }
 
-unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int plane_idx)
+static unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int plane_idx)
 {
 	int pipe_idx = -1;
 	int i;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 47b149d4bfcf..6e61b5382361 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -165,7 +165,6 @@ unsigned int get_total_surface_size_in_mall_bytes(
 		struct display_mode_lib *mode_lib,
 		const display_e2e_pipe_params_st *pipes,
 		unsigned int num_pipes);
-unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int plane_idx);
 
 bool get_is_phantom_pipe(struct display_mode_lib *mode_lib,
 		const display_e2e_pipe_params_st *pipes,
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 03/12] drm/amd/display: Remove unused clk_src variable
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
  2022-07-14 16:44 ` [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope Maíra Canal
@ 2022-07-14 16:44 ` Maíra Canal
  2022-07-18 18:53   ` Alex Deucher
  2022-07-14 16:44 ` [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function Maíra Canal
                   ` (11 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:44 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Remove the variable clk_src from the function dcn3_get_pix_clk_dividers.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25: warning:
variable 'clk_src' set but not used [-Wunused-but-set-variable]
        struct dce110_clk_src *clk_src;
                               ^
1 warning generated.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 5cc7cc0b2f2d..d55da1ab1ac2 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -1276,9 +1276,7 @@ static uint32_t dcn3_get_pix_clk_dividers(
 		struct pll_settings *pll_settings)
 {
 	unsigned long long actual_pix_clk_100Hz = pix_clk_params ? pix_clk_params->requested_pix_clk_100hz : 0;
-	struct dce110_clk_src *clk_src;
 
-	clk_src = TO_DCE110_CLK_SRC(cs);
 	DC_LOGGER_INIT();
 
 	if (pix_clk_params == NULL || pll_settings == NULL
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
  2022-07-14 16:44 ` [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope Maíra Canal
  2022-07-14 16:44 ` [PATCH 03/12] drm/amd/display: Remove unused clk_src variable Maíra Canal
@ 2022-07-14 16:44 ` Maíra Canal
  2022-07-18 18:54   ` Alex Deucher
  2022-07-14 16:45 ` [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable Maíra Canal
                   ` (10 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:44 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Remove dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function, which is not used in
the codebase.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:6:
warning: no previous prototype for function
'dml32_CalculatedoublePipeDPPCLKAndSCLThroughput' [-Wmissing-prototypes]
void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
     ^
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:1:
note: declare 'static' if the function is not intended to be used outside of
this translation unit
void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
^
static
1 warning generated.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 .../dc/dml/dcn32/display_mode_vba_util_32.c   | 54 -------------------
 1 file changed, 54 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 5a701d9df0f7..4d62ab0c1a78 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -390,60 +390,6 @@ void dml32_CalculateBytePerPixelAndBlockSizes(
 #endif
 } // CalculateBytePerPixelAndBlockSizes
 
-void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
-		double HRatio,
-		double HRatioChroma,
-		double VRatio,
-		double VRatioChroma,
-		double MaxDCHUBToPSCLThroughput,
-		double MaxPSCLToLBThroughput,
-		double PixelClock,
-		enum source_format_class SourcePixelFormat,
-		unsigned int HTaps,
-		unsigned int HTapsChroma,
-		unsigned int VTaps,
-		unsigned int VTapsChroma,
-
-		/* output */
-		double *PSCL_THROUGHPUT,
-		double *PSCL_THROUGHPUT_CHROMA,
-		double *DPPCLKUsingdoubleDPP)
-{
-	double DPPCLKUsingdoubleDPPLuma;
-	double DPPCLKUsingdoubleDPPChroma;
-
-	if (HRatio > 1) {
-		*PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput * HRatio /
-				dml_ceil((double) HTaps / 6.0, 1.0));
-	} else {
-		*PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput);
-	}
-
-	DPPCLKUsingdoubleDPPLuma = PixelClock * dml_max3(VTaps / 6 * dml_min(1, HRatio), HRatio * VRatio /
-			*PSCL_THROUGHPUT, 1);
-
-	if ((HTaps > 6 || VTaps > 6) && DPPCLKUsingdoubleDPPLuma < 2 * PixelClock)
-		DPPCLKUsingdoubleDPPLuma = 2 * PixelClock;
-
-	if ((SourcePixelFormat != dm_420_8 && SourcePixelFormat != dm_420_10 && SourcePixelFormat != dm_420_12 &&
-			SourcePixelFormat != dm_rgbe_alpha)) {
-		*PSCL_THROUGHPUT_CHROMA = 0;
-		*DPPCLKUsingdoubleDPP = DPPCLKUsingdoubleDPPLuma;
-	} else {
-		if (HRatioChroma > 1) {
-			*PSCL_THROUGHPUT_CHROMA = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput *
-					HRatioChroma / dml_ceil((double) HTapsChroma / 6.0, 1.0));
-		} else {
-			*PSCL_THROUGHPUT_CHROMA = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput);
-		}
-		DPPCLKUsingdoubleDPPChroma = PixelClock * dml_max3(VTapsChroma / 6 * dml_min(1, HRatioChroma),
-				HRatioChroma * VRatioChroma / *PSCL_THROUGHPUT_CHROMA, 1);
-		if ((HTapsChroma > 6 || VTapsChroma > 6) && DPPCLKUsingdoubleDPPChroma < 2 * PixelClock)
-			DPPCLKUsingdoubleDPPChroma = 2 * PixelClock;
-		*DPPCLKUsingdoubleDPP = dml_max(DPPCLKUsingdoubleDPPLuma, DPPCLKUsingdoubleDPPChroma);
-	}
-}
-
 void dml32_CalculateSwathAndDETConfiguration(
 		unsigned int DETSizeOverride[],
 		enum dm_use_mall_for_pstate_change_mode UseMALLForPStateChange[],
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (2 preceding siblings ...)
  2022-07-14 16:44 ` [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-18 18:55   ` Alex Deucher
  2022-07-14 16:45 ` [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params Maíra Canal
                   ` (9 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Remove the unused unsigned int NumberOfStates from the file, which was
declared but never hooked up.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:33:27:
warning: unused variable 'NumberOfStates' [-Wunused-const-variable]
static const unsigned int NumberOfStates = DC__VOLTAGE_STATES;
                          ^
1 warning generated.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index c6c3a9e6731a..dff8f8f27de4 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -30,8 +30,6 @@
 #include "../dml_inline_defs.h"
 #include "display_mode_vba_util_32.h"
 
-static const unsigned int NumberOfStates = DC__VOLTAGE_STATES;
-
 void dml32_recalculate(struct display_mode_lib *mode_lib);
 static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(
 		struct display_mode_lib *mode_lib);
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (3 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-18 18:56   ` Alex Deucher
  2022-07-14 16:45 ` [PATCH 07/12] drm/amd/display: Remove unused value0 variable Maíra Canal
                   ` (8 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Remove the variables dispclk_delay_subtotal and dppclk_delay_subtotal from
the function dml_rq_dlg_get_dlg_params.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:920:15:
warning: variable 'dispclk_delay_subtotal' set but not used [-Wunused-but-set-variable]
        unsigned int dispclk_delay_subtotal;
                     ^
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:919:15:
warning: variable 'dppclk_delay_subtotal' set but not used [-Wunused-but-set-variable]
        unsigned int dppclk_delay_subtotal;
                     ^
2 warnings generated.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 .../dc/dml/dcn31/display_rq_dlg_calc_31.c     | 19 -------------------
 1 file changed, 19 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
index c94cf6e01e25..66b82e4f05c6 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
@@ -866,7 +866,6 @@ static void dml_rq_dlg_get_dlg_params(
 {
 	const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;
 	const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;
-	const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout;
 	const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg;
 	const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;
 	const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;
@@ -916,9 +915,6 @@ static void dml_rq_dlg_get_dlg_params(
 	unsigned int vupdate_width;
 	unsigned int vready_offset;
 
-	unsigned int dppclk_delay_subtotal;
-	unsigned int dispclk_delay_subtotal;
-
 	unsigned int vstartup_start;
 	unsigned int dst_x_after_scaler;
 	unsigned int dst_y_after_scaler;
@@ -1037,21 +1033,6 @@ static void dml_rq_dlg_get_dlg_params(
 	vupdate_width = dst->vupdate_width;
 	vready_offset = dst->vready_offset;
 
-	dppclk_delay_subtotal = mode_lib->ip.dppclk_delay_subtotal;
-	dispclk_delay_subtotal = mode_lib->ip.dispclk_delay_subtotal;
-
-	if (scl_enable)
-		dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl;
-	else
-		dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl_lb_only;
-
-	dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_cnvc_formatter + src->num_cursors * mode_lib->ip.dppclk_delay_cnvc_cursor;
-
-	if (dout->dsc_enable) {
-		double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // FROM VBA
-		dispclk_delay_subtotal += dsc_delay;
-	}
-
 	vstartup_start = dst->vstartup_start;
 	if (interlaced) {
 		if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_end / 2.0)
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 07/12] drm/amd/display: Remove unused value0 variable
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (4 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-18 18:58   ` Alex Deucher
  2022-07-14 16:45 ` [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder Maíra Canal
                   ` (7 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Remove the variable value0 from the function
dcn10_link_encoder_update_mst_stream_allocation_table.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.c:1223:11:
warning: variable 'value0' set but not used [-Wunused-but-set-variable]
        uint32_t value0 = 0;
                 ^
1 warning generated.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
index fbccb7263ad2..ea7d89bc293f 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
@@ -1220,7 +1220,6 @@ void dcn10_link_encoder_update_mst_stream_allocation_table(
 	const struct link_mst_stream_allocation_table *table)
 {
 	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
-	uint32_t value0 = 0;
 	uint32_t value1 = 0;
 	uint32_t value2 = 0;
 	uint32_t slots = 0;
@@ -1322,8 +1321,6 @@ void dcn10_link_encoder_update_mst_stream_allocation_table(
 	do {
 		udelay(10);
 
-		value0 = REG_READ(DP_MSE_SAT_UPDATE);
-
 		REG_GET(DP_MSE_SAT_UPDATE,
 				DP_MSE_SAT_UPDATE, &value1);
 
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (5 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 07/12] drm/amd/display: Remove unused value0 variable Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-18 18:59   ` Alex Deucher
  2022-07-14 16:45 ` [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable Maíra Canal
                   ` (6 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

The variable regval from the function enc1_update_generic_info_packet
and the variables dynamic_range_rgb and dynamic_range_ycbcr from the
function enc1_stream_encoder_dp_set_stream_attribute are not currently
used.

This was pointed by clang with the following warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:62:11:
warning: variable 'regval' set but not used [-Wunused-but-set-variable]
        uint32_t regval;
                 ^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:262:10:
warning: variable 'dynamic_range_rgb' set but not used [-Wunused-but-set-variable]
        uint8_t dynamic_range_rgb = 0; /*full range*/
                ^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:263:10:
warning: variable 'dynamic_range_ycbcr' set but not used [-Wunused-but-set-variable]
        uint8_t dynamic_range_ycbcr = 1; /*bt709*/
                ^
3 warnings generated.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 .../drm/amd/display/dc/dcn10/dcn10_stream_encoder.c    | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index c99c6fababa9..484e7cdf00b8 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -59,7 +59,6 @@ void enc1_update_generic_info_packet(
 	uint32_t packet_index,
 	const struct dc_info_packet *info_packet)
 {
-	uint32_t regval;
 	/* TODOFPGA Figure out a proper number for max_retries polling for lock
 	 * use 50 for now.
 	 */
@@ -88,7 +87,6 @@ void enc1_update_generic_info_packet(
 	REG_UPDATE(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, 1);
 
 	/* choose which generic packet to use */
-	regval = REG_READ(AFMT_VBI_PACKET_CONTROL);
 	REG_UPDATE(AFMT_VBI_PACKET_CONTROL,
 			AFMT_GENERIC_INDEX, packet_index);
 
@@ -259,8 +257,6 @@ void enc1_stream_encoder_dp_set_stream_attribute(
 	uint32_t h_back_porch;
 	uint8_t synchronous_clock = 0; /* asynchronous mode */
 	uint8_t colorimetry_bpc;
-	uint8_t dynamic_range_rgb = 0; /*full range*/
-	uint8_t dynamic_range_ycbcr = 1; /*bt709*/
 	uint8_t dp_pixel_encoding = 0;
 	uint8_t dp_component_depth = 0;
 
@@ -372,18 +368,15 @@ void enc1_stream_encoder_dp_set_stream_attribute(
 	switch (output_color_space) {
 	case COLOR_SPACE_SRGB:
 		misc1 = misc1 & ~0x80; /* bit7 = 0*/
-		dynamic_range_rgb = 0; /*full range*/
 		break;
 	case COLOR_SPACE_SRGB_LIMITED:
 		misc0 = misc0 | 0x8; /* bit3=1 */
 		misc1 = misc1 & ~0x80; /* bit7 = 0*/
-		dynamic_range_rgb = 1; /*limited range*/
 		break;
 	case COLOR_SPACE_YCBCR601:
 	case COLOR_SPACE_YCBCR601_LIMITED:
 		misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */
 		misc1 = misc1 & ~0x80; /* bit7 = 0*/
-		dynamic_range_ycbcr = 0; /*bt601*/
 		if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
 			misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */
 		else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444)
@@ -393,15 +386,12 @@ void enc1_stream_encoder_dp_set_stream_attribute(
 	case COLOR_SPACE_YCBCR709_LIMITED:
 		misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */
 		misc1 = misc1 & ~0x80; /* bit7 = 0*/
-		dynamic_range_ycbcr = 1; /*bt709*/
 		if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
 			misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */
 		else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444)
 			misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */
 		break;
 	case COLOR_SPACE_2020_RGB_LIMITEDRANGE:
-		dynamic_range_rgb = 1; /*limited range*/
-		break;
 	case COLOR_SPACE_2020_RGB_FULLRANGE:
 	case COLOR_SPACE_2020_YCBCR:
 	case COLOR_SPACE_XR_RGB:
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (6 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-18 19:00   ` Alex Deucher
  2022-07-14 16:45 ` [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK Maíra Canal
                   ` (5 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Remove the variable MaxUsedBW from the function
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.
As a side-effect, the variables MaxPerPlaneVActiveWRBandwidth and
WRBandwidth are also removed.

This was pointed by clang with the following warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3043:10:
warning: variable 'MaxUsedBW' set but not used [-Wunused-but-set-variable]
                double MaxUsedBW = 0;
                       ^
1 warning generated.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 .../dc/dml/dcn30/display_mode_vba_30.c        | 28 -------------------
 1 file changed, 28 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index 842eb94ebe04..876b321b30ca 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -3037,40 +3037,12 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
 
 	{
 		//Maximum Bandwidth Used
-		double TotalWRBandwidth = 0;
-		double MaxPerPlaneVActiveWRBandwidth = 0;
-		double WRBandwidth = 0;
-		double MaxUsedBW = 0;
-		for (k = 0; k < v->NumberOfActivePlanes; ++k) {
-			if (v->WritebackEnable[k] == true
-					&& v->WritebackPixelFormat[k] == dm_444_32) {
-				WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
-						/ (v->HTotal[k] * v->WritebackSourceHeight[k] / v->PixelClock[k]) * 4;
-			} else if (v->WritebackEnable[k] == true) {
-				WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
-						/ (v->HTotal[k] * v->WritebackSourceHeight[k] / v->PixelClock[k]) * 8;
-			}
-			TotalWRBandwidth = TotalWRBandwidth + WRBandwidth;
-			MaxPerPlaneVActiveWRBandwidth = dml_max(MaxPerPlaneVActiveWRBandwidth, WRBandwidth);
-		}
-
 		v->TotalDataReadBandwidth = 0;
 		for (k = 0; k < v->NumberOfActivePlanes; ++k) {
 			v->TotalDataReadBandwidth = v->TotalDataReadBandwidth
 					+ v->ReadBandwidthPlaneLuma[k]
 					+ v->ReadBandwidthPlaneChroma[k];
 		}
-
-		{
-			double MaxPerPlaneVActiveRDBandwidth = 0;
-			for (k = 0; k < v->NumberOfActivePlanes; ++k) {
-				MaxPerPlaneVActiveRDBandwidth = dml_max(MaxPerPlaneVActiveRDBandwidth,
-						v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k]);
-
-			}
-		}
-
-		MaxUsedBW = MaxTotalRDBandwidth + TotalWRBandwidth;
 	}
 
 	// VStartup Margin
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (7 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-18 19:02   ` Alex Deucher
  2022-07-14 16:45 ` [PATCH 11/12] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK Maíra Canal
                   ` (4 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

The parameters WritebackPixelFormat and WritebackVRatio are removed as
they are not used on the function dml30_CalculateWriteBackDISPCLK.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c        | 2 --
 .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c  | 6 ------
 .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h  | 2 --
 3 files changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
index a8db1306750e..746bb93ade6c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
@@ -322,10 +322,8 @@ void dcn30_fpu_populate_dml_writeback_from_context(
 				 * parameters per pipe
 				 */
 				writeback_dispclk = dml30_CalculateWriteBackDISPCLK(
-						dout_wb.wb_pixel_format,
 						pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,
 						dout_wb.wb_hratio,
-						dout_wb.wb_vratio,
 						dout_wb.wb_htaps_luma,
 						dout_wb.wb_vtaps_luma,
 						dout_wb.wb_src_width,
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index 876b321b30ca..37049daaab4c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
@@ -1938,10 +1938,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
 		if (v->WritebackEnable[k]) {
 			v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK,
 				dml30_CalculateWriteBackDISPCLK(
-						v->WritebackPixelFormat[k],
 						v->PixelClock[k],
 						v->WritebackHRatio[k],
-						v->WritebackVRatio[k],
 						v->WritebackHTaps[k],
 						v->WritebackVTaps[k],
 						v->WritebackSourceWidth[k],
@@ -3284,10 +3282,8 @@ static double CalculateTWait(
 }
 
 double dml30_CalculateWriteBackDISPCLK(
-		enum source_format_class WritebackPixelFormat,
 		double PixelClock,
 		double WritebackHRatio,
-		double WritebackVRatio,
 		unsigned int WritebackHTaps,
 		unsigned int WritebackVTaps,
 		long   WritebackSourceWidth,
@@ -3794,10 +3790,8 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
 		if (v->WritebackEnable[k] == true) {
 			v->WritebackRequiredDISPCLK = dml_max(v->WritebackRequiredDISPCLK,
 					dml30_CalculateWriteBackDISPCLK(
-							v->WritebackPixelFormat[k],
 							v->PixelClock[k],
 							v->WritebackHRatio[k],
-							v->WritebackVRatio[k],
 							v->WritebackHTaps[k],
 							v->WritebackVTaps[k],
 							v->WritebackSourceWidth[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
index daaf0883b84d..12c070434eee 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
@@ -29,10 +29,8 @@
 void dml30_recalculate(struct display_mode_lib *mode_lib);
 void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
 double dml30_CalculateWriteBackDISPCLK(
-		enum source_format_class WritebackPixelFormat,
 		double PixelClock,
 		double WritebackHRatio,
-		double WritebackVRatio,
 		unsigned int WritebackHTaps,
 		unsigned int WritebackVTaps,
 		long   WritebackSourceWidth,
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 11/12] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (8 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-14 16:45 ` [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function Maíra Canal
                   ` (3 subsequent siblings)
  13 siblings, 0 replies; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

The functions dml30_CalculateWriteBackDISPCLK and
dml31_CalculateWriteBackDISPCLK are identical. Therefor, to avoid
code duplication, dml31_CalculateWriteBackDISPCLK is removed and
replaced by dml30_CalculateWriteBackDISPCLK.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 .../dc/dml/dcn31/display_mode_vba_31.c        | 28 ++-----------------
 .../dc/dml/dcn31/display_mode_vba_31.h        | 11 --------
 2 files changed, 2 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index 3fab19134480..804e45e22693 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -2085,11 +2085,9 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
 		if (v->WritebackEnable[k]) {
 			v->WritebackDISPCLK = dml_max(
 					v->WritebackDISPCLK,
-					dml31_CalculateWriteBackDISPCLK(
-							v->WritebackPixelFormat[k],
+					dml30_CalculateWriteBackDISPCLK(
 							v->PixelClock[k],
 							v->WritebackHRatio[k],
-							v->WritebackVRatio[k],
 							v->WritebackHTaps[k],
 							v->WritebackVTaps[k],
 							v->WritebackSourceWidth[k],
@@ -3470,26 +3468,6 @@ static double CalculateTWait(unsigned int PrefetchMode, double DRAMClockChangeLa
 	}
 }
 
-double dml31_CalculateWriteBackDISPCLK(
-		enum source_format_class WritebackPixelFormat,
-		double PixelClock,
-		double WritebackHRatio,
-		double WritebackVRatio,
-		unsigned int WritebackHTaps,
-		unsigned int WritebackVTaps,
-		long WritebackSourceWidth,
-		long WritebackDestinationWidth,
-		unsigned int HTotal,
-		unsigned int WritebackLineBufferSize)
-{
-	double DISPCLK_H, DISPCLK_V, DISPCLK_HB;
-
-	DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio;
-	DISPCLK_V = PixelClock * (WritebackVTaps * dml_ceil(WritebackDestinationWidth / 6.0, 1) + 8.0) / HTotal;
-	DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth * WritebackVTaps - WritebackLineBufferSize / 57.0) / 6.0 / WritebackSourceWidth;
-	return dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB);
-}
-
 static double CalculateWriteBackDelay(
 		enum source_format_class WritebackPixelFormat,
 		double WritebackHRatio,
@@ -4055,11 +4033,9 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
 		if (v->WritebackEnable[k] == true) {
 			v->WritebackRequiredDISPCLK = dml_max(
 					v->WritebackRequiredDISPCLK,
-					dml31_CalculateWriteBackDISPCLK(
-							v->WritebackPixelFormat[k],
+					dml30_CalculateWriteBackDISPCLK(
 							v->PixelClock[k],
 							v->WritebackHRatio[k],
-							v->WritebackVRatio[k],
 							v->WritebackHTaps[k],
 							v->WritebackVTaps[k],
 							v->WritebackSourceWidth[k],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
index 90be612f26b2..654362adcaa9 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.h
@@ -28,16 +28,5 @@
 
 void dml31_recalculate(struct display_mode_lib *mode_lib);
 void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
-double dml31_CalculateWriteBackDISPCLK(
-		enum source_format_class WritebackPixelFormat,
-		double PixelClock,
-		double WritebackHRatio,
-		double WritebackVRatio,
-		unsigned int WritebackHTaps,
-		unsigned int WritebackVTaps,
-		long   WritebackSourceWidth,
-		long   WritebackDestinationWidth,
-		unsigned int HTotal,
-		unsigned int WritebackLineBufferSize);
 
 #endif /* __DML31_DISPLAY_MODE_VBA_H__ */
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (9 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 11/12] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK Maíra Canal
@ 2022-07-14 16:45 ` Maíra Canal
  2022-07-15  1:53   ` André Almeida
  2022-07-14 19:04 ` [PATCH 01/12] drm/amdgpu: Write masked value to control register André Almeida
                   ` (2 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-14 16:45 UTC (permalink / raw)
  To: Harry Wentland, Leo Li, Rodrigo Siqueira, Alex Deucher,
	christian.koenig, Xinhui.Pan, David Airlie, Daniel Vetter,
	Nicholas Kazlauskas, Dmytro Laktyushkin, Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Maíra Canal, Isabella Basso, andrealmeid

Based on the dml30_CalculateWriteBackDISPCLK, it separates the
DISPCLK calculations on three variables, making no functional changes, in order
to make it more readable and better express that three values are being compared
on dml_max.

Signed-off-by: Maíra Canal <mairacanal@riseup.net>
---
 .../drm/amd/display/dc/dml/display_mode_vba.c | 31 ++++++++++++-------
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index c5a0a3649e9a..5fc1d16a2e15 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -1113,20 +1113,29 @@ double CalculateWriteBackDISPCLK(
 		unsigned int HTotal,
 		unsigned int WritebackChromaLineBufferWidth)
 {
-	double CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max(
-		dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio,
-		dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1)
+
+	double DISPCLK_H = 0, DISPCLK_V = 0, DISPCLK_HB = 0;
+	double CalculateWriteBackDISPCLK = 0;
+
+	DISPCLK_H = dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio;
+	DISPCLK_V = (WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1)
 			+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio, 1)
-			* (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal,
-			dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal));
+			* (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal;
+	DISPCLK_HB = dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal;
+
+	CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB);
+
 	if (WritebackPixelFormat != dm_444_32) {
-		CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK, 1.01 * PixelClock * dml_max(
-			dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio),
-			dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / 2.0, 1)
-				+ dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal
-				+ dml_ceil(1 / (2 * WritebackVRatio), 1) * (dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal,
-				dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal)));
+		DISPCLK_H = dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio);
+		DISPCLK_V = (WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) *
+				dml_ceil(WritebackDestinationWidth / 4.0, 1) +
+				dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal +
+			dml_ceil(1 / (2 * WritebackVRatio), 1) *(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal;
+		DISPCLK_HB = dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal;
+		CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
+				1.01 * PixelClock * dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB));
 	}
+
 	return CalculateWriteBackDISPCLK;
 }
 
-- 
2.36.1


^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (10 preceding siblings ...)
  2022-07-14 16:45 ` [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function Maíra Canal
@ 2022-07-14 19:04 ` André Almeida
  2022-07-14 19:14   ` Alex Deucher
  2022-07-15  1:56 ` André Almeida
  2022-07-18 19:07 ` Alex Deucher
  13 siblings, 1 reply; 29+ messages in thread
From: André Almeida @ 2022-07-14 19:04 UTC (permalink / raw)
  To: Maíra Canal
  Cc: magalilemes00, David Airlie, tales.aparecida, Xinhui.Pan,
	Rodrigo Siqueira, linux-kernel, amd-gfx, christian.koenig, mwen,
	Leo Li, Dmytro Laktyushkin, Aurabindo Pillai, Daniel Vetter,
	Alex Deucher, Isabella Basso, andrealmeid, Harry Wentland,
	Nicholas Kazlauskas

Hi Maíra,

Thank you for your patch,

Às 13:44 de 14/07/22, Maíra Canal escreveu:
> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
> should be written into the control register instead of 0.
> 

Why? I do see that tmp was unused before your patch, but why should we
write it into this register? Did you manage to test this somehow?

> Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
> Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")

Checking both commits, I can see that 0 is written at `mmDC_HPD1_CONTROL
+ N` register in _hpd_fini() in them, so if you are trying to fix the
commit that inserted that behavior, I think aren't those ones. For instance:

$ git show 2285b91c

[...]

@@ -479,28 +372,11 @@ static void dce_v8_0_hpd_fini(struct amdgpu_device
*adev)
        list_for_each_entry(connector, &dev->mode_config.connector_list,
head) {
                struct amdgpu_connector *amdgpu_connector =
to_amdgpu_connector(connector);

-               switch (amdgpu_connector->hpd.hpd) {
-               case AMDGPU_HPD_1:
-                       WREG32(mmDC_HPD1_CONTROL, 0);
-                       break;
-               case AMDGPU_HPD_2:
-                       WREG32(mmDC_HPD2_CONTROL, 0);
-                       break;
-               case AMDGPU_HPD_3:
-                       WREG32(mmDC_HPD3_CONTROL, 0);
-                       break;
-               case AMDGPU_HPD_4:
-                       WREG32(mmDC_HPD4_CONTROL, 0);
-                       break;
-               case AMDGPU_HPD_5:
-                       WREG32(mmDC_HPD5_CONTROL, 0);
-                       break;
-               case AMDGPU_HPD_6:
-                       WREG32(mmDC_HPD6_CONTROL, 0);
-                       break;
-               default:
-                       break;
-               }
+               if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd)
+                       continue;
+
+               WREG32(mmDC_HPD1_CONTROL +
hpd_offsets[amdgpu_connector->hpd.hpd], 0);
+

0 was the valued written here before this commit. The commit basically
replaces the switch case with a sum in this snippet.

thanks,
	andré

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
  2022-07-14 19:04 ` [PATCH 01/12] drm/amdgpu: Write masked value to control register André Almeida
@ 2022-07-14 19:14   ` Alex Deucher
  2022-07-14 19:20     ` André Almeida
  0 siblings, 1 reply; 29+ messages in thread
From: Alex Deucher @ 2022-07-14 19:14 UTC (permalink / raw)
  To: André Almeida
  Cc: Magali Lemes, David Airlie, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, Maíra Canal, Dmytro Laktyushkin,
	Aurabindo Pillai, Daniel Vetter, Leo Li, Alex Deucher,
	Isabella Basso, andrealmeid, Harry Wentland, Christian Koenig

On Thu, Jul 14, 2022 at 3:05 PM André Almeida <andrealmeid@igalia.com> wrote:
>
> Hi Maíra,
>
> Thank you for your patch,
>
> Às 13:44 de 14/07/22, Maíra Canal escreveu:
> > On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
> > should be written into the control register instead of 0.
> >
>
> Why? I do see that tmp was unused before your patch, but why should we
> write it into this register? Did you manage to test this somehow?

The patch is correct.  We should only be clearing the enable bit in
this case, not the entire register.  Clearing the other fields could
cause spurious hotplug events as it affects the short and long pulse
times for the HPD pin.

Alex

>
> > Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
> > Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")
>
> Checking both commits, I can see that 0 is written at `mmDC_HPD1_CONTROL
> + N` register in _hpd_fini() in them, so if you are trying to fix the
> commit that inserted that behavior, I think aren't those ones. For instance:
>
> $ git show 2285b91c
>
> [...]
>
> @@ -479,28 +372,11 @@ static void dce_v8_0_hpd_fini(struct amdgpu_device
> *adev)
>         list_for_each_entry(connector, &dev->mode_config.connector_list,
> head) {
>                 struct amdgpu_connector *amdgpu_connector =
> to_amdgpu_connector(connector);
>
> -               switch (amdgpu_connector->hpd.hpd) {
> -               case AMDGPU_HPD_1:
> -                       WREG32(mmDC_HPD1_CONTROL, 0);
> -                       break;
> -               case AMDGPU_HPD_2:
> -                       WREG32(mmDC_HPD2_CONTROL, 0);
> -                       break;
> -               case AMDGPU_HPD_3:
> -                       WREG32(mmDC_HPD3_CONTROL, 0);
> -                       break;
> -               case AMDGPU_HPD_4:
> -                       WREG32(mmDC_HPD4_CONTROL, 0);
> -                       break;
> -               case AMDGPU_HPD_5:
> -                       WREG32(mmDC_HPD5_CONTROL, 0);
> -                       break;
> -               case AMDGPU_HPD_6:
> -                       WREG32(mmDC_HPD6_CONTROL, 0);
> -                       break;
> -               default:
> -                       break;
> -               }
> +               if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd)
> +                       continue;
> +
> +               WREG32(mmDC_HPD1_CONTROL +
> hpd_offsets[amdgpu_connector->hpd.hpd], 0);
> +
>
> 0 was the valued written here before this commit. The commit basically
> replaces the switch case with a sum in this snippet.
>
> thanks,
>         andré

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
  2022-07-14 19:14   ` Alex Deucher
@ 2022-07-14 19:20     ` André Almeida
  0 siblings, 0 replies; 29+ messages in thread
From: André Almeida @ 2022-07-14 19:20 UTC (permalink / raw)
  To: Alex Deucher, Maíra Canal
  Cc: André Almeida, Magali Lemes, David Airlie,
	Tales Lelo da Aparecida, xinhui pan, Rodrigo Siqueira, LKML,
	amd-gfx list, Nicholas Kazlauskas, Melissa Wen, Leo Li,
	Dmytro Laktyushkin, Aurabindo Pillai, Daniel Vetter,
	Alex Deucher, Isabella Basso, Harry Wentland, Christian Koenig

Às 16:14 de 14/07/22, Alex Deucher escreveu:
> On Thu, Jul 14, 2022 at 3:05 PM André Almeida <andrealmeid@igalia.com> wrote:
>>
>> Hi Maíra,
>>
>> Thank you for your patch,
>>
>> Às 13:44 de 14/07/22, Maíra Canal escreveu:
>>> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
>>> should be written into the control register instead of 0.
>>>
>>
>> Why? I do see that tmp was unused before your patch, but why should we
>> write it into this register? Did you manage to test this somehow?
> 
> The patch is correct.  We should only be clearing the enable bit in
> this case, not the entire register.  Clearing the other fields could
> cause spurious hotplug events as it affects the short and long pulse
> times for the HPD pin.
> 

Got it, nice catch Maíra :) Next time, please add this kind of
information in the commit message.

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function
  2022-07-14 16:45 ` [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function Maíra Canal
@ 2022-07-15  1:53   ` André Almeida
  0 siblings, 0 replies; 29+ messages in thread
From: André Almeida @ 2022-07-15  1:53 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Dmytro Laktyushkin, magalilemes00, David Airlie, tales.aparecida,
	Xinhui.Pan, Rodrigo Siqueira, linux-kernel, amd-gfx,
	Nicholas Kazlauskas, mwen, Leo Li, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, Harry Wentland,
	christian.koenig

Às 13:45 de 14/07/22, Maíra Canal escreveu:
> Based on the dml30_CalculateWriteBackDISPCLK, it separates the
> DISPCLK calculations on three variables, making no functional changes, in order
> to make it more readable and better express that three values are being compared
> on dml_max.
> 
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  .../drm/amd/display/dc/dml/display_mode_vba.c | 31 ++++++++++++-------
>  1 file changed, 20 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
> index c5a0a3649e9a..5fc1d16a2e15 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
> @@ -1113,20 +1113,29 @@ double CalculateWriteBackDISPCLK(
>  		unsigned int HTotal,
>  		unsigned int WritebackChromaLineBufferWidth)
>  {
> -	double CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max(
> -		dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio,
> -		dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1)
> +
> +	double DISPCLK_H = 0, DISPCLK_V = 0, DISPCLK_HB = 0;
> +	double CalculateWriteBackDISPCLK = 0;
> +

Small nit: no need to initialize to 0 those variables here. They are
getting initialized bellow anyway.

> +	DISPCLK_H = dml_ceil(WritebackLumaHTaps / 4.0, 1) / WritebackHRatio;
> +	DISPCLK_V = (WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1)
>  			+ dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio, 1)
> -			* (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal,
> -			dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal));
> +			* (dml_ceil(WritebackLumaVTaps / 4.0, 1) + 4.0) / (double) HTotal;
> +	DISPCLK_HB = dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal;
> +
> +	CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB);
> +
>  	if (WritebackPixelFormat != dm_444_32) {
> -		CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK, 1.01 * PixelClock * dml_max(
> -			dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio),
> -			dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / 2.0, 1)
> -				+ dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal
> -				+ dml_ceil(1 / (2 * WritebackVRatio), 1) * (dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal,
> -				dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal)));
> +		DISPCLK_H = dml_ceil(WritebackChromaHTaps / 2.0, 1) / (2 * WritebackHRatio);
> +		DISPCLK_V = (WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) *
> +				dml_ceil(WritebackDestinationWidth / 4.0, 1) +
> +				dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal +
> +			dml_ceil(1 / (2 * WritebackVRatio), 1) *(dml_ceil(WritebackChromaVTaps / 4.0, 1) + 4) / HTotal;
> +		DISPCLK_HB = dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal;
> +		CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK,
> +				1.01 * PixelClock * dml_max3(DISPCLK_H, DISPCLK_V, DISPCLK_HB));
>  	}
> +
>  	return CalculateWriteBackDISPCLK;
>  }
>  

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (11 preceding siblings ...)
  2022-07-14 19:04 ` [PATCH 01/12] drm/amdgpu: Write masked value to control register André Almeida
@ 2022-07-15  1:56 ` André Almeida
  2022-07-18 19:07 ` Alex Deucher
  13 siblings, 0 replies; 29+ messages in thread
From: André Almeida @ 2022-07-15  1:56 UTC (permalink / raw)
  To: Maíra Canal, Harry Wentland, Leo Li, Rodrigo Siqueira,
	Alex Deucher, christian.koenig, Xinhui.Pan, David Airlie,
	Daniel Vetter, Nicholas Kazlauskas, Dmytro Laktyushkin,
	Aurabindo Pillai
  Cc: magalilemes00, tales.aparecida, linux-kernel, amd-gfx, mwen,
	Isabella Basso, andrealmeid

Às 13:44 de 14/07/22, Maíra Canal escreveu:
> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
> should be written into the control register instead of 0.
> 
> Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
> Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>

Series is Reviewed-by: André Almeida <andrealmeid@igalia.com>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope
  2022-07-14 16:44 ` [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope Maíra Canal
@ 2022-07-18 18:52   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 18:52 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:45 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> Turn previously global function into a static function as it is not used
> outside the file.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 +-
>  drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 -
>  2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
> index 39f93072b5e0..c5a0a3649e9a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
> @@ -251,7 +251,7 @@ unsigned int get_total_surface_size_in_mall_bytes(
>         return size;
>  }
>
> -unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int plane_idx)
> +static unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int plane_idx)
>  {
>         int pipe_idx = -1;
>         int i;
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
> index 47b149d4bfcf..6e61b5382361 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
> +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
> @@ -165,7 +165,6 @@ unsigned int get_total_surface_size_in_mall_bytes(
>                 struct display_mode_lib *mode_lib,
>                 const display_e2e_pipe_params_st *pipes,
>                 unsigned int num_pipes);
> -unsigned int get_pipe_idx(struct display_mode_lib *mode_lib, unsigned int plane_idx);
>
>  bool get_is_phantom_pipe(struct display_mode_lib *mode_lib,
>                 const display_e2e_pipe_params_st *pipes,
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 03/12] drm/amd/display: Remove unused clk_src variable
  2022-07-14 16:44 ` [PATCH 03/12] drm/amd/display: Remove unused clk_src variable Maíra Canal
@ 2022-07-18 18:53   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 18:53 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:45 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> Remove the variable clk_src from the function dcn3_get_pix_clk_dividers.
>
> This was pointed by clang with the following warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25: warning:
> variable 'clk_src' set but not used [-Wunused-but-set-variable]
>         struct dce110_clk_src *clk_src;
>                                ^
> 1 warning generated.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> index 5cc7cc0b2f2d..d55da1ab1ac2 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
> @@ -1276,9 +1276,7 @@ static uint32_t dcn3_get_pix_clk_dividers(
>                 struct pll_settings *pll_settings)
>  {
>         unsigned long long actual_pix_clk_100Hz = pix_clk_params ? pix_clk_params->requested_pix_clk_100hz : 0;
> -       struct dce110_clk_src *clk_src;
>
> -       clk_src = TO_DCE110_CLK_SRC(cs);
>         DC_LOGGER_INIT();
>
>         if (pix_clk_params == NULL || pll_settings == NULL
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function
  2022-07-14 16:44 ` [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function Maíra Canal
@ 2022-07-18 18:54   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 18:54 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:45 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> Remove dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function, which is not used in
> the codebase.
>
> This was pointed by clang with the following warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:6:
> warning: no previous prototype for function
> 'dml32_CalculatedoublePipeDPPCLKAndSCLThroughput' [-Wmissing-prototypes]
> void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
>      ^
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:1:
> note: declare 'static' if the function is not intended to be used outside of
> this translation unit
> void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
> ^
> static
> 1 warning generated.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  .../dc/dml/dcn32/display_mode_vba_util_32.c   | 54 -------------------
>  1 file changed, 54 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
> index 5a701d9df0f7..4d62ab0c1a78 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
> @@ -390,60 +390,6 @@ void dml32_CalculateBytePerPixelAndBlockSizes(
>  #endif
>  } // CalculateBytePerPixelAndBlockSizes
>
> -void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput(
> -               double HRatio,
> -               double HRatioChroma,
> -               double VRatio,
> -               double VRatioChroma,
> -               double MaxDCHUBToPSCLThroughput,
> -               double MaxPSCLToLBThroughput,
> -               double PixelClock,
> -               enum source_format_class SourcePixelFormat,
> -               unsigned int HTaps,
> -               unsigned int HTapsChroma,
> -               unsigned int VTaps,
> -               unsigned int VTapsChroma,
> -
> -               /* output */
> -               double *PSCL_THROUGHPUT,
> -               double *PSCL_THROUGHPUT_CHROMA,
> -               double *DPPCLKUsingdoubleDPP)
> -{
> -       double DPPCLKUsingdoubleDPPLuma;
> -       double DPPCLKUsingdoubleDPPChroma;
> -
> -       if (HRatio > 1) {
> -               *PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput * HRatio /
> -                               dml_ceil((double) HTaps / 6.0, 1.0));
> -       } else {
> -               *PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput);
> -       }
> -
> -       DPPCLKUsingdoubleDPPLuma = PixelClock * dml_max3(VTaps / 6 * dml_min(1, HRatio), HRatio * VRatio /
> -                       *PSCL_THROUGHPUT, 1);
> -
> -       if ((HTaps > 6 || VTaps > 6) && DPPCLKUsingdoubleDPPLuma < 2 * PixelClock)
> -               DPPCLKUsingdoubleDPPLuma = 2 * PixelClock;
> -
> -       if ((SourcePixelFormat != dm_420_8 && SourcePixelFormat != dm_420_10 && SourcePixelFormat != dm_420_12 &&
> -                       SourcePixelFormat != dm_rgbe_alpha)) {
> -               *PSCL_THROUGHPUT_CHROMA = 0;
> -               *DPPCLKUsingdoubleDPP = DPPCLKUsingdoubleDPPLuma;
> -       } else {
> -               if (HRatioChroma > 1) {
> -                       *PSCL_THROUGHPUT_CHROMA = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput *
> -                                       HRatioChroma / dml_ceil((double) HTapsChroma / 6.0, 1.0));
> -               } else {
> -                       *PSCL_THROUGHPUT_CHROMA = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput);
> -               }
> -               DPPCLKUsingdoubleDPPChroma = PixelClock * dml_max3(VTapsChroma / 6 * dml_min(1, HRatioChroma),
> -                               HRatioChroma * VRatioChroma / *PSCL_THROUGHPUT_CHROMA, 1);
> -               if ((HTapsChroma > 6 || VTapsChroma > 6) && DPPCLKUsingdoubleDPPChroma < 2 * PixelClock)
> -                       DPPCLKUsingdoubleDPPChroma = 2 * PixelClock;
> -               *DPPCLKUsingdoubleDPP = dml_max(DPPCLKUsingdoubleDPPLuma, DPPCLKUsingdoubleDPPChroma);
> -       }
> -}
> -
>  void dml32_CalculateSwathAndDETConfiguration(
>                 unsigned int DETSizeOverride[],
>                 enum dm_use_mall_for_pstate_change_mode UseMALLForPStateChange[],
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable
  2022-07-14 16:45 ` [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable Maíra Canal
@ 2022-07-18 18:55   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 18:55 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> Remove the unused unsigned int NumberOfStates from the file, which was
> declared but never hooked up.
>
> This was pointed by clang with the following warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:33:27:
> warning: unused variable 'NumberOfStates' [-Wunused-const-variable]
> static const unsigned int NumberOfStates = DC__VOLTAGE_STATES;
>                           ^
> 1 warning generated.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
> index c6c3a9e6731a..dff8f8f27de4 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
> @@ -30,8 +30,6 @@
>  #include "../dml_inline_defs.h"
>  #include "display_mode_vba_util_32.h"
>
> -static const unsigned int NumberOfStates = DC__VOLTAGE_STATES;
> -
>  void dml32_recalculate(struct display_mode_lib *mode_lib);
>  static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(
>                 struct display_mode_lib *mode_lib);
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params
  2022-07-14 16:45 ` [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params Maíra Canal
@ 2022-07-18 18:56   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 18:56 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> Remove the variables dispclk_delay_subtotal and dppclk_delay_subtotal from
> the function dml_rq_dlg_get_dlg_params.
>
> This was pointed by clang with the following warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:920:15:
> warning: variable 'dispclk_delay_subtotal' set but not used [-Wunused-but-set-variable]
>         unsigned int dispclk_delay_subtotal;
>                      ^
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:919:15:
> warning: variable 'dppclk_delay_subtotal' set but not used [-Wunused-but-set-variable]
>         unsigned int dppclk_delay_subtotal;
>                      ^
> 2 warnings generated.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  .../dc/dml/dcn31/display_rq_dlg_calc_31.c     | 19 -------------------
>  1 file changed, 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> index c94cf6e01e25..66b82e4f05c6 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
> @@ -866,7 +866,6 @@ static void dml_rq_dlg_get_dlg_params(
>  {
>         const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;
>         const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;
> -       const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout;
>         const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg;
>         const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;
>         const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;
> @@ -916,9 +915,6 @@ static void dml_rq_dlg_get_dlg_params(
>         unsigned int vupdate_width;
>         unsigned int vready_offset;
>
> -       unsigned int dppclk_delay_subtotal;
> -       unsigned int dispclk_delay_subtotal;
> -
>         unsigned int vstartup_start;
>         unsigned int dst_x_after_scaler;
>         unsigned int dst_y_after_scaler;
> @@ -1037,21 +1033,6 @@ static void dml_rq_dlg_get_dlg_params(
>         vupdate_width = dst->vupdate_width;
>         vready_offset = dst->vready_offset;
>
> -       dppclk_delay_subtotal = mode_lib->ip.dppclk_delay_subtotal;
> -       dispclk_delay_subtotal = mode_lib->ip.dispclk_delay_subtotal;
> -
> -       if (scl_enable)
> -               dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl;
> -       else
> -               dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl_lb_only;
> -
> -       dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_cnvc_formatter + src->num_cursors * mode_lib->ip.dppclk_delay_cnvc_cursor;
> -
> -       if (dout->dsc_enable) {
> -               double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // FROM VBA
> -               dispclk_delay_subtotal += dsc_delay;
> -       }
> -
>         vstartup_start = dst->vstartup_start;
>         if (interlaced) {
>                 if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_end / 2.0)
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 07/12] drm/amd/display: Remove unused value0 variable
  2022-07-14 16:45 ` [PATCH 07/12] drm/amd/display: Remove unused value0 variable Maíra Canal
@ 2022-07-18 18:58   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 18:58 UTC (permalink / raw)
  To: Maíra Canal, Wentland, Harry
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Christian Koenig

On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> Remove the variable value0 from the function
> dcn10_link_encoder_update_mst_stream_allocation_table.
>
> This was pointed by clang with the following warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.c:1223:11:
> warning: variable 'value0' set but not used [-Wunused-but-set-variable]
>         uint32_t value0 = 0;
>                  ^
> 1 warning generated.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 3 ---
>  1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
> index fbccb7263ad2..ea7d89bc293f 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
> @@ -1220,7 +1220,6 @@ void dcn10_link_encoder_update_mst_stream_allocation_table(
>         const struct link_mst_stream_allocation_table *table)
>  {
>         struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
> -       uint32_t value0 = 0;
>         uint32_t value1 = 0;
>         uint32_t value2 = 0;
>         uint32_t slots = 0;
> @@ -1322,8 +1321,6 @@ void dcn10_link_encoder_update_mst_stream_allocation_table(
>         do {
>                 udelay(10);
>
> -               value0 = REG_READ(DP_MSE_SAT_UPDATE);
> -

There may be a reason to actually read the register here.  @Wentland, Harry?

>                 REG_GET(DP_MSE_SAT_UPDATE,
>                                 DP_MSE_SAT_UPDATE, &value1);
>
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder
  2022-07-14 16:45 ` [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder Maíra Canal
@ 2022-07-18 18:59   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 18:59 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> The variable regval from the function enc1_update_generic_info_packet
> and the variables dynamic_range_rgb and dynamic_range_ycbcr from the
> function enc1_stream_encoder_dp_set_stream_attribute are not currently
> used.
>
> This was pointed by clang with the following warnings:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:62:11:
> warning: variable 'regval' set but not used [-Wunused-but-set-variable]
>         uint32_t regval;
>                  ^
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:262:10:
> warning: variable 'dynamic_range_rgb' set but not used [-Wunused-but-set-variable]
>         uint8_t dynamic_range_rgb = 0; /*full range*/
>                 ^
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.c:263:10:
> warning: variable 'dynamic_range_ycbcr' set but not used [-Wunused-but-set-variable]
>         uint8_t dynamic_range_ycbcr = 1; /*bt709*/
>                 ^
> 3 warnings generated.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  .../drm/amd/display/dc/dcn10/dcn10_stream_encoder.c    | 10 ----------
>  1 file changed, 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
> index c99c6fababa9..484e7cdf00b8 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
> @@ -59,7 +59,6 @@ void enc1_update_generic_info_packet(
>         uint32_t packet_index,
>         const struct dc_info_packet *info_packet)
>  {
> -       uint32_t regval;
>         /* TODOFPGA Figure out a proper number for max_retries polling for lock
>          * use 50 for now.
>          */
> @@ -88,7 +87,6 @@ void enc1_update_generic_info_packet(
>         REG_UPDATE(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, 1);
>
>         /* choose which generic packet to use */
> -       regval = REG_READ(AFMT_VBI_PACKET_CONTROL);
>         REG_UPDATE(AFMT_VBI_PACKET_CONTROL,
>                         AFMT_GENERIC_INDEX, packet_index);
>
> @@ -259,8 +257,6 @@ void enc1_stream_encoder_dp_set_stream_attribute(
>         uint32_t h_back_porch;
>         uint8_t synchronous_clock = 0; /* asynchronous mode */
>         uint8_t colorimetry_bpc;
> -       uint8_t dynamic_range_rgb = 0; /*full range*/
> -       uint8_t dynamic_range_ycbcr = 1; /*bt709*/
>         uint8_t dp_pixel_encoding = 0;
>         uint8_t dp_component_depth = 0;
>
> @@ -372,18 +368,15 @@ void enc1_stream_encoder_dp_set_stream_attribute(
>         switch (output_color_space) {
>         case COLOR_SPACE_SRGB:
>                 misc1 = misc1 & ~0x80; /* bit7 = 0*/
> -               dynamic_range_rgb = 0; /*full range*/
>                 break;
>         case COLOR_SPACE_SRGB_LIMITED:
>                 misc0 = misc0 | 0x8; /* bit3=1 */
>                 misc1 = misc1 & ~0x80; /* bit7 = 0*/
> -               dynamic_range_rgb = 1; /*limited range*/
>                 break;
>         case COLOR_SPACE_YCBCR601:
>         case COLOR_SPACE_YCBCR601_LIMITED:
>                 misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */
>                 misc1 = misc1 & ~0x80; /* bit7 = 0*/
> -               dynamic_range_ycbcr = 0; /*bt601*/
>                 if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
>                         misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */
>                 else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444)
> @@ -393,15 +386,12 @@ void enc1_stream_encoder_dp_set_stream_attribute(
>         case COLOR_SPACE_YCBCR709_LIMITED:
>                 misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */
>                 misc1 = misc1 & ~0x80; /* bit7 = 0*/
> -               dynamic_range_ycbcr = 1; /*bt709*/
>                 if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR422)
>                         misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */
>                 else if (hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR444)
>                         misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */
>                 break;
>         case COLOR_SPACE_2020_RGB_LIMITEDRANGE:
> -               dynamic_range_rgb = 1; /*limited range*/
> -               break;
>         case COLOR_SPACE_2020_RGB_FULLRANGE:
>         case COLOR_SPACE_2020_YCBCR:
>         case COLOR_SPACE_XR_RGB:
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable
  2022-07-14 16:45 ` [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable Maíra Canal
@ 2022-07-18 19:00   ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 19:00 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

Alex

On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> Remove the variable MaxUsedBW from the function
> DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation.
> As a side-effect, the variables MaxPerPlaneVActiveWRBandwidth and
> WRBandwidth are also removed.
>
> This was pointed by clang with the following warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3043:10:
> warning: variable 'MaxUsedBW' set but not used [-Wunused-but-set-variable]
>                 double MaxUsedBW = 0;
>                        ^
> 1 warning generated.
>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  .../dc/dml/dcn30/display_mode_vba_30.c        | 28 -------------------
>  1 file changed, 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> index 842eb94ebe04..876b321b30ca 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> @@ -3037,40 +3037,12 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
>
>         {
>                 //Maximum Bandwidth Used
> -               double TotalWRBandwidth = 0;
> -               double MaxPerPlaneVActiveWRBandwidth = 0;
> -               double WRBandwidth = 0;
> -               double MaxUsedBW = 0;
> -               for (k = 0; k < v->NumberOfActivePlanes; ++k) {
> -                       if (v->WritebackEnable[k] == true
> -                                       && v->WritebackPixelFormat[k] == dm_444_32) {
> -                               WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
> -                                               / (v->HTotal[k] * v->WritebackSourceHeight[k] / v->PixelClock[k]) * 4;
> -                       } else if (v->WritebackEnable[k] == true) {
> -                               WRBandwidth = v->WritebackDestinationWidth[k] * v->WritebackDestinationHeight[k]
> -                                               / (v->HTotal[k] * v->WritebackSourceHeight[k] / v->PixelClock[k]) * 8;
> -                       }
> -                       TotalWRBandwidth = TotalWRBandwidth + WRBandwidth;
> -                       MaxPerPlaneVActiveWRBandwidth = dml_max(MaxPerPlaneVActiveWRBandwidth, WRBandwidth);
> -               }
> -
>                 v->TotalDataReadBandwidth = 0;
>                 for (k = 0; k < v->NumberOfActivePlanes; ++k) {
>                         v->TotalDataReadBandwidth = v->TotalDataReadBandwidth
>                                         + v->ReadBandwidthPlaneLuma[k]
>                                         + v->ReadBandwidthPlaneChroma[k];
>                 }
> -
> -               {
> -                       double MaxPerPlaneVActiveRDBandwidth = 0;
> -                       for (k = 0; k < v->NumberOfActivePlanes; ++k) {
> -                               MaxPerPlaneVActiveRDBandwidth = dml_max(MaxPerPlaneVActiveRDBandwidth,
> -                                               v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k]);
> -
> -                       }
> -               }
> -
> -               MaxUsedBW = MaxTotalRDBandwidth + TotalWRBandwidth;
>         }
>
>         // VStartup Margin
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK
  2022-07-14 16:45 ` [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK Maíra Canal
@ 2022-07-18 19:02   ` Alex Deucher
  2022-07-19 10:49     ` Maíra Canal
  0 siblings, 1 reply; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 19:02 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> The parameters WritebackPixelFormat and WritebackVRatio are removed as
> they are not used on the function dml30_CalculateWriteBackDISPCLK.

Maybe this is done for consistency with other dml code for other DCN blocks?

Alex

>
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c        | 2 --
>  .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c  | 6 ------
>  .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h  | 2 --
>  3 files changed, 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
> index a8db1306750e..746bb93ade6c 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
> @@ -322,10 +322,8 @@ void dcn30_fpu_populate_dml_writeback_from_context(
>                                  * parameters per pipe
>                                  */
>                                 writeback_dispclk = dml30_CalculateWriteBackDISPCLK(
> -                                               dout_wb.wb_pixel_format,
>                                                 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,
>                                                 dout_wb.wb_hratio,
> -                                               dout_wb.wb_vratio,
>                                                 dout_wb.wb_htaps_luma,
>                                                 dout_wb.wb_vtaps_luma,
>                                                 dout_wb.wb_src_width,
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> index 876b321b30ca..37049daaab4c 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> @@ -1938,10 +1938,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
>                 if (v->WritebackEnable[k]) {
>                         v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK,
>                                 dml30_CalculateWriteBackDISPCLK(
> -                                               v->WritebackPixelFormat[k],
>                                                 v->PixelClock[k],
>                                                 v->WritebackHRatio[k],
> -                                               v->WritebackVRatio[k],
>                                                 v->WritebackHTaps[k],
>                                                 v->WritebackVTaps[k],
>                                                 v->WritebackSourceWidth[k],
> @@ -3284,10 +3282,8 @@ static double CalculateTWait(
>  }
>
>  double dml30_CalculateWriteBackDISPCLK(
> -               enum source_format_class WritebackPixelFormat,
>                 double PixelClock,
>                 double WritebackHRatio,
> -               double WritebackVRatio,
>                 unsigned int WritebackHTaps,
>                 unsigned int WritebackVTaps,
>                 long   WritebackSourceWidth,
> @@ -3794,10 +3790,8 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
>                 if (v->WritebackEnable[k] == true) {
>                         v->WritebackRequiredDISPCLK = dml_max(v->WritebackRequiredDISPCLK,
>                                         dml30_CalculateWriteBackDISPCLK(
> -                                                       v->WritebackPixelFormat[k],
>                                                         v->PixelClock[k],
>                                                         v->WritebackHRatio[k],
> -                                                       v->WritebackVRatio[k],
>                                                         v->WritebackHTaps[k],
>                                                         v->WritebackVTaps[k],
>                                                         v->WritebackSourceWidth[k],
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
> index daaf0883b84d..12c070434eee 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
> @@ -29,10 +29,8 @@
>  void dml30_recalculate(struct display_mode_lib *mode_lib);
>  void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
>  double dml30_CalculateWriteBackDISPCLK(
> -               enum source_format_class WritebackPixelFormat,
>                 double PixelClock,
>                 double WritebackHRatio,
> -               double WritebackVRatio,
>                 unsigned int WritebackHTaps,
>                 unsigned int WritebackVTaps,
>                 long   WritebackSourceWidth,
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
  2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
                   ` (12 preceding siblings ...)
  2022-07-15  1:56 ` André Almeida
@ 2022-07-18 19:07 ` Alex Deucher
  13 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-18 19:07 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

Applied.  Thanks!

On Thu, Jul 14, 2022 at 12:45 PM Maíra Canal <mairacanal@riseup.net> wrote:
>
> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
> should be written into the control register instead of 0.
>
> Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
> Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")
> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> ---
>  drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +-
>  drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
> index f5a29526684d..0a7b1c002822 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
> @@ -339,7 +339,7 @@ static void dce_v6_0_hpd_fini(struct amdgpu_device *adev)
>
>                 tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);
>                 tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;
> -               WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0);
> +               WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);
>
>                 amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);
>         }
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> index 780a8aa972fe..f57f4a25cf5a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> @@ -333,7 +333,7 @@ static void dce_v8_0_hpd_fini(struct amdgpu_device *adev)
>
>                 tmp = RREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd]);
>                 tmp &= ~DC_HPD1_CONTROL__DC_HPD1_EN_MASK;
> -               WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], 0);
> +               WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);
>
>                 amdgpu_irq_put(adev, &adev->hpd_irq, amdgpu_connector->hpd.hpd);
>         }
> --
> 2.36.1
>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK
  2022-07-18 19:02   ` Alex Deucher
@ 2022-07-19 10:49     ` Maíra Canal
  2022-07-19 13:03       ` Alex Deucher
  0 siblings, 1 reply; 29+ messages in thread
From: Maíra Canal @ 2022-07-19 10:49 UTC (permalink / raw)
  To: Alex Deucher
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

On 7/18/22 16:02, Alex Deucher wrote:
> On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
>>
>> The parameters WritebackPixelFormat and WritebackVRatio are removed as
>> they are not used on the function dml30_CalculateWriteBackDISPCLK.
> 
> Maybe this is done for consistency with other dml code for other DCN blocks?
> 
> Alex

This is reasonable. Anyway, the functions
dml30_CalculateWriteBackDISPCLK and dml31_CalculateWriteBackDISPCLK are
identical. May I send a v2 from PATCH 11/12 with the original function
signature?

Best Regards,
- Maíra Canal

> 
>>
>> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
>> ---
>>  drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c        | 2 --
>>  .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c  | 6 ------
>>  .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h  | 2 --
>>  3 files changed, 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
>> index a8db1306750e..746bb93ade6c 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
>> @@ -322,10 +322,8 @@ void dcn30_fpu_populate_dml_writeback_from_context(
>>                                  * parameters per pipe
>>                                  */
>>                                 writeback_dispclk = dml30_CalculateWriteBackDISPCLK(
>> -                                               dout_wb.wb_pixel_format,
>>                                                 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,
>>                                                 dout_wb.wb_hratio,
>> -                                               dout_wb.wb_vratio,
>>                                                 dout_wb.wb_htaps_luma,
>>                                                 dout_wb.wb_vtaps_luma,
>>                                                 dout_wb.wb_src_width,
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
>> index 876b321b30ca..37049daaab4c 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
>> @@ -1938,10 +1938,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
>>                 if (v->WritebackEnable[k]) {
>>                         v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK,
>>                                 dml30_CalculateWriteBackDISPCLK(
>> -                                               v->WritebackPixelFormat[k],
>>                                                 v->PixelClock[k],
>>                                                 v->WritebackHRatio[k],
>> -                                               v->WritebackVRatio[k],
>>                                                 v->WritebackHTaps[k],
>>                                                 v->WritebackVTaps[k],
>>                                                 v->WritebackSourceWidth[k],
>> @@ -3284,10 +3282,8 @@ static double CalculateTWait(
>>  }
>>
>>  double dml30_CalculateWriteBackDISPCLK(
>> -               enum source_format_class WritebackPixelFormat,
>>                 double PixelClock,
>>                 double WritebackHRatio,
>> -               double WritebackVRatio,
>>                 unsigned int WritebackHTaps,
>>                 unsigned int WritebackVTaps,
>>                 long   WritebackSourceWidth,
>> @@ -3794,10 +3790,8 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
>>                 if (v->WritebackEnable[k] == true) {
>>                         v->WritebackRequiredDISPCLK = dml_max(v->WritebackRequiredDISPCLK,
>>                                         dml30_CalculateWriteBackDISPCLK(
>> -                                                       v->WritebackPixelFormat[k],
>>                                                         v->PixelClock[k],
>>                                                         v->WritebackHRatio[k],
>> -                                                       v->WritebackVRatio[k],
>>                                                         v->WritebackHTaps[k],
>>                                                         v->WritebackVTaps[k],
>>                                                         v->WritebackSourceWidth[k],
>> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
>> index daaf0883b84d..12c070434eee 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
>> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
>> @@ -29,10 +29,8 @@
>>  void dml30_recalculate(struct display_mode_lib *mode_lib);
>>  void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
>>  double dml30_CalculateWriteBackDISPCLK(
>> -               enum source_format_class WritebackPixelFormat,
>>                 double PixelClock,
>>                 double WritebackHRatio,
>> -               double WritebackVRatio,
>>                 unsigned int WritebackHTaps,
>>                 unsigned int WritebackVTaps,
>>                 long   WritebackSourceWidth,
>> --
>> 2.36.1
>>

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK
  2022-07-19 10:49     ` Maíra Canal
@ 2022-07-19 13:03       ` Alex Deucher
  0 siblings, 0 replies; 29+ messages in thread
From: Alex Deucher @ 2022-07-19 13:03 UTC (permalink / raw)
  To: Maíra Canal
  Cc: Magali Lemes, Leo Li, Tales Lelo da Aparecida, xinhui pan,
	Rodrigo Siqueira, LKML, amd-gfx list, Nicholas Kazlauskas,
	Melissa Wen, David Airlie, Dmytro Laktyushkin, Aurabindo Pillai,
	Daniel Vetter, Alex Deucher, Isabella Basso, andrealmeid,
	Harry Wentland, Christian Koenig

On Tue, Jul 19, 2022 at 6:49 AM Maíra Canal <mairacanal@riseup.net> wrote:
>
> On 7/18/22 16:02, Alex Deucher wrote:
> > On Thu, Jul 14, 2022 at 12:46 PM Maíra Canal <mairacanal@riseup.net> wrote:
> >>
> >> The parameters WritebackPixelFormat and WritebackVRatio are removed as
> >> they are not used on the function dml30_CalculateWriteBackDISPCLK.
> >
> > Maybe this is done for consistency with other dml code for other DCN blocks?
> >
> > Alex
>
> This is reasonable. Anyway, the functions
> dml30_CalculateWriteBackDISPCLK and dml31_CalculateWriteBackDISPCLK are
> identical. May I send a v2 from PATCH 11/12 with the original function
> signature?

Sounds good.  Thanks!

Alex

>
> Best Regards,
> - Maíra Canal
>
> >
> >>
> >> Signed-off-by: Maíra Canal <mairacanal@riseup.net>
> >> ---
> >>  drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c        | 2 --
> >>  .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c  | 6 ------
> >>  .../gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h  | 2 --
> >>  3 files changed, 10 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
> >> index a8db1306750e..746bb93ade6c 100644
> >> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
> >> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
> >> @@ -322,10 +322,8 @@ void dcn30_fpu_populate_dml_writeback_from_context(
> >>                                  * parameters per pipe
> >>                                  */
> >>                                 writeback_dispclk = dml30_CalculateWriteBackDISPCLK(
> >> -                                               dout_wb.wb_pixel_format,
> >>                                                 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz,
> >>                                                 dout_wb.wb_hratio,
> >> -                                               dout_wb.wb_vratio,
> >>                                                 dout_wb.wb_htaps_luma,
> >>                                                 dout_wb.wb_vtaps_luma,
> >>                                                 dout_wb.wb_src_width,
> >> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> >> index 876b321b30ca..37049daaab4c 100644
> >> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> >> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
> >> @@ -1938,10 +1938,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
> >>                 if (v->WritebackEnable[k]) {
> >>                         v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK,
> >>                                 dml30_CalculateWriteBackDISPCLK(
> >> -                                               v->WritebackPixelFormat[k],
> >>                                                 v->PixelClock[k],
> >>                                                 v->WritebackHRatio[k],
> >> -                                               v->WritebackVRatio[k],
> >>                                                 v->WritebackHTaps[k],
> >>                                                 v->WritebackVTaps[k],
> >>                                                 v->WritebackSourceWidth[k],
> >> @@ -3284,10 +3282,8 @@ static double CalculateTWait(
> >>  }
> >>
> >>  double dml30_CalculateWriteBackDISPCLK(
> >> -               enum source_format_class WritebackPixelFormat,
> >>                 double PixelClock,
> >>                 double WritebackHRatio,
> >> -               double WritebackVRatio,
> >>                 unsigned int WritebackHTaps,
> >>                 unsigned int WritebackVTaps,
> >>                 long   WritebackSourceWidth,
> >> @@ -3794,10 +3790,8 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
> >>                 if (v->WritebackEnable[k] == true) {
> >>                         v->WritebackRequiredDISPCLK = dml_max(v->WritebackRequiredDISPCLK,
> >>                                         dml30_CalculateWriteBackDISPCLK(
> >> -                                                       v->WritebackPixelFormat[k],
> >>                                                         v->PixelClock[k],
> >>                                                         v->WritebackHRatio[k],
> >> -                                                       v->WritebackVRatio[k],
> >>                                                         v->WritebackHTaps[k],
> >>                                                         v->WritebackVTaps[k],
> >>                                                         v->WritebackSourceWidth[k],
> >> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
> >> index daaf0883b84d..12c070434eee 100644
> >> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
> >> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h
> >> @@ -29,10 +29,8 @@
> >>  void dml30_recalculate(struct display_mode_lib *mode_lib);
> >>  void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
> >>  double dml30_CalculateWriteBackDISPCLK(
> >> -               enum source_format_class WritebackPixelFormat,
> >>                 double PixelClock,
> >>                 double WritebackHRatio,
> >> -               double WritebackVRatio,
> >>                 unsigned int WritebackHTaps,
> >>                 unsigned int WritebackVTaps,
> >>                 long   WritebackSourceWidth,
> >> --
> >> 2.36.1
> >>

^ permalink raw reply	[flat|nested] 29+ messages in thread

end of thread, other threads:[~2022-07-19 13:03 UTC | newest]

Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-07-14 16:44 [PATCH 01/12] drm/amdgpu: Write masked value to control register Maíra Canal
2022-07-14 16:44 ` [PATCH 02/12] drm/amd/display: Change get_pipe_idx function scope Maíra Canal
2022-07-18 18:52   ` Alex Deucher
2022-07-14 16:44 ` [PATCH 03/12] drm/amd/display: Remove unused clk_src variable Maíra Canal
2022-07-18 18:53   ` Alex Deucher
2022-07-14 16:44 ` [PATCH 04/12] drm/amd/display: Remove unused dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function Maíra Canal
2022-07-18 18:54   ` Alex Deucher
2022-07-14 16:45 ` [PATCH 05/12] drm/amd/display: Remove unused NumberOfStates variable Maíra Canal
2022-07-18 18:55   ` Alex Deucher
2022-07-14 16:45 ` [PATCH 06/12] drm/amd/display: Remove unused variables from dml_rq_dlg_get_dlg_params Maíra Canal
2022-07-18 18:56   ` Alex Deucher
2022-07-14 16:45 ` [PATCH 07/12] drm/amd/display: Remove unused value0 variable Maíra Canal
2022-07-18 18:58   ` Alex Deucher
2022-07-14 16:45 ` [PATCH 08/12] drm/amd/display: Remove unused variables from dcn10_stream_encoder Maíra Canal
2022-07-18 18:59   ` Alex Deucher
2022-07-14 16:45 ` [PATCH 09/12] drm/amd/display: Remove unused MaxUsedBW variable Maíra Canal
2022-07-18 19:00   ` Alex Deucher
2022-07-14 16:45 ` [PATCH 10/12] drm/amd/display: Remove parameters from dml30_CalculateWriteBackDISPCLK Maíra Canal
2022-07-18 19:02   ` Alex Deucher
2022-07-19 10:49     ` Maíra Canal
2022-07-19 13:03       ` Alex Deucher
2022-07-14 16:45 ` [PATCH 11/12] drm/amd/display: Remove duplicated CalculateWriteBackDISPCLK Maíra Canal
2022-07-14 16:45 ` [PATCH 12/12] drm/amd/display: Rewrite CalculateWriteBackDISPCLK function Maíra Canal
2022-07-15  1:53   ` André Almeida
2022-07-14 19:04 ` [PATCH 01/12] drm/amdgpu: Write masked value to control register André Almeida
2022-07-14 19:14   ` Alex Deucher
2022-07-14 19:20     ` André Almeida
2022-07-15  1:56 ` André Almeida
2022-07-18 19:07 ` Alex Deucher

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