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From: "Zhang, Dingchen (David)" <Dingchen.Zhang@amd.com>
To: "VURDIGERENATARAJ, CHANDAN" <CHANDAN.VURDIGERENATARAJ@amd.com>,
	"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Cc: "Wang, Chao-kai \(Stylon\)" <Stylon.Wang@amd.com>,
	"Li, Sun peng \(Leo\)" <Sunpeng.Li@amd.com>,
	"Lakha,  Bhawanpreet" <Bhawanpreet.Lakha@amd.com>,
	"Zhuo, Qingqing \(Lillian\)" <Qingqing.Zhuo@amd.com>,
	"Siqueira, Rodrigo" <Rodrigo.Siqueira@amd.com>,
	"Li, Roman" <Roman.Li@amd.com>,
	"Chiu, Solomon" <Solomon.Chiu@amd.com>,
	"Zuo, Jerry" <Jerry.Zuo@amd.com>,
	"Pillai, Aurabindo" <Aurabindo.Pillai@amd.com>,
	"Lin, Wayne" <Wayne.Lin@amd.com>,
	"Wentland, Harry" <Harry.Wentland@amd.com>,
	"Gutierrez, Agustin" <Agustin.Gutierrez@amd.com>,
	"Kotarac, Pavle" <Pavle.Kotarac@amd.com>
Subject: Re: [PATCH 05/17] drm/amd/display: revise Start/End SDP data
Date: Mon, 9 May 2022 14:02:31 +0000	[thread overview]
Message-ID: <BN9PR12MB514555966520A0B1ACC7F5E68DC69@BN9PR12MB5145.namprd12.prod.outlook.com> (raw)
In-Reply-To: <MW4PR12MB5668092BC7B387636C86877A96C69@MW4PR12MB5668.namprd12.prod.outlook.com>

[AMD Official Use Only - General]

Thanks Chandan for the comment, will revise the patch.

DZ


From: VURDIGERENATARAJ, CHANDAN <CHANDAN.VURDIGERENATARAJ@amd.com>
Sent: Monday, May 9, 2022 4:26 AM
To: Zhang, Dingchen (David) <Dingchen.Zhang@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Wang, Chao-kai (Stylon) <Stylon.Wang@amd.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Wentland, Harry <Harry.Wentland@amd.com>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Li, Roman <Roman.Li@amd.com>; Chiu, Solomon <Solomon.Chiu@amd.com>; Zuo, Jerry <Jerry.Zuo@amd.com>; Pillai, Aurabindo <Aurabindo.Pillai@amd.com>; Lin, Wayne <Wayne.Lin@amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>; Gutierrez, Agustin <Agustin.Gutierrez@amd.com>; Kotarac, Pavle <Pavle.Kotarac@amd.com>
Subject: RE: [PATCH 05/17] drm/amd/display: revise Start/End SDP data

Hi,

Why not set  "vsc_packet_rev2" when "stream->link->psr_settings.psr_version == DC_PSR_VERSION_1"?
This would be safer for future PSR versions also.

BR,
Chandan V N

>[why & how]
>We need to implement the VSC packet rev4 that is required by PSRSU.
>
>Follow the eDP 1.5 spec pg. 257
>
>Signed-off-by: David Zhang <dingchen.zhang@amd.com>
>---
> .../display/modules/info_packet/info_packet.c | 29 +++++++++++++++++--
> 1 file changed, 27 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
>index 79bc207415bc..c7d1b48c0478 100644
>--- a/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
>+++ b/drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
>@@ -145,8 +145,10 @@ void mod_build_vsc_infopacket(const struct dc_stream_state *stream,
>                stereo3dSupport = true;
>        }
>
>-      /*VSC packet set to 2 when DP revision >= 1.2*/
>-      if (stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED)
>+      /*VSC packet set to 4 for PSR-SU, or 2 for all other PSR support cases*/
>+      if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
>+              vsc_packet_revision = vsc_packet_rev4;
>+      else if (stream->link->psr_settings.psr_version !=
>+DC_PSR_VERSION_UNSUPPORTED)
>                vsc_packet_revision = vsc_packet_rev2;
>
>        /* Update to revision 5 for extended colorimetry support */ @@ -159,6 +161,29 @@ void mod_build_vsc_infopacket(const struct >dc_stream_state *stream,
>        if (vsc_packet_revision == vsc_packet_undefined)
>                return;
>
>+      if (vsc_packet_revision == vsc_packet_rev4) {
>+              /* Secondary-data Packet ID = 0*/
>+              info_packet->hb0 = 0x00;
>+              /* 07h - Packet Type Value indicating Video
>+               * Stream Configuration packet
>+               */
>+              info_packet->hb1 = 0x07;
>+              /* 04h = VSC SDP supporting 3D stereo + PSR/PSR2 + Y-coordinate
>+               * (applies to eDP v1.4 or higher).
>+               */
>+              info_packet->hb2 = 0x04;
>+              /* 0Eh = VSC SDP supporting 3D stereo + PSR2
>+               * (HB2 = 04h), with Y-coordinate of first scan
>+               * line of the SU region
>+               */
>+              info_packet->hb3 = 0x0E;
>+
>+              for (i = 0; i < 28; i++)
>+                      info_packet->sb[i] = 0;
>+
>+              info_packet->valid = true;
>+      }
>+
>        if (vsc_packet_revision == vsc_packet_rev2) {
>                /* Secondary-data Packet ID = 0*/
>                info_packet->hb0 = 0x00;
>--
>2.25.1

  reply	other threads:[~2022-05-09 14:02 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-05 14:23 [PATCH 00/17] enable PSR-SU MPO for amdpgu David Zhang
2022-05-05 14:23 ` [PATCH 01/17] drm/amd/display: align dmub cmd header to latest dmub FW to support PSR-SU David Zhang
2022-05-05 14:23 ` [PATCH 02/17] drm/amd/display: feed PSR-SU as psr version to dmub FW David Zhang
2022-05-05 14:23 ` [PATCH 03/17] drm/amd/display: combine dirty rectangles in DMUB FW David Zhang
2022-05-09  8:12   ` VURDIGERENATARAJ, CHANDAN
2022-05-09 13:41     ` Zhang, Dingchen (David)
2022-05-05 14:23 ` [PATCH 04/17] drm/amd/display: update GSP1 generic info packet for PSRSU David Zhang
2022-05-05 14:23 ` [PATCH 05/17] drm/amd/display: revise Start/End SDP data David Zhang
2022-05-09  8:26   ` VURDIGERENATARAJ, CHANDAN
2022-05-09 14:02     ` Zhang, Dingchen (David) [this message]
2022-05-05 14:23 ` [PATCH 06/17] drm/amd/display: program PSR2 DPCD Configuration David Zhang
2022-05-05 14:23 ` [PATCH 07/17] drm/amd/display: Passing Y-granularity to dmub fw David Zhang
2022-05-05 14:23 ` [PATCH 08/17] drm/amd/display: Set default value of line_capture_indication David Zhang
2022-05-05 14:23 ` [PATCH 09/17] drm/amd/display: add vline time in micro sec to PSR context David Zhang
2022-05-05 14:23 ` [PATCH 10/17] drm/amd/display: fix system hang when PSR exits David Zhang
2022-05-05 14:23 ` [PATCH 11/17] drm/amd/display: Set PSR level to enable ALPM by default David Zhang
2022-05-05 14:23 ` [PATCH 12/17] drm/amd/display: use HW lock mgr for PSR-SU David Zhang
2022-05-05 14:23 ` [PATCH 13/17] drm/amd/display: PSRSU+DSC WA for specific TCON David Zhang
2022-05-05 14:23 ` [PATCH 14/17] drm/amd/display: add shared helpers to update psr config fields to power module David Zhang
2022-05-09  8:42   ` VURDIGERENATARAJ, CHANDAN
2022-05-09 14:09     ` Zhang, Dingchen (David)
2022-05-05 14:23 ` [PATCH 15/17] drm/amd/display: calculate psr config settings in runtime in DM David Zhang
2022-05-05 14:23 ` [PATCH 16/17] drm/amd/display: update cursor position to DMUB FW David Zhang
2022-05-05 14:23 ` [PATCH 17/17] drm/amd/display: Implement MPO PSR SU David Zhang

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