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boundary="===============0474533309==" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" --===============0474533309== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_BYAPR12MB28400AAEF6B34676B1CAD5E9F4599BYAPR12MB2840namp_" --_000_BYAPR12MB28400AAEF6B34676B1CAD5E9F4599BYAPR12MB2840namp_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable [AMD Official Use Only - Internal Distribution Only] Thanks, Do we know when those changes will make it back to amd-staging-drm-next ? ________________________________ From: Christian K=F6nig Sent: Wednesday, May 5, 2021 12:27 AM To: Alex Deucher Cc: Deng, Emily ; Deucher, Alexander ; amd-gfx list ; Sun, Roy ; Nieto, David M Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track I had to rebase them and was on sick leave last week. Changed a few things on patch #1 and pushed the result a minute ago. Christian. Am 04.05.21 um 22:23 schrieb Alex Deucher: > Did you push this yet? I don't see it in drm-misc. > > Thanks, > > Alex > > On Wed, Apr 28, 2021 at 5:06 AM Christian K=F6nig > wrote: >> Well none. As I said I will push this upstream through drm-misc-next. >> >> Christian. >> >> Am 28.04.21 um 10:32 schrieb Deng, Emily: >> >> [AMD Official Use Only - Internal Distribution Only] >> >> >> Hi Alex and Christian, >> >> What extra work Roy need to do about this patch? And fdinfo? >> >> >> >> Best wishes >> >> Emily Deng >> >> From: amd-gfx On Behalf Of Deuch= er, Alexander >> Sent: Tuesday, April 27, 2021 3:52 AM >> To: Christian K=F6nig >> Cc: Sun, Roy ; amd-gfx list ; Nieto, David M >> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track >> >> >> >> [AMD Official Use Only - Internal Distribution Only] >> >> >> >> [AMD Official Use Only - Internal Distribution Only] >> >> >> >> Fair point. Either way works for me. >> >> >> >> Alex >> >> ________________________________ >> >> From: Christian K=F6nig >> Sent: Monday, April 26, 2021 3:48 PM >> To: Deucher, Alexander >> Cc: amd-gfx list ; Sun, Roy ; Nieto, David M >> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track >> >> >> >> My concern is more to get this tested from more people than just AMD. >> >> Christian. >> >> Am 26.04.21 um 21:40 schrieb Deucher, Alexander: >> >> [AMD Official Use Only - Internal Distribution Only] >> >> >> >> That said, it would be easier for me to merge through the AMD tree since= a relatively big AMD feature depends on it. Not sure how much conflict po= tential there is if this goes through the AMD tree. >> >> >> >> Alex >> >> >> >> ________________________________ >> >> From: amd-gfx on behalf of Deuch= er, Alexander >> Sent: Monday, April 26, 2021 3:24 PM >> To: Christian K=F6nig >> Cc: amd-gfx list ; Sun, Roy ; Nieto, David M >> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track >> >> >> >> [AMD Official Use Only - Internal Distribution Only] >> >> >> >> [AMD Official Use Only - Internal Distribution Only] >> >> >> >> No objections from me. >> >> >> >> Thanks! >> >> >> >> Alex >> >> >> >> ________________________________ >> >> From: Christian K=F6nig >> Sent: Monday, April 26, 2021 2:49 AM >> To: Deucher, Alexander >> Cc: Nieto, David M ; Sun, Roy ; am= d-gfx list >> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track >> >> >> >> Hey Alex, >> >> any objections that we merge those two patches through drm-misc-next? >> >> Thanks, >> Christian. >> >> Am 26.04.21 um 08:27 schrieb Roy Sun: >>> Update the timestamp of scheduled fence on HW >>> completion of the previous fences >>> >>> This allow more accurate tracking of the fence >>> execution in HW >>> >>> Signed-off-by: David M Nieto >>> Signed-off-by: Roy Sun >>> --- >>> drivers/gpu/drm/scheduler/sched_main.c | 12 ++++++++++-- >>> 1 file changed, 10 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/s= cheduler/sched_main.c >>> index 92d8de24d0a1..f8e39ab0c41b 100644 >>> --- a/drivers/gpu/drm/scheduler/sched_main.c >>> +++ b/drivers/gpu/drm/scheduler/sched_main.c >>> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gpu_schedul= er *sched) >>> EXPORT_SYMBOL(drm_sched_resubmit_jobs); >>> >>> /** >>> - * drm_sched_resubmit_jobs_ext - helper to relunch certain number of j= obs from mirror ring list >>> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain number of = jobs from pending list >>> * >>> * @sched: scheduler instance >>> * @max: job numbers to relaunch >>> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_scheduler *s= ched) >>> static struct drm_sched_job * >>> drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) >>> { >>> - struct drm_sched_job *job; >>> + struct drm_sched_job *job, *next; >>> >>> /* >>> * Don't destroy jobs while the timeout worker is running OR t= hread >>> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler= *sched) >>> if (job && dma_fence_is_signaled(&job->s_fence->finished)) { >>> /* remove job from pending_list */ >>> list_del_init(&job->list); >>> We just need to record the scheduled time of the next job. So we >>> need not to check the rest job. >>> + /* account for the next fence in the queue */ >>> + next =3D list_first_entry_or_null(&sched->pending_list, >>> + struct drm_sched_job, list); >>> + if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, >>> + &job->s_fence->finished.flags)) { >>> + next->s_fence->scheduled.timestamp =3D >>> + job->s_fence->finished.timestamp; >>> + } >>> } else { >>> job =3D NULL; >>> /* queue timeout for next job */ >> >> >> >> _______________________________________________ >> amd-gfx mailing list >> amd-gfx@lists.freedesktop.org >> https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Flist= s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=3D04%7C01%7CDavid= .Nieto%40amd.com%7C7e7e640953954b94e2d408d90f9744a1%7C3dd8961fe4884e608e11a= 82d994e183d%7C0%7C0%7C637557964635531548%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC= 4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata= =3DYk2XfdFcbeimlcdh3VXWldS1cRD9LA32PMlN0kbfUME%3D&reserved=3D0 --_000_BYAPR12MB28400AAEF6B34676B1CAD5E9F4599BYAPR12MB2840namp_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

[AMD Official Use Only - Internal Distribution Only]


Thanks,

Do we know when those changes will make it back to amd-staging-drm-nex= t ?
From: Christian K=F6nig <= ;ckoenig.leichtzumerken@gmail.com>
Sent: Wednesday, May 5, 2021 12:27 AM
To: Alex Deucher <alexdeucher@gmail.com>
Cc: Deng, Emily <Emily.Deng@amd.com>; Deucher, Alexander <A= lexander.Deucher@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.or= g>; Sun, Roy <Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd= .com>
Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence track=
 
I had to rebase them and was on sick leave last we= ek.

Changed a few things on patch #1 and pushed the result a minute ago.

Christian.

Am 04.05.21 um 22:23 schrieb Alex Deucher:
> Did you push this yet?  I don't see it in drm-misc.
>
> Thanks,
>
> Alex
>
> On Wed, Apr 28, 2021 at 5:06 AM Christian K=F6nig
> <ckoenig.leichtzumerken@gmail.com> wrote:
>> Well none. As I said I will push this upstream through drm-misc-ne= xt.
>>
>> Christian.
>>
>> Am 28.04.21 um 10:32 schrieb Deng, Emily:
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>> Hi Alex and Christian,
>>
>> What extra work Roy need to do about this patch? And fdinfo?
>>
>>
>>
>> Best wishes
>>
>> Emily Deng
>>
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Beh= alf Of Deucher, Alexander
>> Sent: Tuesday, April 27, 2021 3:52 AM
>> To: Christian K=F6nig <ckoenig.leichtzumerken@gmail.com>
>> Cc: Sun, Roy <Roy.Sun@amd.com>; amd-gfx list <amd-gfx@lis= ts.freedesktop.org>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence tra= ck
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> Fair point.  Either way works for me.
>>
>>
>>
>> Alex
>>
>> ________________________________
>>
>> From: Christian K=F6nig <ckoenig.leichtzumerken@gmail.com> >> Sent: Monday, April 26, 2021 3:48 PM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>
>> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy &= lt;Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence tra= ck
>>
>>
>>
>> My concern is more to get this tested from more people than just A= MD.
>>
>> Christian.
>>
>> Am 26.04.21 um 21:40 schrieb Deucher, Alexander:
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> That said, it would be easier for me to merge through the AMD tree= since a relatively big AMD feature depends on it.  Not sure how much = conflict potential there is if this goes through the AMD tree.
>>
>>
>>
>> Alex
>>
>>
>>
>> ________________________________
>>
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on beh= alf of Deucher, Alexander <Alexander.Deucher@amd.com>
>> Sent: Monday, April 26, 2021 3:24 PM
>> To: Christian K=F6nig <ckoenig.leichtzumerken@gmail.com>
>> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Sun, Roy &= lt;Roy.Sun@amd.com>; Nieto, David M <David.Nieto@amd.com>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence tra= ck
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> [AMD Official Use Only - Internal Distribution Only]
>>
>>
>>
>> No objections from me.
>>
>>
>>
>> Thanks!
>>
>>
>>
>> Alex
>>
>>
>>
>> ________________________________
>>
>> From: Christian K=F6nig <ckoenig.leichtzumerken@gmail.com> >> Sent: Monday, April 26, 2021 2:49 AM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>
>> Cc: Nieto, David M <David.Nieto@amd.com>; Sun, Roy <Roy.S= un@amd.com>; amd-gfx list <amd-gfx@lists.freedesktop.org>
>> Subject: Re: [PATCH 1/2] drm/scheduler: Change scheduled fence tra= ck
>>
>>
>>
>> Hey Alex,
>>
>> any objections that we merge those two patches through drm-misc-ne= xt?
>>
>> Thanks,
>> Christian.
>>
>> Am 26.04.21 um 08:27 schrieb Roy Sun:
>>> Update the timestamp of scheduled fence on HW
>>> completion of the previous fences
>>>
>>> This allow more accurate tracking of the fence
>>> execution in HW
>>>
>>> Signed-off-by: David M Nieto <david.nieto@amd.com>
>>> Signed-off-by: Roy Sun <Roy.Sun@amd.com>
>>> ---
>>>    drivers/gpu/drm/scheduler/sched_main.c | 12 = ++++++++++--
>>>    1 file changed, 10 insertions(+), 2 deletion= s(-)
>>>
>>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/= gpu/drm/scheduler/sched_main.c
>>> index 92d8de24d0a1..f8e39ab0c41b 100644
>>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>>> @@ -515,7 +515,7 @@ void drm_sched_resubmit_jobs(struct drm_gp= u_scheduler *sched)
>>>    EXPORT_SYMBOL(drm_sched_resubmit_jobs);
>>>
>>>    /**
>>> - * drm_sched_resubmit_jobs_ext - helper to relunch certain nu= mber of jobs from mirror ring list
>>> + * drm_sched_resubmit_jobs_ext - helper to relaunch certain n= umber of jobs from pending list
>>>     *
>>>     * @sched: scheduler instance
>>>     * @max: job numbers to relaunch
>>> @@ -671,7 +671,7 @@ drm_sched_select_entity(struct drm_gpu_sch= eduler *sched)
>>>    static struct drm_sched_job *
>>>    drm_sched_get_cleanup_job(struct drm_gpu_sch= eduler *sched)
>>>    {
>>> -     struct drm_sched_job *job;
>>> +     struct drm_sched_job *job, *next; >>>
>>>         /*
>>>          * Don't = destroy jobs while the timeout worker is running  OR thread
>>> @@ -690,6 +690,14 @@ drm_sched_get_cleanup_job(struct drm_gpu_= scheduler *sched)
>>>         if (job &&= amp; dma_fence_is_signaled(&job->s_fence->finished)) {
>>>          &nb= sp;      /* remove job from pending_list */
>>>          &nb= sp;      list_del_init(&job->list);
>>> We just need to record the scheduled time of the next job. So = we
>>> need not to check the rest job.
>>> +          &= nbsp;  /* account for the next fence in the queue */
>>> +          &= nbsp;  next =3D list_first_entry_or_null(&sched->pending_list,<= br> >>> +          &= nbsp;           &nbs= p;      struct drm_sched_job, list);
>>> +          &= nbsp;  if (next && test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT,
>>> +          &= nbsp;          &job->s_= fence->finished.flags)) {
>>> +          &= nbsp;          next->s_fenc= e->scheduled.timestamp =3D
>>> +          &= nbsp;           &nbs= p;      job->s_fence->finished.timestamp; >>> +          &= nbsp;  }
>>>         } else {
>>>          &nb= sp;      job =3D NULL;
>>>          &nb= sp;      /* queue timeout for next job */
>>
>>
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Flists.f= reedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=3D04%7C01%7CDavi= d.Nieto%40amd.com%7C7e7e640953954b94e2d408d90f9744a1%7C3dd8961fe4884e608e11= a82d994e183d%7C0%7C0%7C637557964635531548%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiM= C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sd= ata=3DYk2XfdFcbeimlcdh3VXWldS1cRD9LA32PMlN0kbfUME%3D&amp;reserved=3D0

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