From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Date: Mon, 22 Aug 2016 13:47:05 +0200 Subject: [ath9k-devel] [PATCH 2/5] ath9k: Set the "big endian" bit of the AR9003 EEPROM templates In-Reply-To: <20160821144906.30984-3-martin.blumenstingl@googlemail.com> References: <20160821144906.30984-1-martin.blumenstingl@googlemail.com> <20160821144906.30984-3-martin.blumenstingl@googlemail.com> Message-ID: <3744898.ltfZjZgAjj@wuerfel> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org On Sunday, August 21, 2016 4:49:03 PM CEST Martin Blumenstingl wrote: > We will default to the system's native endianness for the eepmisc value. > This may be overwritten by the actual calibration data. If it is not > overwritten we interpret the template data in it's native endianness, > meaning that no swapping is required. I'm still skeptical about this one. What is the significance of "native endianess" here? You are keying the endianess of the eeprom tables off the way the CPU operates, but for a PCI device there is no correlation between those two. Arnd