From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 547AFC33C9B for ; Fri, 15 Nov 2019 05:55:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2D4C12073B for ; Fri, 15 Nov 2019 05:55:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="SDZh9/V2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727503AbfKOFyE (ORCPT ); Fri, 15 Nov 2019 00:54:04 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:5209 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727498AbfKOFyE (ORCPT ); Fri, 15 Nov 2019 00:54:04 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 14 Nov 2019 21:53:49 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 14 Nov 2019 21:53:46 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 14 Nov 2019 21:53:46 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 15 Nov 2019 05:53:45 +0000 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 15 Nov 2019 05:53:45 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 15 Nov 2019 05:53:45 +0000 Received: from blueforge.nvidia.com (Not Verified[10.110.48.28]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 14 Nov 2019 21:53:44 -0800 From: John Hubbard To: Andrew Morton CC: Al Viro , Alex Williamson , Benjamin Herrenschmidt , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Christoph Hellwig , Dan Williams , Daniel Vetter , Dave Chinner , David Airlie , "David S . Miller" , Ira Weiny , Jan Kara , Jason Gunthorpe , Jens Axboe , Jonathan Corbet , =?UTF-8?q?J=C3=A9r=C3=B4me=20Glisse?= , Magnus Karlsson , "Mauro Carvalho Chehab" , Michael Ellerman , Michal Hocko , Mike Kravetz , "Paul Mackerras" , Shuah Khan , Vlastimil Babka , , , , , , , , , , , , , LKML , John Hubbard Subject: [PATCH v5 15/24] fs/io_uring: set FOLL_PIN via pin_user_pages() Date: Thu, 14 Nov 2019 21:53:31 -0800 Message-ID: <20191115055340.1825745-16-jhubbard@nvidia.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191115055340.1825745-1-jhubbard@nvidia.com> References: <20191115055340.1825745-1-jhubbard@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1573797229; bh=H3Pv+X/E2ADJL743nubRyIZke6yfCnEtQmkzOK1Q+7E=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=SDZh9/V2j+j+fqnfYmPQ6cFVogbjfZYPSWwnnZa2TarMBSWT0CVCtfGguEXXpTSn6 Y2AKomUABH48FYKAeSJrAVtNvCFRGPvoZRn8nfUl23B/mgL+sUoGIN5IN4lAlHlwLB ZbYdrP+UAktcn431I6R1DL6L+c674fLvmtVCj4xD3kmQ58RpVHOzspmiE433RTv1Nu rOGpeo1HkyHMwmeP4v5IZ3VOPqbbOyBvHLyE6wdHVsXhWM4TKovt/gRziBdVA38vpO HZmND0qTCkizK+DtAbj1rQ/PPDpDML751gcuVXFTlO6zrMaxXxni3XABf7Q0awaNEV X7SOb8QqodUlg== Sender: bpf-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: bpf@vger.kernel.org Convert fs/io_uring to use the new pin_user_pages() call, which sets FOLL_PIN. Setting FOLL_PIN is now required for code that requires tracking of pinned pages, and therefore for any code that calls put_user_page(). In partial anticipation of this work, the io_uring code was already calling put_user_page() instead of put_page(). Therefore, in order to convert from the get_user_pages()/put_page() model, to the pin_user_pages()/put_user_page() model, the only change required here is to change get_user_pages() to pin_user_pages(). Signed-off-by: John Hubbard --- fs/io_uring.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/io_uring.c b/fs/io_uring.c index f9a38998f2fc..cff64bd00db9 100644 --- a/fs/io_uring.c +++ b/fs/io_uring.c @@ -3433,7 +3433,7 @@ static int io_sqe_buffer_register(struct io_ring_ctx = *ctx, void __user *arg, =20 ret =3D 0; down_read(¤t->mm->mmap_sem); - pret =3D get_user_pages(ubuf, nr_pages, + pret =3D pin_user_pages(ubuf, nr_pages, FOLL_WRITE | FOLL_LONGTERM, pages, vmas); if (pret =3D=3D nr_pages) { --=20 2.24.0