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* [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16
@ 2022-09-25 13:22 Cédric Le Goater
  2022-09-25 13:26 ` Cédric Le Goater
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Cédric Le Goater @ 2022-09-25 13:22 UTC (permalink / raw)
  To: buildroot; +Cc: Joel Stanley, Cédric Le Goater

The features of the Cortex A7 CPU on the Aspeed AST2600 A3 SoC are :

  half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls vfpv4 idiva idivt lpae evtstrm

the vfpv3d16 feature bit is common to both vfpv3 and vfpv4.

Drop BR2_ARM_FPU_VFPV4 which activates the use of vpfd32 (and breaks
user space). Set BR2_ARM_FPU_VFPV4D16 instead.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 configs/aspeed_ast2600evb_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/aspeed_ast2600evb_defconfig b/configs/aspeed_ast2600evb_defconfig
index cd058ad0ac28..04239566c838 100644
--- a/configs/aspeed_ast2600evb_defconfig
+++ b/configs/aspeed_ast2600evb_defconfig
@@ -1,7 +1,7 @@
 # Architecture
 BR2_arm=y
 BR2_cortex_a7=y
-BR2_ARM_FPU_VFPV4=y
+BR2_ARM_FPU_VFPV4D16=y
 
 # System
 BR2_TARGET_GENERIC_HOSTNAME="aspeed-evb"
-- 
2.37.3

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^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16
  2022-09-25 13:22 [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16 Cédric Le Goater
@ 2022-09-25 13:26 ` Cédric Le Goater
  2022-09-26 12:03 ` Thomas Petazzoni
  2022-10-12 15:41 ` Peter Korsgaard
  2 siblings, 0 replies; 4+ messages in thread
From: Cédric Le Goater @ 2022-09-25 13:26 UTC (permalink / raw)
  To: buildroot; +Cc: Joel Stanley

On 9/25/22 15:22, Cédric Le Goater wrote:
> The features of the Cortex A7 CPU on the Aspeed AST2600 A3 SoC are :
> 
>    half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls vfpv4 idiva idivt lpae evtstrm
> 
> the vfpv3d16 feature bit is common to both vfpv3 and vfpv4.
> 
> Drop BR2_ARM_FPU_VFPV4 which activates the use of vpfd32 (and breaks
> user space). Set BR2_ARM_FPU_VFPV4D16 instead.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>   configs/aspeed_ast2600evb_defconfig | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

This patch is a possible candidate for 2022.08.x.

Thanks,

C.


> 
> diff --git a/configs/aspeed_ast2600evb_defconfig b/configs/aspeed_ast2600evb_defconfig
> index cd058ad0ac28..04239566c838 100644
> --- a/configs/aspeed_ast2600evb_defconfig
> +++ b/configs/aspeed_ast2600evb_defconfig
> @@ -1,7 +1,7 @@
>   # Architecture
>   BR2_arm=y
>   BR2_cortex_a7=y
> -BR2_ARM_FPU_VFPV4=y
> +BR2_ARM_FPU_VFPV4D16=y
>   
>   # System
>   BR2_TARGET_GENERIC_HOSTNAME="aspeed-evb"

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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16
  2022-09-25 13:22 [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16 Cédric Le Goater
  2022-09-25 13:26 ` Cédric Le Goater
@ 2022-09-26 12:03 ` Thomas Petazzoni
  2022-10-12 15:41 ` Peter Korsgaard
  2 siblings, 0 replies; 4+ messages in thread
From: Thomas Petazzoni @ 2022-09-26 12:03 UTC (permalink / raw)
  To: Cédric Le Goater; +Cc: Joel Stanley, buildroot

On Sun, 25 Sep 2022 15:22:18 +0200
Cédric Le Goater <clg@kaod.org> wrote:

> The features of the Cortex A7 CPU on the Aspeed AST2600 A3 SoC are :
> 
>   half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls vfpv4 idiva idivt lpae evtstrm
> 
> the vfpv3d16 feature bit is common to both vfpv3 and vfpv4.
> 
> Drop BR2_ARM_FPU_VFPV4 which activates the use of vpfd32 (and breaks
> user space). Set BR2_ARM_FPU_VFPV4D16 instead.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  configs/aspeed_ast2600evb_defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied to master, thanks.

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16
  2022-09-25 13:22 [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16 Cédric Le Goater
  2022-09-25 13:26 ` Cédric Le Goater
  2022-09-26 12:03 ` Thomas Petazzoni
@ 2022-10-12 15:41 ` Peter Korsgaard
  2 siblings, 0 replies; 4+ messages in thread
From: Peter Korsgaard @ 2022-10-12 15:41 UTC (permalink / raw)
  To: Cédric Le Goater; +Cc: Joel Stanley, buildroot

>>>>> "Cédric" == Cédric Le Goater <clg@kaod.org> writes:

 > The features of the Cortex A7 CPU on the Aspeed AST2600 A3 SoC are :
 >   half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls vfpv4 idiva idivt lpae evtstrm

 > the vfpv3d16 feature bit is common to both vfpv3 and vfpv4.

 > Drop BR2_ARM_FPU_VFPV4 which activates the use of vpfd32 (and breaks
 > user space). Set BR2_ARM_FPU_VFPV4D16 instead.

 > Signed-off-by: Cédric Le Goater <clg@kaod.org>

Committed to 2022.08.x, thanks.

-- 
Bye, Peter Korsgaard
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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-10-12 15:41 UTC | newest]

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2022-09-25 13:22 [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16 Cédric Le Goater
2022-09-25 13:26 ` Cédric Le Goater
2022-09-26 12:03 ` Thomas Petazzoni
2022-10-12 15:41 ` Peter Korsgaard

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