From: viresh.kumar@linaro.org (Viresh Kumar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/9] pinctrl: SPEAr1310: Fix value of PERIP_CFG reigster and MCIF_SEL_SHIFT
Date: Sat, 27 Oct 2012 14:47:50 +0530 [thread overview]
Message-ID: <c6063a2f8a36379dea60d781a064562e5aff632b.1351329224.git.viresh.kumar@linaro.org> (raw)
In-Reply-To: <cover.1351329224.git.viresh.kumar@linaro.org>
From: Vipul Kumar Samar <vipulkumar.samar@st.com>
This patch fixes two macros: PERIP_CFG registers offset and MCIF selection
shift.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/pinctrl/spear/pinctrl-spear1310.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c
index c720d09..baf98ae 100644
--- a/drivers/pinctrl/spear/pinctrl-spear1310.c
+++ b/drivers/pinctrl/spear/pinctrl-spear1310.c
@@ -25,8 +25,8 @@ static const struct pinctrl_pin_desc spear1310_pins[] = {
};
/* registers */
-#define PERIP_CFG 0x32C
- #define MCIF_SEL_SHIFT 3
+#define PERIP_CFG 0x3B0
+ #define MCIF_SEL_SHIFT 5
#define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT)
#define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT)
#define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT)
--
1.7.12.rc2.18.g61b472e
next prev parent reply other threads:[~2012-10-27 9:17 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-27 9:17 [PATCH 0/9] Pinctrl: SPEAr: Fixes for 3.7-rc3 Viresh Kumar
2012-10-27 9:17 ` [PATCH 1/9] pinctrl: SPEAr: Don't update all non muxreg bits on pinctrl_disable Viresh Kumar
2012-10-27 9:17 ` [PATCH 2/9] pinctrl: SPEAr3xx: correct register space to configure pwm Viresh Kumar
2012-10-27 9:17 ` [PATCH 3/9] pinctrl: SPEAr320: Correct pad mux entries for rmii/smii Viresh Kumar
2012-10-27 9:17 ` [PATCH 4/9] pinctrl: SPEAr1310: fix clcd high resolution pin group name Viresh Kumar
2012-10-27 9:17 ` Viresh Kumar [this message]
2012-10-27 9:17 ` [PATCH 6/9] pinctrl: SPEAr1310: Separate out pci pins from pcie_sata pin group Viresh Kumar
2012-10-27 9:17 ` [PATCH 7/9] pinctrl: SPEAr1310: add register entries for enabling pad direction Viresh Kumar
2012-10-27 9:17 ` [PATCH 8/9] pinctrl: SPEAr1340: Make DDR reset & clock pads as gpio Viresh Kumar
2012-10-27 9:17 ` [PATCH 9/9] pinctrl: SPEAr1340: Add clcd sleep mode pin configuration Viresh Kumar
2012-11-05 10:38 ` [PATCH 0/9] Pinctrl: SPEAr: Fixes for 3.7-rc3 Linus Walleij
2012-11-05 10:46 ` viresh kumar
2012-11-05 11:36 ` Linus Walleij
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