From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB7E323BC for ; Fri, 31 Mar 2023 09:12:34 +0000 (UTC) Received: by mail-pl1-f175.google.com with SMTP id u10so20672108plz.7 for ; Fri, 31 Mar 2023 02:12:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1680253954; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9+Tc4yTD3sN/Bc2PZG9UWVADnYxhGKdTbRZ6QEDgQeQ=; b=IGMLXczXEWbb8+crkL2ZWVrs+r/Evt62HK4h4H9Rid+EDcaCLNCGgDqyH6Sj+DqpJZ Q3Vo/fNBO1VGqx+O1PuXAZWsyaJYnL6wv2lLvoEh2zOQgHz0ijpTusZ6T14UqyTJ4xa7 xLPzWXVDoW7WB8javJkgTjFbQVo984D1uG0i0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680253954; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9+Tc4yTD3sN/Bc2PZG9UWVADnYxhGKdTbRZ6QEDgQeQ=; b=5fDDvHpkyy+KUD1ut9ZLBvRXlb6R5mWKKbjMtr26seAugN/TvgWTBCAizxiy4DErUq wQQQTMyVZHB/4TQotAYtPzCLWdoieP+0FBptL4q+KbQtGDPL1KSOBcV6my0xdYCUUbTl ae01SHN4LfQnLr8vJmZIMSBnFevQu+eyrjopDyPSA9W655MTwpl0sbyHMk8UP4pGPL6u zuR3Dmwm265dnQYVNQJiKoUy9TRyk/pPamWhAQ6sowjCh0BOuFVXmlkKFVpEQg6UN9BF ecCfeBLXJ4CgdA/TwSOgW72zm3pB+jSfrDGsct6MN1UT1JWz3LEZUwCbwGtgtg7W4TdQ fOLQ== X-Gm-Message-State: AO0yUKXgOFL3d/paUYymOMdWBcN9551wrzPEzMcs84r0EVNzGvEZZekN WSd7oSiVmtpakkj1hAQSrrwVaA== X-Google-Smtp-Source: AK7set9z/NUCJ2HmO6UCPAHCQR6+ErJ9e+s47/gOUH5UsT2d1USzN49QJ07acfAc3uak0rnV+vq0ew== X-Received: by 2002:a05:6a20:4a14:b0:d6:7264:f44e with SMTP id fr20-20020a056a204a1400b000d67264f44emr24932215pzb.3.1680253954204; Fri, 31 Mar 2023 02:12:34 -0700 (PDT) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:ae9d:db7a:8a71:d458]) by smtp.gmail.com with ESMTPSA id n6-20020a62e506000000b006227c3d5e29sm1360905pff.16.2023.03.31.02.12.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Mar 2023 02:12:33 -0700 (PDT) From: Pin-yen Lin To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Shevchenko , Daniel Scally , Heikki Krogerus , Sakari Ailus , Greg Kroah-Hartman , "Rafael J . Wysocki" , Prashant Malani , Benson Leung , Guenter Roeck Cc: Xin Ji , Marek Vasut , Hsin-Yi Wang , Thomas Zimmermann , AngeloGioacchino Del Regno , Lyude Paul , devicetree@vger.kernel.org, Stephen Boyd , dri-devel@lists.freedesktop.org, linux-acpi@vger.kernel.org, chrome-platform@lists.linux.dev, =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Javier Martinez Canillas , Pin-yen Lin , linux-kernel@vger.kernel.org Subject: [PATCH v15 07/10] drm/bridge: anx7625: Register Type C mode switches Date: Fri, 31 Mar 2023 17:11:42 +0800 Message-Id: <20230331091145.737305-8-treapking@chromium.org> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230331091145.737305-1-treapking@chromium.org> References: <20230331091145.737305-1-treapking@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Register USB Type-C mode switches when the "mode-switch" property and relevant ports are available in Device Tree. Configure the crosspoint switch based on the entered alternate mode for a specific Type-C connector. Crosspoint switch can also be used for switching the output signal for different orientations of a single USB Type-C connector, but the orientation switch is not implemented yet. A TODO is added for this. Signed-off-by: Pin-yen Lin --- Changes in v15: - Swap the definitions in anx7625_typec_port_data - Add comments about the completion - Abort the mux_set callback when the switch is unregistered - Fix style issues Changes in v14: - Fix style issues Changes in v12: - Fixed style issues in anx7625 driver - Fixed the inverted orientation setting in anx7625 driver - Changed "&ctx->client->dev" to "ctx->dev" - Fix style issues - Updated the error logs when parsing data-lanes property Changes in v11: - Added back "data-lanes" parsing logics - Removed Kconfig dependency - Updated the usage of the private data - Dropped Tested-by tag because of the new changes Changes in v10: - Added a TODO for implementing orientation switch for anx7625 - Updated the commit message for the absence of orientation switch - Fixed typo in the commit message - Collected Tested-by tag Changes in v7: - Fixed style issues in anx7625 driver - Removed DT property validation in anx7625 driver. - Extracted common codes to another commit. Changes in v6: - Squashed to a single patch drivers/gpu/drm/bridge/analogix/anx7625.c | 157 ++++++++++++++++++++++ drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +++ 2 files changed, 177 insertions(+) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 76d46db3f8dc..7ed5797e134c 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -15,6 +15,8 @@ #include #include #include +#include +#include #include #include @@ -2570,6 +2572,154 @@ static void anx7625_runtime_disable(void *data) pm_runtime_disable(data); } +static void anx7625_set_crosspoint_switch(struct anx7625_data *ctx, + enum typec_orientation orientation) +{ + if (orientation == TYPEC_ORIENTATION_NORMAL) { + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, + SW_SEL1_SSRX_RX1 | SW_SEL1_DPTX0_RX2); + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, + SW_SEL2_SSTX_TX1 | SW_SEL2_DPTX1_TX2); + } else if (orientation == TYPEC_ORIENTATION_REVERSE) { + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, + SW_SEL1_SSRX_RX2 | SW_SEL1_DPTX0_RX1); + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, + SW_SEL2_SSTX_TX2 | SW_SEL2_DPTX1_TX1); + } +} + +static void anx7625_typec_two_ports_update(struct anx7625_data *ctx) +{ + unsigned int i; + + /* Check if both ports available and do nothing to retain the current one */ + if (ctx->port_data[0].dp_connected && ctx->port_data[1].dp_connected) + return; + + for (i = 0; i < 2; i++) { + if (ctx->port_data[i].dp_connected) + anx7625_set_crosspoint_switch(ctx, + ctx->port_data[i].orientation); + } +} + +static int anx7625_typec_mux_set(struct typec_mux_dev *mux, + struct typec_mux_state *state) +{ + struct drm_dp_typec_port_data *port = typec_mux_get_drvdata(mux); + struct anx7625_data *ctx = port->data; + struct device *dev = ctx->dev; + struct drm_dp_typec_switch_desc switch_desc = ctx->switch_desc; + bool new_dp_connected, old_dp_connected; + + if (switch_desc.num_typec_switches == 1) + return 0; + + /* + * The completion is called in anx7625_register_typec_switches + * even on errors, so it's safe to wait for completion without timeout. + */ + wait_for_completion(&ctx->mux_register); + + /* Abort when the switches are unregistered. */ + if (!ctx->port_data) + return -EINVAL; + + old_dp_connected = ctx->port_data[0].dp_connected || + ctx->port_data[1].dp_connected; + + ctx->port_data[port->port_num].dp_connected = + state->alt && + state->alt->svid == USB_TYPEC_DP_SID && + state->alt->mode == USB_TYPEC_DP_MODE; + + dev_dbg(dev, "mux_set dp_connected: c0=%d, c1=%d\n", + ctx->port_data[0].dp_connected, ctx->port_data[1].dp_connected); + + new_dp_connected = ctx->port_data[0].dp_connected || + ctx->port_data[1].dp_connected; + + /* DP on, power on first */ + if (!old_dp_connected && new_dp_connected) + pm_runtime_get_sync(dev); + + anx7625_typec_two_ports_update(ctx); + + /* DP off, power off last */ + if (old_dp_connected && !new_dp_connected) + pm_runtime_put_sync(dev); + + return 0; +} + +static void anx7625_unregister_typec_switches(struct anx7625_data *ctx) +{ + drm_dp_unregister_typec_switches(&ctx->switch_desc); + ctx->port_data = NULL; +} + +static int anx7625_register_typec_switches(struct device *dev, struct anx7625_data *ctx) +{ + struct device_node *port_node = of_graph_get_port_by_id(dev->of_node, 1); + struct drm_dp_typec_switch_desc *switch_desc = &ctx->switch_desc; + int ret; + u32 dp_lanes[4]; + unsigned int i, num_lanes; + + /* + * Currently, only mode switch is implemented. + * TODO: Implement Type-C orientation switch for anx7625. + */ + ret = drm_dp_register_typec_switches(dev, &port_node->fwnode, + &ctx->switch_desc, ctx, + anx7625_typec_mux_set); + if (ret) + return ret; + + ctx->port_data = devm_kcalloc(dev, switch_desc->num_typec_switches, + sizeof(*ctx->port_data), + GFP_KERNEL); + if (!ctx->port_data) { + ret = -ENOMEM; + goto unregister_mux; + } + + for (i = 0; i < switch_desc->num_typec_switches; i++) { + struct drm_dp_typec_port_data *port = &switch_desc->typec_ports[i]; + struct fwnode_handle *fwnode = port->fwnode; + + ret = fwnode_property_count_u32(fwnode, "data-lanes"); + if (ret < 0) { + dev_err(dev, + "Error on getting data lanes count from %pfwP: %d\n", + fwnode, ret); + goto unregister_mux; + } + num_lanes = ret; + + ret = fwnode_property_read_u32_array(fwnode, "data-lanes", + dp_lanes, num_lanes); + if (ret) { + dev_err(dev, + "Failed to read the data-lanes variable: %d\n", + ret); + goto unregister_mux; + } + + ctx->port_data[i].orientation = dp_lanes[0] < 2 ? + TYPEC_ORIENTATION_REVERSE : TYPEC_ORIENTATION_NORMAL; + ctx->port_data[i].dp_connected = false; + } + complete_all(&ctx->mux_register); + + return 0; + +unregister_mux: + anx7625_unregister_typec_switches(ctx); + complete_all(&ctx->mux_register); + return ret; +} + static int anx7625_i2c_probe(struct i2c_client *client) { struct anx7625_data *platform; @@ -2607,6 +2757,7 @@ static int anx7625_i2c_probe(struct i2c_client *client) mutex_init(&platform->lock); mutex_init(&platform->hdcp_wq_lock); + init_completion(&platform->mux_register); INIT_DELAYED_WORK(&platform->hdcp_work, hdcp_check_work_func); platform->hdcp_workqueue = create_workqueue("hdcp workqueue"); @@ -2677,6 +2828,10 @@ static int anx7625_i2c_probe(struct i2c_client *client) if (platform->pdata.intp_irq) queue_work(platform->workqueue, &platform->work); + ret = anx7625_register_typec_switches(dev, platform); + if (ret && ret != -ENODEV) + dev_warn(dev, "Didn't register Type-C switches, err: %d\n", ret); + platform->bridge.funcs = &anx7625_bridge_funcs; platform->bridge.of_node = client->dev.of_node; if (!anx7625_of_panel_on_aux_bus(&client->dev)) @@ -2728,6 +2883,8 @@ static void anx7625_i2c_remove(struct i2c_client *client) drm_bridge_remove(&platform->bridge); + anx7625_unregister_typec_switches(platform); + if (platform->pdata.intp_irq) destroy_workqueue(platform->workqueue); diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h index 5af819611ebc..291dba62e096 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h @@ -55,6 +55,18 @@ #define HPD_STATUS_CHANGE 0x80 #define HPD_STATUS 0x80 +#define TCPC_SWITCH_0 0xB4 +#define SW_SEL1_DPTX0_RX2 BIT(0) +#define SW_SEL1_DPTX0_RX1 BIT(1) +#define SW_SEL1_SSRX_RX2 BIT(4) +#define SW_SEL1_SSRX_RX1 BIT(5) + +#define TCPC_SWITCH_1 0xB5 +#define SW_SEL2_DPTX1_TX2 BIT(0) +#define SW_SEL2_DPTX1_TX1 BIT(1) +#define SW_SEL2_SSTX_TX2 BIT(4) +#define SW_SEL2_SSTX_TX1 BIT(5) + /******** END of I2C Address 0x58 ********/ /***************************************************************/ @@ -449,6 +461,11 @@ struct anx7625_i2c_client { struct i2c_client *tcpc_client; }; +struct anx7625_typec_port_data { + enum typec_orientation orientation; + bool dp_connected; +}; + struct anx7625_data { struct anx7625_platform_data pdata; struct platform_device *audio_pdev; @@ -479,6 +496,9 @@ struct anx7625_data { struct drm_connector *connector; struct mipi_dsi_device *dsi; struct drm_dp_aux aux; + struct completion mux_register; + struct drm_dp_typec_switch_desc switch_desc; + struct anx7625_typec_port_data *port_data; }; #endif /* __ANX7625_H__ */ -- 2.40.0.348.gf938b09366-goog