From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-yw1-f177.google.com (mail-yw1-f177.google.com [209.85.128.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 234F7A934 for ; Tue, 2 May 2023 21:19:12 +0000 (UTC) Received: by mail-yw1-f177.google.com with SMTP id 00721157ae682-55a5e0f5b1aso25344897b3.0 for ; Tue, 02 May 2023 14:19:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683062351; x=1685654351; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=0h/G3jDyFIlsGjKztRY6ZyzstNpimF/rtsReSh8uQhc=; b=KRpm0LIjs28Qed8shWU3rN8qoEPt7Z2dbTHfeBDQWUYQ/eleo/D1hSCVxF8U6UZ+bs F1XMfbU8w5Ga3fHrL9f52m54VFw9b/NoIHxi6VJvUi0wJbHm/C9DZq5Ys2jrTCtfhcm1 oBkQ2yn5ZHZ/TfTLorY09e+913thRNTfaqI5mNLT0k9tsDcNET4Mx+BQIf1502z+U6F5 zdPY5wpLT0wKF469rWVGVCkKCBVQOBcwk1PBnM9kbNCfxW76JztqaMMAKMKH5t+1tPeB +v6bV47t5nalynw/2xl/re8ehZcjTh36Ag3m136LAbl2iZeuJ0S5NvYOTuc93MhpGwqC v4lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683062351; x=1685654351; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0h/G3jDyFIlsGjKztRY6ZyzstNpimF/rtsReSh8uQhc=; b=PEidniorGAaK5B0z/QPeShoZxxgIKMrrO6pGeTNe66Czyk7fYPMKl/OZ6TCEM0tZwE cYuSVcSO5H8ogQNFPyszBt5jIkUDLpDfcZY0OS/y15k9m8lkzNosjv58vu6nv7WV1cE7 76t/tI/2S8Y4rDAFr9q/6SzHBrsjyJiGLQ0h6WdaoEhry2ynNanrcpJI9Xy+nxbDZ8WU uayUsDYw6moT/lmNwQcDgWrtaaKa1yhPU6RfrNigc05cjrQYUiBX7kQNTySk9jC052HW 1xFrFCD1++L6UHPtRQByCKHWvYVaq0/EkMHyfNQoLvIhmkmuu5B2W6c2HbbjQDPUiEj1 67BA== X-Gm-Message-State: AC+VfDwHRNvNfYHVYoG9yF0STVf2aoSf19ZUOcI8874Tjr37FWPdcVoS veZRcN9zX+5Ou6k89x2p9+xMPrsOTgo3mphuQqHcHA== X-Google-Smtp-Source: ACHHUZ40eKx7z1zIEK43ZteAtF8Wd9UqjzfberS/RGyfg0Yc35rUPQJQ5+CsgQDyrPQsSFVeJx8PEmL+DqYZgiAtTAc= X-Received: by 2002:a0d:e68f:0:b0:54f:6a20:5a19 with SMTP id p137-20020a0de68f000000b0054f6a205a19mr17486306ywe.34.1683062351071; Tue, 02 May 2023 14:19:11 -0700 (PDT) Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20220328000915.15041-1-ansuelsmth@gmail.com> <85eb14ec-f465-7447-ad77-a3dabc666f47@kernel.org> <720a2829-b6b5-411c-ac69-9a53e881f48d@app.fastmail.com> In-Reply-To: From: Linus Walleij Date: Tue, 2 May 2023 23:18:59 +0200 Message-ID: Subject: Re: [RFC PATCH 0/1] Categorize ARM dts directory To: Rob Herring Cc: Arnd Bergmann , Geert Uytterhoeven , Olof Johansson , Christian Marangi , Krzysztof Kozlowski , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org, linux-sunxi@lists.linux.dev, Linux-OMAP , linux-amlogic@lists.infradead.org, linux-arm-kernel@axis.com, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, chrome-platform@lists.linux.dev, Linux-Renesas , linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, kernel@dh-electronics.com, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, "linux-oxnas@groups.io" , linux-arm-msm@vger.kernel.org, linux-unisoc@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-realtek-soc@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, May 2, 2023 at 9:40=E2=80=AFPM Rob Herring wro= te: > I've dusted off my script and made a branch[1] with the result. > There's just a couple of fixes needed after the script is run (see the > top commit). The cross arch includes are all fixed up by the script. > dtbs_install maintains a flat install. I compared the number of .dtbs > before and after to check the script. > > I think the only issue remaining is finalizing the mapping of > platforms to subdirs. What I have currently is a mixture of SoC > families and vendors. The most notable are all the Freescale/NXP > platforms, pxa, socfpga, and stm32. It's not consistent with arm64 > either. Once that's finalized, I still need to go update MAINTAINERS. I see my nits were fixed like I wanted them, and it's now mostly a mix of soc and vendor names that make sense so from my point of view: Acked-by: Linus Walleij NB: arch/arm64/boot/dts/arm$ vexpress-v2m-rs1.dtsi -> ../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi This still works after the script, yes? Yours, Linus Walleij