[-- Attachment #1: Type: text/plain, Size: 1034 bytes --] This patch series add support for IPMMU/SYS-DMAC/GPIO/EAVB on HiHope RZ/G2H board based on R8A774E1 SoC. This patches in this series are cherry-picked from mainline. This patch series depend upon [1] [1]: https://patchwork.kernel.org/project/cip-dev/list/?series=336489 Lad Prabhakar (2): dt-bindings: iommu: renesas,ipmmu-vmsa: Add r8a774e1 support dt-bindings: dma: renesas,rcar-dmac: Document R8A774E1 bindings Marian-Cristian Rotariu (5): iommu/ipmmu-vmsa: Hook up R8A774E1 DT matching code arm64: dts: renesas: r8a774e1: Add IPMMU device nodes arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes arm64: dts: renesas: r8a774e1: Add GPIO device nodes arm64: dts: renesas: r8a774e1: Add Ethernet AVB node .../bindings/dma/renesas,rcar-dmac.txt | 1 + .../bindings/iommu/renesas,ipmmu-vmsa.txt | 1 + arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 361 +++++++++++++++++- drivers/iommu/ipmmu-vmsa.c | 5 + 4 files changed, 349 insertions(+), 19 deletions(-) -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5220): https://lists.cip-project.org/g/cip-dev/message/5220 Mute This Topic: https://lists.cip-project.org/mt/76329804/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1: Type: text/plain, Size: 1478 bytes --] From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> commit 8a71c743bf5ecdcfb439662e4cef89d7b1132495 upstream. Document RZ/G2H (R8A774E1) SoC bindings. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594676120-5862-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Rob Herring <robh@kernel.org> [biju: Patched text version of bindings file] Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt index 56faf8dd0077..e2bc780b803c 100644 --- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt +++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt @@ -16,6 +16,7 @@ Required Properties: - "renesas,ipmmu-r8a774a1" for the R8A774A1 (RZ/G2M) IPMMU. - "renesas,ipmmu-r8a774b1" for the R8A774B1 (RZ/G2N) IPMMU. - "renesas,ipmmu-r8a774c0" for the R8A774C0 (RZ/G2E) IPMMU. + - "renesas,ipmmu-r8a774e1" for the R8A774E1 (RZ/G2H) IPMMU. - "renesas,ipmmu-r8a7790" for the R8A7790 (R-Car H2) IPMMU. - "renesas,ipmmu-r8a7791" for the R8A7791 (R-Car M2-W) IPMMU. - "renesas,ipmmu-r8a7793" for the R8A7793 (R-Car M2-N) IPMMU. -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5213): https://lists.cip-project.org/g/cip-dev/message/5213 Mute This Topic: https://lists.cip-project.org/mt/76329796/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1: Type: text/plain, Size: 1823 bytes --] From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> commit 4b2aa7a6f9b793cadbda898476c8a16d374f1b3a upstream. Add support for RZ/G2H (R8A774E1) SoC IPMMUs. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1594722055-9298-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- drivers/iommu/ipmmu-vmsa.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index ea4d19da9865..dfc90ca3f0fe 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c @@ -761,6 +761,7 @@ static const struct soc_device_attribute soc_rcar_gen3[] = { { .soc_id = "r8a774a1", }, { .soc_id = "r8a774b1", }, { .soc_id = "r8a774c0", }, + { .soc_id = "r8a774e1", }, { .soc_id = "r8a7795", }, { .soc_id = "r8a7796", }, { .soc_id = "r8a77965", }, @@ -772,6 +773,7 @@ static const struct soc_device_attribute soc_rcar_gen3[] = { static const struct soc_device_attribute soc_rcar_gen3_whitelist[] = { { .soc_id = "r8a774b1", }, { .soc_id = "r8a774c0", }, + { .soc_id = "r8a774e1", }, { .soc_id = "r8a7795", .revision = "ES3.*" }, { .soc_id = "r8a77965", }, { .soc_id = "r8a77990", }, @@ -975,6 +977,9 @@ static const struct of_device_id ipmmu_of_ids[] = { }, { .compatible = "renesas,ipmmu-r8a774c0", .data = &ipmmu_features_rcar_gen3, + }, { + .compatible = "renesas,ipmmu-r8a774e1", + .data = &ipmmu_features_rcar_gen3, }, { .compatible = "renesas,ipmmu-r8a7795", .data = &ipmmu_features_rcar_gen3, -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5214): https://lists.cip-project.org/g/cip-dev/message/5214 Mute This Topic: https://lists.cip-project.org/mt/76329797/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1: Type: text/plain, Size: 4562 bytes --] From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> commit 615d1a9ebcfb90d5ddbfd887d42eda5dc8b03303 upstream. Add RZ/G2H (R8A774E1) IPMMU nodes. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594676120-5862-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 121 ++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index eb7226e8e892..a50902c8173d 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -408,6 +408,127 @@ /* placeholder */ }; + ipmmu_ds0: iommu@e6740000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xe6740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 0>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_ds1: iommu@e7740000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xe7740000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 1>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_hc: iommu@e6570000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xe6570000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 2>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_mm: iommu@e67b0000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xe67b0000 0 0x1000>; + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_mp0: iommu@ec670000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xec670000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 4>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_pv0: iommu@fd800000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfd800000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 6>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_pv1: iommu@fd950000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfd950000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 7>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_pv2: iommu@fd960000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfd960000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 8>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_pv3: iommu@fd970000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfd970000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 9>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vc0: iommu@fe6b0000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfe6b0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 12>; + power-domains = <&sysc R8A774E1_PD_A3VC>; + #iommu-cells = <1>; + }; + + ipmmu_vc1: iommu@fe6f0000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfe6f0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 13>; + power-domains = <&sysc R8A774E1_PD_A3VC>; + #iommu-cells = <1>; + }; + + ipmmu_vi0: iommu@febd0000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfebd0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 14>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vi1: iommu@febe0000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfebe0000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 15>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_vp0: iommu@fe990000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfe990000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 16>; + power-domains = <&sysc R8A774E1_PD_A3VP>; + #iommu-cells = <1>; + }; + + ipmmu_vp1: iommu@fe980000 { + compatible = "renesas,ipmmu-r8a774e1"; + reg = <0 0xfe980000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 17>; + power-domains = <&sysc R8A774E1_PD_A3VP>; + #iommu-cells = <1>; + }; + avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>; #address-cells = <1>; -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5215): https://lists.cip-project.org/g/cip-dev/message/5215 Mute This Topic: https://lists.cip-project.org/mt/76329798/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1: Type: text/plain, Size: 1362 bytes --] From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> commit 09b4db279758dd3d5bb235605e985b99e7bc1a93 upstream. Renesas RZ/G2H (R8A774E1) SoC also has the R-Car gen3 compatible DMA controllers, therefore document RZ/G2H specific bindings. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1594676120-5862-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org> [biju: Patched text version of bindings file] Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt index b6927eb3e6f2..59d2ad3d39dd 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt +++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt @@ -22,6 +22,7 @@ Required Properties: - "renesas,dmac-r8a774a1" (RZ/G2M) - "renesas,dmac-r8a774b1" (RZ/G2N) - "renesas,dmac-r8a774c0" (RZ/G2E) + - "renesas,dmac-r8a774e1" (RZ/G2H) - "renesas,dmac-r8a7790" (R-Car H2) - "renesas,dmac-r8a7791" (R-Car M2-W) - "renesas,dmac-r8a7792" (R-Car V2H) -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5216): https://lists.cip-project.org/g/cip-dev/message/5216 Mute This Topic: https://lists.cip-project.org/mt/76329799/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1: Type: text/plain, Size: 5907 bytes --] From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> commit f1bf8ff8d58360d396d01f4aab6316e28e75d4b7 upstream. Add sys-dmac[0-2] device nodes for RZ/G2H (R8A774E1) SoC. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594676120-5862-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 126 ++++++++++++++++++++++ 1 file changed, 126 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index a50902c8173d..4bd660e184ac 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -408,6 +408,132 @@ /* placeholder */ }; + dmac0: dma-controller@e6700000 { + compatible = "renesas,dmac-r8a774e1", + "renesas,rcar-dmac"; + reg = <0 0xe6700000 0 0x10000>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 219>; + clock-names = "fck"; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 219>; + #dma-cells = <1>; + dma-channels = <16>; + iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, + <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, + <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, + <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, + <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, + <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, + <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, + <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; + }; + + dmac1: dma-controller@e7300000 { + compatible = "renesas,dmac-r8a774e1", + "renesas,rcar-dmac"; + reg = <0 0xe7300000 0 0x10000>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 218>; + clock-names = "fck"; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 218>; + #dma-cells = <1>; + dma-channels = <16>; + iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, + <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, + <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, + <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, + <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, + <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, + <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, + <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; + }; + + dmac2: dma-controller@e7310000 { + compatible = "renesas,dmac-r8a774e1", + "renesas,rcar-dmac"; + reg = <0 0xe7310000 0 0x10000>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 217>; + clock-names = "fck"; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 217>; + #dma-cells = <1>; + dma-channels = <16>; + iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, + <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, + <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, + <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, + <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, + <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, + <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, + <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; + }; + ipmmu_ds0: iommu@e6740000 { compatible = "renesas,ipmmu-r8a774e1"; reg = <0 0xe6740000 0 0x1000>; -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. 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[-- Attachment #1: Type: text/plain, Size: 4706 bytes --] From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> commit 43b0c905949735e40b1c90fc354ff2944283103d upstream. Add GPIO device nodes to the DT of the r8a774e1 SoC. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594676120-5862-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 73 +++++++++++++++++------ 1 file changed, 56 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index 4bd660e184ac..17b69d9a634c 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -246,84 +246,123 @@ }; gpio0: gpio@e6050000 { + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6050000 0 0x50>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 0 16>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 912>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 912>; }; gpio1: gpio@e6051000 { + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6051000 0 0x50>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 32 29>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 911>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 911>; }; gpio2: gpio@e6052000 { + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6052000 0 0x50>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 64 15>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 910>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 910>; }; gpio3: gpio@e6053000 { - /* placeholder */ + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6053000 0 0x50>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 96 16>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 909>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 909>; }; gpio4: gpio@e6054000 { + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6054000 0 0x50>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 128 18>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 908>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 908>; }; gpio5: gpio@e6055000 { + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6055000 0 0x50>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 160 26>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 907>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 907>; }; gpio6: gpio@e6055400 { + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6055400 0 0x50>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 192 32>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 906>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 906>; }; gpio7: gpio@e6055800 { + compatible = "renesas,gpio-r8a774e1", + "renesas,rcar-gen3-gpio"; reg = <0 0xe6055800 0 0x50>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pfc 0 224 4>; #interrupt-cells = <2>; interrupt-controller; - - /* placeholder */ + clocks = <&cpg CPG_MOD 905>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 905>; }; pfc: pin-controller@e6060000 { -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5218): https://lists.cip-project.org/g/cip-dev/message/5218 Mute This Topic: https://lists.cip-project.org/mt/76329801/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1: Type: text/plain, Size: 2796 bytes --] From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> commit 8d54886cbb4efb6e7a35ee1c7d0e9d91b4c73ca9 upstream. This patch adds the SoC specific part of the Ethernet AVB device tree node. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594676120-5862-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 41 +++++++++++++++++++++-- 1 file changed, 39 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index 17b69d9a634c..d76aec73aa28 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -695,12 +695,49 @@ }; avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a774e1", + "renesas,etheravb-rcar-gen3"; reg = <0 0xe6800000 0 0x800>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15", + "ch16", "ch17", "ch18", "ch19", + "ch20", "ch21", "ch22", "ch23", + "ch24"; + clocks = <&cpg CPG_MOD 812>; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 812>; + phy-mode = "rgmii"; + iommus = <&ipmmu_ds0 16>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; - - /* placeholder */ }; can0: can@e6c30000 { -- 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5219): https://lists.cip-project.org/g/cip-dev/message/5219 Mute This Topic: https://lists.cip-project.org/mt/76329802/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1.1: Type: text/plain, Size: 518 bytes --] Hi! > This patch series add support for IPMMU/SYS-DMAC/GPIO/EAVB on > HiHope RZ/G2H board based on R8A774E1 SoC. > > This patches in this series are cherry-picked from mainline. > > This patch series depend upon [1] > [1]: > https://patchwork.kernel.org/project/cip-dev/list/?series=336489 This series looks ok to me, too. Best regards, Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 195 bytes --] [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5229): https://lists.cip-project.org/g/cip-dev/message/5229 Mute This Topic: https://lists.cip-project.org/mt/76329804/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1: Type: text/plain, Size: 1755 bytes --] Hi, > -----Original Message----- > From: Biju Das [mailto:biju.das.jz@bp.renesas.com] > Sent: Friday, August 21, 2020 11:17 PM > To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) > <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de> > Cc: Chris Paterson <chris.paterson2@renesas.com>; Biju Das <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad > <prabhakar.mahadev-lad.rj@bp.renesas.com> > Subject: [PATCH 4.19.y-cip 0/7] Add IPMMU/SYS-DMAC/GPIO/EAVB Support on R8A774E1 > > This patch series add support for IPMMU/SYS-DMAC/GPIO/EAVB on > HiHope RZ/G2H board based on R8A774E1 SoC. > > This patches in this series are cherry-picked from mainline. > > This patch series depend upon [1] > [1]: https://patchwork.kernel.org/project/cip-dev/list/?series=336489 > > Lad Prabhakar (2): > dt-bindings: iommu: renesas,ipmmu-vmsa: Add r8a774e1 support > dt-bindings: dma: renesas,rcar-dmac: Document R8A774E1 bindings > > Marian-Cristian Rotariu (5): > iommu/ipmmu-vmsa: Hook up R8A774E1 DT matching code > arm64: dts: renesas: r8a774e1: Add IPMMU device nodes > arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes > arm64: dts: renesas: r8a774e1: Add GPIO device nodes > arm64: dts: renesas: r8a774e1: Add Ethernet AVB node I have reviewed this patch series. I didn't see any problems. Best regards, Nobuhiro > > .../bindings/dma/renesas,rcar-dmac.txt | 1 + > .../bindings/iommu/renesas,ipmmu-vmsa.txt | 1 + > arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 361 +++++++++++++++++- > drivers/iommu/ipmmu-vmsa.c | 5 + > 4 files changed, 349 insertions(+), 19 deletions(-) > > -- > 2.17.1 [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5233): https://lists.cip-project.org/g/cip-dev/message/5233 Mute This Topic: https://lists.cip-project.org/mt/76329804/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
[-- Attachment #1.1: Type: text/plain, Size: 424 bytes --] Hi! > This patch series add support for IPMMU/SYS-DMAC/GPIO/EAVB on > HiHope RZ/G2H board based on R8A774E1 SoC. > > This patches in this series are cherry-picked from mainline. Thank you, patches up-to-here applied and pushed out. Best regards, Pavel -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 195 bytes --] [-- Attachment #2: Type: text/plain, Size: 419 bytes --] -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5322): https://lists.cip-project.org/g/cip-dev/message/5322 Mute This Topic: https://lists.cip-project.org/mt/76329804/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-