[cip-dev] [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support

[cip-dev] [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support

[Biju Das]

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This patch series add support MMC/SDHI for iWave RZ/G1H board based on
r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
are cherry-picked from mainline.

Lad Prabhakar (4):
  dt-bindings: mmc: renesas,sdhi: Document r8a7742 support
  ARM: dts: r8a7742: Add SDHI nodes
  ARM: dts: r8a7742: Add MMC0 node
  ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller

Yoshihiro Shimoda (1):
  ARM: dts: renesas: Fix SD Card/eMMC interface device node names

 .../devicetree/bindings/mmc/tmio_mmc.txt      |  1 +
 arch/arm/boot/dts/r8a7742-iwg21d-q7.dts       | 39 ++++++++++
 arch/arm/boot/dts/r8a7742.dtsi                | 71 +++++++++++++++++++
 arch/arm/boot/dts/r8a7743.dtsi                |  6 +-
 arch/arm/boot/dts/r8a7744.dtsi                |  6 +-
 arch/arm/boot/dts/r8a7745.dtsi                |  6 +-
 arch/arm/boot/dts/r8a77470.dtsi               |  6 +-
 7 files changed, 123 insertions(+), 12 deletions(-)

-- 
2.17.1


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[cip-dev] [PATCH 4.4.y-cip 1/5] dt-bindings: mmc: renesas,sdhi: Document r8a7742 support

[Biju Das]

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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 1f8153ee031d0d4756daa985788bf0a960e588a6 upstream.

Document SDHI controller for RZ/G1H (R8A7742) SoC, which is compatible
with R-Car Gen2 SoC family.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1589555337-5498-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
[biju: Ported the changes from renamed bindings file renesas,sdhi.txt to here]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index 94bb00b0f4ef..874ffc99d798 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -15,6 +15,7 @@ Required properties:
 		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
 		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
 		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
+		"renesas,sdhi-r8a7742" - SDHI IP on R8A7742 SoC
 		"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
 		"renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
 		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
-- 
2.17.1


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[cip-dev] [PATCH 4.4.y-cip 2/5] ARM: dts: r8a7742: Add SDHI nodes

[Biju Das]

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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 3ab2ea5fd1ce3c61d67d7b737c361bec2ec6441f upstream.

Add the SDHI device nodes to the R8A7742 device tree.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1589555337-5498-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domains properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7742.dtsi | 56 ++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 1db3682a1deb..70dcd59b36ca 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -955,6 +955,62 @@
 			status = "disabled";
 		};
 
+		sdhi0: sd@ee100000 {
+			compatible = "renesas,sdhi-r8a7742",
+				     "renesas,rcar-gen2-sdhi";
+			reg = <0 0xee100000 0 0x328>;
+			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7742_CLK_SDHI0>;
+			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+			       <&dmac1 0xcd>, <&dmac1 0xce>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <195000000>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		sdhi1: sd@ee120000 {
+			compatible = "renesas,sdhi-r8a7742",
+				     "renesas,rcar-gen2-sdhi";
+			reg = <0 0xee120000 0 0x328>;
+			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7742_CLK_SDHI1>;
+			dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
+			       <&dmac1 0xc9>, <&dmac1 0xca>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <195000000>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		sdhi2: sd@ee140000 {
+			compatible = "renesas,sdhi-r8a7742",
+				     "renesas,rcar-gen2-sdhi";
+			reg = <0 0xee140000 0 0x100>;
+			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7742_CLK_SDHI2>;
+			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
+			       <&dmac1 0xc1>, <&dmac1 0xc2>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <97500000>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		sdhi3: sd@ee160000 {
+			compatible = "renesas,sdhi-r8a7742",
+				     "renesas,rcar-gen2-sdhi";
+			reg = <0 0xee160000 0 0x100>;
+			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7742_CLK_SDHI3>;
+			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
+			       <&dmac1 0xd3>, <&dmac1 0xd4>;
+			dma-names = "tx", "rx", "tx", "rx";
+			max-frequency = <97500000>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
 		mmcif1: mmc@ee220000 {
 			compatible = "renesas,mmcif-r8a7742",
 				     "renesas,sh-mmcif";
-- 
2.17.1


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[cip-dev] [PATCH 4.4.y-cip 3/5] ARM: dts: r8a7742: Add MMC0 node

[Biju Das]

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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 9493c8c34cb4b683917a0d2e82cc5df859b1e5a4 upstream.

Describe MMC0 device node in the R8A7742 device tree.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1589555337-5498-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: changed clocks and power-domains properties, removed resets property]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7742.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 70dcd59b36ca..f4d571b4a4db 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -1011,6 +1011,21 @@
 			status = "disabled";
 		};
 
+		mmcif0: mmc@ee200000 {
+			compatible = "renesas,mmcif-r8a7742",
+				     "renesas,sh-mmcif";
+			reg = <0 0xee200000 0 0x80>;
+			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp3_clks R8A7742_CLK_MMCIF0>;
+			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+			       <&dmac1 0xd1>, <&dmac1 0xd2>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&cpg_clocks>;
+			reg-io-width = <4>;
+			status = "disabled";
+			max-frequency = <97500000>;
+		};
+
 		mmcif1: mmc@ee220000 {
 			compatible = "renesas,mmcif-r8a7742",
 				     "renesas,sh-mmcif";
-- 
2.17.1


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[cip-dev] [PATCH 4.4.y-cip 4/5] ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller

[Biju Das]

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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit b3850cd90edc0baad2ec47293f4ec3c929de6f76 upstream.

Enable the SDHI2 controller on iWave RZ/G1H carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: removed sd-uhs-sdr50 property, since voltage switching is not supported in 4.4 kernel]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 39 +++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 8ce82ad3d946..82abbb758046 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -21,6 +21,28 @@
 		bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait";
 		stdout-path = "serial2:115200n8";
 	};
+
+	vcc_sdhi2: regulator-vcc-sdhi2 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDHI2 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
+	};
+
+	vccq_sdhi2: regulator-vccq-sdhi2 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI2 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <3300000 1>, <1800000 0>;
+	};
 };
 
 &avb {
@@ -48,6 +70,12 @@
 		groups = "scifa2_data_c";
 		function = "scifa2";
 	};
+
+	sdhi2_pins: sd2 {
+		groups = "sdhi2_data4", "sdhi2_ctrl";
+		function = "sdhi2";
+		power-source = <3300>;
+	};
 };
 
 &scifa2 {
@@ -56,3 +84,14 @@
 
 	status = "okay";
 };
+
+&sdhi2 {
+	pinctrl-0 = <&sdhi2_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&vcc_sdhi2>;
+	vqmmc-supply = <&vccq_sdhi2>;
+	cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
-- 
2.17.1


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[cip-dev] [PATCH 4.4.y-cip 5/5] ARM: dts: renesas: Fix SD Card/eMMC interface device node names

[Biju Das]

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From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

commit d8293670ae46e84973c974ea5745527e90a8afbb upstream.

Fix the device node names as "mmc@".

Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes: a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support")
Fixes: 43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes: 7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes: 3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes: 63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes: b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes: d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes: 7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes: 0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes: 15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes: f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes: 14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes: 2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes: b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes: b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes: ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support")
Fixes: fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes: b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes: 33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: Ported the changes only for RZG1[HMNEC] SoC's]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7742.dtsi  | 8 ++++----
 arch/arm/boot/dts/r8a7743.dtsi  | 6 +++---
 arch/arm/boot/dts/r8a7744.dtsi  | 6 +++---
 arch/arm/boot/dts/r8a7745.dtsi  | 6 +++---
 arch/arm/boot/dts/r8a77470.dtsi | 6 +++---
 5 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index f4d571b4a4db..fd4da0d6269e 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -955,7 +955,7 @@
 			status = "disabled";
 		};
 
-		sdhi0: sd@ee100000 {
+		sdhi0: mmc@ee100000 {
 			compatible = "renesas,sdhi-r8a7742",
 				     "renesas,rcar-gen2-sdhi";
 			reg = <0 0xee100000 0 0x328>;
@@ -969,7 +969,7 @@
 			status = "disabled";
 		};
 
-		sdhi1: sd@ee120000 {
+		sdhi1: mmc@ee120000 {
 			compatible = "renesas,sdhi-r8a7742",
 				     "renesas,rcar-gen2-sdhi";
 			reg = <0 0xee120000 0 0x328>;
@@ -983,7 +983,7 @@
 			status = "disabled";
 		};
 
-		sdhi2: sd@ee140000 {
+		sdhi2: mmc@ee140000 {
 			compatible = "renesas,sdhi-r8a7742",
 				     "renesas,rcar-gen2-sdhi";
 			reg = <0 0xee140000 0 0x100>;
@@ -997,7 +997,7 @@
 			status = "disabled";
 		};
 
-		sdhi3: sd@ee160000 {
+		sdhi3: mmc@ee160000 {
 			compatible = "renesas,sdhi-r8a7742",
 				     "renesas,rcar-gen2-sdhi";
 			reg = <0 0xee160000 0 0x100>;
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 9ea92a367e86..aff5ebbdb4bd 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -902,7 +902,7 @@
 			status = "disabled";
 		};
 
-		sdhi0: sd@ee100000 {
+		sdhi0: mmc@ee100000 {
 			compatible = "renesas,sdhi-r8a7743";
 			reg = <0 0xee100000 0 0x328>;
 			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
@@ -915,7 +915,7 @@
 			status = "disabled";
 		};
 
-		sdhi1: sd@ee140000 {
+		sdhi1: mmc@ee140000 {
 			compatible = "renesas,sdhi-r8a7743";
 			reg = <0 0xee140000 0 0x100>;
 			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
@@ -928,7 +928,7 @@
 			status = "disabled";
 		};
 
-		sdhi2: sd@ee160000 {
+		sdhi2: mmc@ee160000 {
 			compatible = "renesas,sdhi-r8a7743";
 			reg = <0 0xee160000 0 0x100>;
 			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 9e1885ce4948..079f46f17049 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1360,7 +1360,7 @@
 			};
 		};
 
-		sdhi0: sd@ee100000 {
+		sdhi0: mmc@ee100000 {
 			compatible = "renesas,sdhi-r8a7744";
 			reg = <0 0xee100000 0 0x328>;
 			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
@@ -1373,7 +1373,7 @@
 			status = "disabled";
 		};
 
-		sdhi1: sd@ee140000 {
+		sdhi1: mmc@ee140000 {
 			compatible = "renesas,sdhi-r8a7744";
 			reg = <0 0xee140000 0 0x100>;
 			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
@@ -1386,7 +1386,7 @@
 			status = "disabled";
 		};
 
-		sdhi2: sd@ee160000 {
+		sdhi2: mmc@ee160000 {
 			compatible = "renesas,sdhi-r8a7744";
 			reg = <0 0xee160000 0 0x100>;
 			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 54b556b34663..5f603d9eafea 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -1211,7 +1211,7 @@
 			};
 		};
 
-		sdhi0: sd@ee100000 {
+		sdhi0: mmc@ee100000 {
 			compatible = "renesas,sdhi-r8a7745";
 			reg = <0 0xee100000 0 0x328>;
 			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
@@ -1224,7 +1224,7 @@
 			status = "disabled";
 		};
 
-		sdhi1: sd@ee140000 {
+		sdhi1: mmc@ee140000 {
 			compatible = "renesas,sdhi-r8a7745";
 			reg = <0 0xee140000 0 0x100>;
 			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
@@ -1237,7 +1237,7 @@
 			status = "disabled";
 		};
 
-		sdhi2: sd@ee160000 {
+		sdhi2: mmc@ee160000 {
 			compatible = "renesas,sdhi-r8a7745";
 			reg = <0 0xee160000 0 0x100>;
 			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index dc345754ce61..1057bff76cc8 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -664,7 +664,7 @@
 			status = "disabled";
 		};
 
-		sdhi0: sd@ee100000 {
+		sdhi0: mmc@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
 			reg = <0 0xee100000 0 0x328>;
@@ -678,7 +678,7 @@
 			status = "disabled";
 		};
 
-		sdhi1: sd@ee300000 {
+		sdhi1: mmc@ee300000 {
 			compatible = "renesas,sdhi-mmc-r8a77470";
 			reg = <0 0xee300000 0 0x2000>;
 			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
@@ -688,7 +688,7 @@
 			status = "disabled";
 		};
 
-		sdhi2: sd@ee160000 {
+		sdhi2: mmc@ee160000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
 			reg = <0 0xee160000 0 0x328>;
-- 
2.17.1


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Re: [cip-dev] [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support

[Nobuhiro Iwamatsu]

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Hi,

Thanks for your work.

> -----Original Message-----
> From: Biju Das [mailto:biju.das.jz@bp.renesas.com]
> Sent: Wednesday, September 2, 2020 4:51 PM
> To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>
> Cc: Chris Paterson <chris.paterson2@renesas.com>; Biju Das <biju.das.jz@bp.renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support
> 
> This patch series add support MMC/SDHI for iWave RZ/G1H board based on
> r8a7742 SoC to 4.4.y-cip kernel. All patches in this series
> are cherry-picked from mainline.
> 
> Lad Prabhakar (4):
>   dt-bindings: mmc: renesas,sdhi: Document r8a7742 support
>   ARM: dts: r8a7742: Add SDHI nodes
>   ARM: dts: r8a7742: Add MMC0 node
>   ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller
> 
> Yoshihiro Shimoda (1):
>   ARM: dts: renesas: Fix SD Card/eMMC interface device node names
> 
>  .../devicetree/bindings/mmc/tmio_mmc.txt      |  1 +
>  arch/arm/boot/dts/r8a7742-iwg21d-q7.dts       | 39 ++++++++++
>  arch/arm/boot/dts/r8a7742.dtsi                | 71 +++++++++++++++++++
>  arch/arm/boot/dts/r8a7743.dtsi                |  6 +-
>  arch/arm/boot/dts/r8a7744.dtsi                |  6 +-
>  arch/arm/boot/dts/r8a7745.dtsi                |  6 +-
>  arch/arm/boot/dts/r8a77470.dtsi               |  6 +-
>  7 files changed, 123 insertions(+), 12 deletions(-)

This patch series looks good to me.
If there are no other comments, I will apply this.

Best regards,
  Nobuhiro

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Re: [cip-dev] [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support

[Pavel Machek]

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Hi!

> >  .../devicetree/bindings/mmc/tmio_mmc.txt      |  1 +
> >  arch/arm/boot/dts/r8a7742-iwg21d-q7.dts       | 39 ++++++++++
> >  arch/arm/boot/dts/r8a7742.dtsi                | 71 +++++++++++++++++++
> >  arch/arm/boot/dts/r8a7743.dtsi                |  6 +-
> >  arch/arm/boot/dts/r8a7744.dtsi                |  6 +-
> >  arch/arm/boot/dts/r8a7745.dtsi                |  6 +-
> >  arch/arm/boot/dts/r8a77470.dtsi               |  6 +-
> >  7 files changed, 123 insertions(+), 12 deletions(-)
> 
> This patch series looks good to me.
> If there are no other comments, I will apply this.

I reviewed the series and they look good to me.

Best regards,
								Pavel

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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Re: [cip-dev] [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support

[Nobuhiro Iwamatsu]

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Hi,

> -----Original Message-----
> From: Pavel Machek [mailto:pavel@denx.de]
> Sent: Wednesday, September 2, 2020 10:33 PM
> To: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ) <nobuhiro1.iwamatsu@toshiba.co.jp>
> Cc: biju.das.jz@bp.renesas.com; cip-dev@lists.cip-project.org; pavel@denx.de; chris.paterson2@renesas.com;
> prabhakar.mahadev-lad.rj@bp.renesas.com
> Subject: Re: [PATCH 4.4.y-cip 0/5] Add RZ/G1H MMC/SDHI support
> 
> Hi!
> 
> > >  .../devicetree/bindings/mmc/tmio_mmc.txt      |  1 +
> > >  arch/arm/boot/dts/r8a7742-iwg21d-q7.dts       | 39 ++++++++++
> > >  arch/arm/boot/dts/r8a7742.dtsi                | 71 +++++++++++++++++++
> > >  arch/arm/boot/dts/r8a7743.dtsi                |  6 +-
> > >  arch/arm/boot/dts/r8a7744.dtsi                |  6 +-
> > >  arch/arm/boot/dts/r8a7745.dtsi                |  6 +-
> > >  arch/arm/boot/dts/r8a77470.dtsi               |  6 +-
> > >  7 files changed, 123 insertions(+), 12 deletions(-)
> >
> > This patch series looks good to me.
> > If there are no other comments, I will apply this.
> 
> I reviewed the series and they look good to me.
> 

OK, I applied and pushed.

> Best regards,
> 								Pavel

Best regards,
  Nobuhiro

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[cip-dev] [PATCH 4.4.y-cip 4/5] ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller

[Biju Das]

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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit b3850cd90edc0baad2ec47293f4ec3c929de6f76 upstream.

Enable the SDHI2 controller on iWave RZ/G1H carrier board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590420129-7531-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[biju: removed sd-uhs-sdr50 property, since voltage switching is not supported in 4.4 kernel]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 39 +++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 8ce82ad3d946..82abbb758046 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -21,6 +21,28 @@
 		bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait";
 		stdout-path = "serial2:115200n8";
 	};
+
+	vcc_sdhi2: regulator-vcc-sdhi2 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDHI2 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
+	};
+
+	vccq_sdhi2: regulator-vccq-sdhi2 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI2 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <3300000 1>, <1800000 0>;
+	};
 };
 
 &avb {
@@ -48,6 +70,12 @@
 		groups = "scifa2_data_c";
 		function = "scifa2";
 	};
+
+	sdhi2_pins: sd2 {
+		groups = "sdhi2_data4", "sdhi2_ctrl";
+		function = "sdhi2";
+		power-source = <3300>;
+	};
 };
 
 &scifa2 {
@@ -56,3 +84,14 @@
 
 	status = "okay";
 };
+
+&sdhi2 {
+	pinctrl-0 = <&sdhi2_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&vcc_sdhi2>;
+	vqmmc-supply = <&vccq_sdhi2>;
+	cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
-- 
2.17.1


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