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From: "Chen-Yu Tsai (Moxa)" <wens@csie.org>
To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de
Cc: cip-dev@lists.cip-project.org, JohnsonCH.Chen@moxa.com,
	victor.yu@moxa.com, wens@csie.org
Subject: [cip-dev] [PATCH 4.4.y-cip 11/11] ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
Date: Wed,  9 Sep 2020 12:42:33 +0800
Message-ID: <20200909044233.4115-12-wens@csie.org> (raw)
In-Reply-To: <20200909044233.4115-1-wens@csie.org>


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From: Dave Gerlach <d-gerlach@ti.com>

commit 72ac40fcb164a3d8fbd1ff13647abe67df26ced5 upstream.

After the ti-cpufreq driver has been added, we can now drop the
operating-points table present in am33xx.dtsi for the cpu and add an
operating-points-v2 table with all OPPs available for all silicon
revisions. Also add necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime as part of the operating-points
table.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Chen-Yu Tsai (Moxa) <wens@csie.org>
---
 arch/arm/boot/dts/am33xx.dtsi | 87 +++++++++++++++++++++++++++++------
 1 file changed, 74 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 4b40e6d401a03..c256718d75801 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -45,19 +45,7 @@
 			device_type = "cpu";
 			reg = <0>;
 
-			/*
-			 * To consider voltage drop between PMIC and SoC,
-			 * tolerance value is reduced to 2% from 4% and
-			 * voltage value is increased as a precaution.
-			 */
-			operating-points = <
-				/* kHz    uV */
-				720000  1285000
-				600000  1225000
-				500000  1125000
-				275000  1125000
-			>;
-			voltage-tolerance = <2>; /* 2 percentage */
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -66,6 +54,79 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
+
+		/*
+		 * The three following nodes are marked with opp-suspend
+		 * because the can not be enabled simultaneously on a
+		 * single SoC.
+		 */
+		opp50@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <950000 931000 969000>;
+			opp-supported-hw = <0x06 0x0010>;
+			opp-suspend;
+		};
+
+		opp100@275000000 {
+			opp-hz = /bits/ 64 <275000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0x00FF>;
+			opp-suspend;
+		};
+
+		opp100@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0020>;
+			opp-suspend;
+		};
+
+		opp100@500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp100@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0040>;
+		};
+
+		opp120@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp120@720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x06 0x0080>;
+		};
+
+		oppturbo@720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		oppturbo@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x06 0x0100>;
+		};
+
+		oppnitro@1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1325000 1298500 1351500>;
+			opp-supported-hw = <0x04 0x0200>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a8-pmu";
 		interrupts = <3>;
-- 
2.28.0


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  parent reply index

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-09  4:42 [cip-dev] [PATCH 4.4.y-cip 00/11] ti-cpufreq backport Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 01/11] PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 02/11] PM / OPP: Expose _of_get_opp_desc_node as dev_pm_opp API Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 03/11] Documentation: dt: add bindings for ti-cpufreq Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 04/11] cpufreq: ti: Add cpufreq driver to determine available OPPs at runtime Chen-Yu Tsai (Moxa)
2020-09-09  6:45   ` Pavel Machek
2020-09-09  7:03     ` Pavel Machek
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 05/11] cpufreq: ti: Fix 'of_node_put' being called twice in error handling path Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 06/11] cpufreq: ti-cpufreq: kfree opp_data when failure Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 07/11] cpufreq: ti-cpufreq: add missing of_node_put() Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 08/11] cpufreq: ti-cpufreq: Fix an incorrect error return value Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 09/11] cpufreq: dt: Don't use generic platdev driver for ti-cpufreq platforms Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` [cip-dev] [PATCH 4.4.y-cip 10/11] ARM: omap2plus_defconfig: Enable support for ti-cpufreq Chen-Yu Tsai (Moxa)
2020-09-09  4:42 ` Chen-Yu Tsai (Moxa) [this message]
2020-09-09  7:03 ` [cip-dev] [PATCH 4.4.y-cip 00/11] ti-cpufreq backport Pavel Machek
2020-09-09 20:11   ` Nobuhiro Iwamatsu

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