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From: "Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [cip-dev] [RFC PATCH 4.19.y-cip 34/50] PCI: endpoint: Add support to handle multiple base for mapping outbound memory
Date: Mon, 12 Oct 2020 15:19:17 +0100
Message-ID: <20201012141933.9652-35-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20201012141933.9652-1-prabhakar.mahadev-lad.rj@bp.renesas.com>


[-- Attachment #1: Type: text/plain, Size: 13491 bytes --]

commit d45e3c1a5979efd40dbbac9a5c3586f4fa41f734 upstream.

R-Car PCIe controller has support to map multiple memory regions for
mapping the outbound memory in local system also the controller limits
single allocation for each region (that is, once a chunk is used from the
region it cannot be used to allocate a new one). This features inspires to
add support for handling multiple memory bases in endpoint framework.

With this patch pci_epc_mem_init() initializes address space for endpoint
controller which support single window and pci_epc_multi_mem_init()
initializes multiple windows supported by endpoint controller.

Link: https://lore.kernel.org/r/1588854799-13710-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
[PL: manually applied changes to pcie-designware-ep.c]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../pci/controller/dwc/pcie-designware-ep.c   |  12 +-
 drivers/pci/endpoint/pci-epc-mem.c            | 199 ++++++++++++------
 include/linux/pci-epc.h                       |  33 ++-
 3 files changed, 168 insertions(+), 76 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 667763fd868f..471855feab03 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -434,11 +434,11 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no,
 		reg = ep->msi_cap + PCI_MSI_DATA_32;
 		msg_data = dw_pcie_readw_dbi(pci, reg);
 	}
-	aligned_offset = msg_addr_lower & (epc->mem->page_size - 1);
+	aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1);
 	msg_addr = ((u64)msg_addr_upper) << 32 |
 			(msg_addr_lower & ~aligned_offset);
 	ret = dw_pcie_ep_map_addr(epc, func_no, ep->msi_mem_phys, msg_addr,
-				  epc->mem->page_size);
+				  epc->mem->window.page_size);
 	if (ret)
 		return ret;
 
@@ -495,7 +495,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
 		return -EPERM;
 
 	ret = dw_pcie_ep_map_addr(epc, func_no, ep->msi_mem_phys, msg_addr,
-				  epc->mem->page_size);
+				  epc->mem->window.page_size);
 	if (ret)
 		return ret;
 
@@ -511,7 +511,7 @@ void dw_pcie_ep_exit(struct dw_pcie_ep *ep)
 	struct pci_epc *epc = ep->epc;
 
 	pci_epc_mem_free_addr(epc, ep->msi_mem_phys, ep->msi_mem,
-			      epc->mem->page_size);
+			      epc->mem->window.page_size);
 
 	pci_epc_mem_exit(epc);
 }
@@ -586,7 +586,7 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 	if (ret < 0)
 		epc->max_functions = 1;
 
-	ret = __pci_epc_mem_init(epc, ep->phys_base, ep->addr_size,
+	ret = pci_epc_mem_init(epc, ep->phys_base, ep->addr_size,
 				 ep->page_size);
 	if (ret < 0) {
 		dev_err(dev, "Failed to initialize address space\n");
@@ -594,7 +594,7 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 	}
 
 	ep->msi_mem = pci_epc_mem_alloc_addr(epc, &ep->msi_mem_phys,
-					     epc->mem->page_size);
+					     epc->mem->window.page_size);
 	if (!ep->msi_mem) {
 		dev_err(dev, "Failed to reserve memory for MSI/MSI-X\n");
 		return -ENOMEM;
diff --git a/drivers/pci/endpoint/pci-epc-mem.c b/drivers/pci/endpoint/pci-epc-mem.c
index cdd1d3821249..80c46f3a4590 100644
--- a/drivers/pci/endpoint/pci-epc-mem.c
+++ b/drivers/pci/endpoint/pci-epc-mem.c
@@ -23,7 +23,7 @@
 static int pci_epc_mem_get_order(struct pci_epc_mem *mem, size_t size)
 {
 	int order;
-	unsigned int page_shift = ilog2(mem->page_size);
+	unsigned int page_shift = ilog2(mem->window.page_size);
 
 	size--;
 	size >>= page_shift;
@@ -36,67 +36,95 @@ static int pci_epc_mem_get_order(struct pci_epc_mem *mem, size_t size)
 }
 
 /**
- * __pci_epc_mem_init() - initialize the pci_epc_mem structure
+ * pci_epc_multi_mem_init() - initialize the pci_epc_mem structure
  * @epc: the EPC device that invoked pci_epc_mem_init
- * @phys_base: the physical address of the base
- * @size: the size of the address space
- * @page_size: size of each page
+ * @windows: pointer to windows supported by the device
+ * @num_windows: number of windows device supports
  *
  * Invoke to initialize the pci_epc_mem structure used by the
  * endpoint functions to allocate mapped PCI address.
  */
-int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_base, size_t size,
-		       size_t page_size)
+int pci_epc_multi_mem_init(struct pci_epc *epc,
+			   struct pci_epc_mem_window *windows,
+			   unsigned int num_windows)
 {
-	int ret;
-	struct pci_epc_mem *mem;
-	unsigned long *bitmap;
+	struct pci_epc_mem *mem = NULL;
+	unsigned long *bitmap = NULL;
 	unsigned int page_shift;
-	int pages;
+	size_t page_size;
 	int bitmap_size;
+	int pages;
+	int ret;
+	int i;
 
-	if (page_size < PAGE_SIZE)
-		page_size = PAGE_SIZE;
+	epc->num_windows = 0;
 
-	page_shift = ilog2(page_size);
-	pages = size >> page_shift;
-	bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
+	if (!windows || !num_windows)
+		return -EINVAL;
 
-	mem = kzalloc(sizeof(*mem), GFP_KERNEL);
-	if (!mem) {
-		ret = -ENOMEM;
-		goto err;
-	}
+	epc->windows = kcalloc(num_windows, sizeof(*epc->windows), GFP_KERNEL);
+	if (!epc->windows)
+		return -ENOMEM;
 
-	bitmap = kzalloc(bitmap_size, GFP_KERNEL);
-	if (!bitmap) {
-		ret = -ENOMEM;
-		goto err_mem;
-	}
+	for (i = 0; i < num_windows; i++) {
+		page_size = windows[i].page_size;
+		if (page_size < PAGE_SIZE)
+			page_size = PAGE_SIZE;
+		page_shift = ilog2(page_size);
+		pages = windows[i].size >> page_shift;
+		bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
 
-	mem->bitmap = bitmap;
-	mem->phys_base = phys_base;
-	mem->page_size = page_size;
-	mem->pages = pages;
-	mem->size = size;
-	mutex_init(&mem->lock);
+		mem = kzalloc(sizeof(*mem), GFP_KERNEL);
+		if (!mem) {
+			ret = -ENOMEM;
+			i--;
+			goto err_mem;
+		}
 
-	epc->mem = mem;
+		bitmap = kzalloc(bitmap_size, GFP_KERNEL);
+		if (!bitmap) {
+			ret = -ENOMEM;
+			kfree(mem);
+			i--;
+			goto err_mem;
+		}
+
+		mem->window.phys_base = windows[i].phys_base;
+		mem->window.size = windows[i].size;
+		mem->window.page_size = page_size;
+		mem->bitmap = bitmap;
+		mem->pages = pages;
+		mutex_init(&mem->lock);
+		epc->windows[i] = mem;
+	}
+
+	epc->mem = epc->windows[0];
+	epc->num_windows = num_windows;
 
 	return 0;
 
 err_mem:
-	kfree(mem);
+	for (; i >= 0; i--) {
+		mem = epc->windows[i];
+		kfree(mem->bitmap);
+		kfree(mem);
+	}
+	kfree(epc->windows);
 
-err:
-return ret;
+	return ret;
 }
-EXPORT_SYMBOL_GPL(__pci_epc_mem_init);
+EXPORT_SYMBOL_GPL(pci_epc_multi_mem_init);
 
 int pci_epc_mem_init(struct pci_epc *epc, phys_addr_t base,
 		     size_t size, size_t page_size)
 {
-	return __pci_epc_mem_init(epc, base, size, page_size);
+	struct pci_epc_mem_window mem_window;
+
+	mem_window.phys_base = base;
+	mem_window.size = size;
+	mem_window.page_size = page_size;
+
+	return pci_epc_multi_mem_init(epc, &mem_window, 1);
 }
 EXPORT_SYMBOL_GPL(pci_epc_mem_init);
 
@@ -109,11 +137,22 @@ EXPORT_SYMBOL_GPL(pci_epc_mem_init);
  */
 void pci_epc_mem_exit(struct pci_epc *epc)
 {
-	struct pci_epc_mem *mem = epc->mem;
+	struct pci_epc_mem *mem;
+	int i;
 
+	if (!epc->num_windows)
+		return;
+
+	for (i = 0; i < epc->num_windows; i++) {
+		mem = epc->windows[i];
+		kfree(mem->bitmap);
+		kfree(mem);
+	}
+	kfree(epc->windows);
+
+	epc->windows = NULL;
 	epc->mem = NULL;
-	kfree(mem->bitmap);
-	kfree(mem);
+	epc->num_windows = 0;
 }
 EXPORT_SYMBOL_GPL(pci_epc_mem_exit);
 
@@ -129,31 +168,60 @@ EXPORT_SYMBOL_GPL(pci_epc_mem_exit);
 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
 				     phys_addr_t *phys_addr, size_t size)
 {
-	int pageno;
 	void __iomem *virt_addr = NULL;
-	struct pci_epc_mem *mem = epc->mem;
-	unsigned int page_shift = ilog2(mem->page_size);
+	struct pci_epc_mem *mem;
+	unsigned int page_shift;
+	size_t align_size;
+	int pageno;
 	int order;
+	int i;
 
-	size = ALIGN(size, mem->page_size);
-	order = pci_epc_mem_get_order(mem, size);
-
-	mutex_lock(&mem->lock);
-	pageno = bitmap_find_free_region(mem->bitmap, mem->pages, order);
-	if (pageno < 0)
-		goto ret;
+	for (i = 0; i < epc->num_windows; i++) {
+		mem = epc->windows[i];
+		mutex_lock(&mem->lock);
+		align_size = ALIGN(size, mem->window.page_size);
+		order = pci_epc_mem_get_order(mem, align_size);
 
-	*phys_addr = mem->phys_base + ((phys_addr_t)pageno << page_shift);
-	virt_addr = ioremap(*phys_addr, size);
-	if (!virt_addr)
-		bitmap_release_region(mem->bitmap, pageno, order);
+		pageno = bitmap_find_free_region(mem->bitmap, mem->pages,
+						 order);
+		if (pageno >= 0) {
+			page_shift = ilog2(mem->window.page_size);
+			*phys_addr = mem->window.phys_base +
+				((phys_addr_t)pageno << page_shift);
+			virt_addr = ioremap(*phys_addr, align_size);
+			if (!virt_addr) {
+				bitmap_release_region(mem->bitmap,
+						      pageno, order);
+				mutex_unlock(&mem->lock);
+				continue;
+			}
+			mutex_unlock(&mem->lock);
+			return virt_addr;
+		}
+		mutex_unlock(&mem->lock);
+	}
 
-ret:
-	mutex_unlock(&mem->lock);
 	return virt_addr;
 }
 EXPORT_SYMBOL_GPL(pci_epc_mem_alloc_addr);
 
+static struct pci_epc_mem *pci_epc_get_matching_window(struct pci_epc *epc,
+						       phys_addr_t phys_addr)
+{
+	struct pci_epc_mem *mem;
+	int i;
+
+	for (i = 0; i < epc->num_windows; i++) {
+		mem = epc->windows[i];
+
+		if (phys_addr >= mem->window.phys_base &&
+		    phys_addr < (mem->window.phys_base + mem->window.size))
+			return mem;
+	}
+
+	return NULL;
+}
+
 /**
  * pci_epc_mem_free_addr() - free the allocated memory address
  * @epc: the EPC device on which memory was allocated
@@ -166,14 +234,23 @@ EXPORT_SYMBOL_GPL(pci_epc_mem_alloc_addr);
 void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
 			   void __iomem *virt_addr, size_t size)
 {
+	struct pci_epc_mem *mem;
+	unsigned int page_shift;
+	size_t page_size;
 	int pageno;
-	struct pci_epc_mem *mem = epc->mem;
-	unsigned int page_shift = ilog2(mem->page_size);
 	int order;
 
+	mem = pci_epc_get_matching_window(epc, phys_addr);
+	if (!mem) {
+		pr_err("failed to get matching window\n");
+		return;
+	}
+
+	page_size = mem->window.page_size;
+	page_shift = ilog2(page_size);
 	iounmap(virt_addr);
-	pageno = (phys_addr - mem->phys_base) >> page_shift;
-	size = ALIGN(size, mem->page_size);
+	pageno = (phys_addr - mem->window.phys_base) >> page_shift;
+	size = ALIGN(size, page_size);
 	order = pci_epc_mem_get_order(mem, size);
 	mutex_lock(&mem->lock);
 	bitmap_release_region(mem->bitmap, pageno, order);
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index e5f6ca8c36a8..5adb881bbcd7 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -65,20 +65,28 @@ struct pci_epc_ops {
 	struct module *owner;
 };
 
+/**
+ * struct pci_epc_mem_window - address window of the endpoint controller
+ * @phys_base: physical base address of the PCI address window
+ * @size: the size of the PCI address window
+ * @page_size: size of each page
+ */
+struct pci_epc_mem_window {
+	phys_addr_t	phys_base;
+	size_t		size;
+	size_t		page_size;
+};
+
 /**
  * struct pci_epc_mem - address space of the endpoint controller
- * @phys_base: physical base address of the PCI address space
- * @size: the size of the PCI address space
+ * @window: address window of the endpoint controller
  * @bitmap: bitmap to manage the PCI address space
  * @pages: number of bits representing the address region
- * @page_size: size of each page
  * @lock: mutex to protect bitmap
  */
 struct pci_epc_mem {
-	phys_addr_t	phys_base;
-	size_t		size;
+	struct pci_epc_mem_window window;
 	unsigned long	*bitmap;
-	size_t		page_size;
 	int		pages;
 	/* mutex to protect against concurrent access for memory allocation*/
 	struct mutex	lock;
@@ -89,7 +97,11 @@ struct pci_epc_mem {
  * @dev: PCI EPC device
  * @pci_epf: list of endpoint functions present in this EPC device
  * @ops: function pointers for performing endpoint operations
- * @mem: address space of the endpoint controller
+ * @windows: array of address space of the endpoint controller
+ * @mem: first window of the endpoint controller, which corresponds to
+ *       default address space of the endpoint controller supporting
+ *       single window.
+ * @num_windows: number of windows supported by device
  * @max_functions: max number of functions that can be configured in this EPC
  * @group: configfs group representing the PCI EPC device
  * @lock: mutex to protect pci_epc ops
@@ -100,7 +112,9 @@ struct pci_epc {
 	struct device			dev;
 	struct list_head		pci_epf;
 	const struct pci_epc_ops	*ops;
+	struct pci_epc_mem		**windows;
 	struct pci_epc_mem		*mem;
+	unsigned int			num_windows;
 	u8				max_functions;
 	struct config_group		*group;
 	/* mutex to protect against concurrent access of EP controller */
@@ -194,8 +208,9 @@ void pci_epc_put(struct pci_epc *epc);
 
 int pci_epc_mem_init(struct pci_epc *epc, phys_addr_t base,
 		     size_t size, size_t page_size);
-int __pci_epc_mem_init(struct pci_epc *epc, phys_addr_t phys_addr, size_t size,
-		       size_t page_size);
+int pci_epc_multi_mem_init(struct pci_epc *epc,
+			   struct pci_epc_mem_window *window,
+			   unsigned int num_windows);
 void pci_epc_mem_exit(struct pci_epc *epc);
 void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
 				     phys_addr_t *phys_addr, size_t size);
-- 
2.17.1


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  parent reply index

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-12 14:18 [cip-dev] [RFC PATCH 4.19.y-cip 00/50] Add PCIe EP support for Renesas R-Car Gen3 and RZ/G2x Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 01/50] PCI: endpoint: Add new pci_epc_ops to get EPC features Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 02/50] PCI: dwc: Add ->get_features() callback function to dw_pcie_ep_ops Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 03/50] PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 04/50] PCI: pci-dra7xx: " Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 05/50] PCI: rockchip: " Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 06/50] PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 07/50] PCI: endpoint: Add helper to get first unreserved BAR Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 08/50] PCI: endpoint: Fix pci_epf_alloc_space() to set correct MEM TYPE flags Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 09/50] PCI: pci-epf-test: Remove setting epf_bar flags in function driver Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 10/50] PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64Bit Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 11/50] PCI: pci-epf-test: Use pci_epc_get_features() to get EPC features Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 12/50] PCI: cadence: Remove pci_epf_linkup() from Cadence EP driver Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 13/50] PCI: rockchip: Remove pci_epf_linkup() from Rockchip " Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 14/50] PCI: designware-plat: Remove setting epc->features in Designware plat " Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 15/50] PCI: endpoint: Remove features member in struct pci_epc Lad Prabhakar
2020-10-12 14:18 ` [cip-dev] [RFC PATCH 4.19.y-cip 16/50] PCI: endpoint: Fix a potential NULL pointer dereference Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 17/50] PCI: endpoint: Add support to specify alignment for buffers allocated to BARs Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 18/50] PCI: endpoint: Set endpoint controller pointer to NULL Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 19/50] PCI: endpoint: Allocate enough space for fixed size BAR Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 20/50] PCI: endpoint: Skip odd BAR when skipping 64bit BAR Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 21/50] PCI: endpoint: Clear BAR before freeing its space Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 22/50] PCI: endpoint: Cast the page number to phys_addr_t Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 23/50] PCI: endpoint: Use notification chain mechanism to notify EPC events to EPF Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 24/50] PCI: endpoint: Replace spinlock with mutex Lad Prabhakar
2020-10-20 20:43   ` Pavel Machek
2020-10-20 21:56     ` Lad Prabhakar
2020-10-21 18:34       ` Pavel Machek
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 25/50] PCI: endpoint: Protect concurrent access to pci_epf_ops " Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 26/50] PCI: endpoint: Assign function number for each PF in EPC core Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 27/50] PCI: endpoint: Add core init notifying feature Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 28/50] PCI: endpoint: Add notification for core init completion Lad Prabhakar
2020-10-21 19:00   ` Pavel Machek
2020-10-21 20:16     ` Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 29/50] PCI: pci-epf-test: Add support to defer core initialization Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 30/50] PCI: endpoint: Fix clearing start entry in configfs Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 31/50] PCI: endpoint: Fix ->set_msix() to take BIR and offset as arguments Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 32/50] PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 33/50] PCI: endpoint: Pass page size as argument to pci_epc_mem_init() Lad Prabhakar
2020-10-12 14:19 ` Lad Prabhakar [this message]
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 35/50] PCI: endpoint: functions/pci-epf-test: Print throughput information Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 36/50] PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 37/50] arm64: defconfig: Enable CONFIG_PCIE_RCAR_HOST Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 38/50] PCI: rcar: Move shareable code to a common file Lad Prabhakar
2020-10-21 19:06   ` Pavel Machek
2020-10-21 20:28     ` Lad Prabhakar
2020-10-22 19:42       ` Pavel Machek
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 39/50] PCI: rcar: Fix calculating mask for PCIEPAMR register Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 40/50] dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 41/50] PCI: rcar: Add endpoint mode support Lad Prabhakar
2020-10-14  9:22   ` Pavel Machek
2020-10-15 16:31     ` Lad Prabhakar
2020-10-15 18:01       ` Pavel Machek
2020-10-22 18:23         ` Pavel Machek
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 42/50] arm64: defconfig: Enable R-Car PCIe endpoint driver Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 43/50] dt-bindings: pci: rcar-pci-ep: Document r8a774a1 and r8a774b1 Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 44/50] arm64: dts: renesas: r8a774c0: Add PCIe EP node Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 45/50] arm64: dts: renesas: r8a774a1: Add PCIe EP nodes Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 46/50] arm64: dts: renesas: r8a774b1: " Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 47/50] misc: pci_endpoint_test: Add Device ID for RZ/G2E PCIe controller Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 48/50] misc: pci_endpoint_test: Add Device ID for RZ/G2M and RZ/G2N PCIe controllers Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 49/50] tools: PCI: Exit with error code when test fails Lad Prabhakar
2020-10-12 14:19 ` [cip-dev] [RFC PATCH 4.19.y-cip 50/50] tools: PCI: Fix fd leakage Lad Prabhakar
2020-10-14  9:39 ` [cip-dev] If you are using PCIe EP, speak up was Re: [RFC PATCH 4.19.y-cip 00/50] Add PCIe EP support for Renesas R-Car Gen3 and RZ/G2x Pavel Machek
2020-10-15 16:18   ` Lad Prabhakar
2020-10-20  7:16   ` Lad Prabhakar
2020-10-20 10:34     ` Pavel Machek
2020-10-20 12:01     ` Pavel Machek
2020-10-20 13:01       ` Lad Prabhakar
2020-10-20 20:48         ` Pavel Machek
2020-10-20 21:58           ` Lad Prabhakar
2020-10-14 10:07 ` [cip-dev] " Pavel Machek
2020-10-15 16:27   ` Lad Prabhakar

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