Hi!

> > Plain 0 would be enough
> >
> Agreed.
> 
> Ill post patches upstream to fix this and then backport or do you
>want me to do the changes in place ?

Yes, thank you.

> > > +val |= ASTINTX;
> > > +rcar_pci_write_reg(pcie, val, PCIEINTXR);
> > > +usleep_range(1000, 1001);
> > > +val = rcar_pci_read_reg(pcie, PCIEINTXR);
> >
> > This is crazy. Either you need exact timing or you don't, but I don't
> > believe usleep can guarantee microsecond accuracy.
> >
> > (And you probably don't need it, right?)
> >
> Indeed a sleep is needed but checkpatch complains about it so usleep_range() was added.

checkpatch should not be an excuse for crazy code... and this one is
crazy.

Sleep has nowhere near microsecond accuracy. If you can tolerate
bigger delay, feel free to specify reasonable range. But in this case
you probably want "as close as possible to 1msec", and no,
usleep_range is not right primitive for that.

Best regards,
								Pavel

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