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* [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
@ 2022-03-30 18:54 Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 10/39] mmc: tmio: set max_busy_timeout Lad Prabhakar
                   ` (29 more replies)
  0 siblings, 30 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

Hi All,

This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
enables this interfaces on Renesas RZ/G2L SMARC EVK.

All the patches have been cherry picked from v5.17 release.

Cheers,
Prabhakar

Biju Das (9):
  mmc: tmio: reinit card irqs in reset routine
  clk: renesas: rzg2l: Add SDHI clk mux support
  clk: renesas: r9a07g044: Add SDHI clock and reset entries
  dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning
  dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings
  dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
  arm64: dts: renesas: r9a07g044: Add SDHI nodes
  arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform

Geert Uytterhoeven (1):
  clk: renesas: rzg2l: Add missing kerneldoc for resets

Lad Prabhakar (2):
  clk: renesas: rzg2l: Check return value of pm_genpd_init()
  clk: renesas: rzg2l: propagate return value
    of_genpd_add_provider_simple()

Masaharu Hayakawa (1):
  mmc: tmio: Add data timeout error detection

Rob Herring (2):
  dt-bindings: Fix errors in 'if' schemas
  dt-bindings: Drop redundant minItems/maxItems

Takeshi Saito (1):
  mmc: tmio: restore bus width when resetting

Wolfram Sang (21):
  mmc: renesas_sdhi: probe into TMIO after SCC parameters have been
    setup
  mmc: renesas_sdhi: populate SCC pointer at the proper place
  mmc: renesas_sdhi: simplify reset routine a little
  mmc: renesas_sdhi: clear TAPEN when resetting, too
  mmc: renesas_sdhi: merge the SCC reset functions
  mmc: renesas_sdhi: remove superfluous SCLKEN
  mmc: renesas_sdhi: improve HOST_MODE usage
  mmc: renesas_sdhi: don't hardcode SDIF values
  mmc: renesas_sdhi: sort includes
  mmc: tmio: set max_busy_timeout
  mmc: tmio: add hook for custom busy_wait calculation
  mmc: renesas_sdhi: populate hook for longer busy_wait
  mmc: tmio: support custom irq masks
  mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL
  mmc: tmio: abort DMA before reset
  mmc: renesas_sdhi: break SCC reset into own function
  mmc: renesas_sdhi: do hard reset if possible
  mmc: tmio: always flag retune when resetting and a card is present
  mmc: tmio: always restore irq register
  mmc: tmio: reenable card irqs after the reset callback
  dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock

Yoshihiro Shimoda (2):
  mmc: renesas_internal_dmac: add pre_req and post_req support
  mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune

 .../devicetree/bindings/mmc/renesas,sdhi.yaml | 153 ++++++++++++-----
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    |  32 ++++
 .../boot/dts/renesas/rzg2l-smarc-som.dtsi     | 143 ++++++++++++++++
 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi  |  62 +++++++
 drivers/clk/renesas/r9a07g044-cpg.c           |  36 ++++
 drivers/clk/renesas/rzg2l-cpg.c               | 136 ++++++++++++++-
 drivers/clk/renesas/rzg2l-cpg.h               |  19 +++
 drivers/mmc/host/Kconfig                      |   1 +
 drivers/mmc/host/renesas_sdhi.h               |   2 +
 drivers/mmc/host/renesas_sdhi_core.c          | 155 ++++++++++++------
 drivers/mmc/host/renesas_sdhi_internal_dmac.c |  91 +++++++++-
 drivers/mmc/host/tmio_mmc.h                   |  11 +-
 drivers/mmc/host/tmio_mmc_core.c              |  88 ++++++----
 drivers/mmc/host/uniphier-sd.c                |   1 +
 include/linux/mfd/tmio.h                      |   7 +-
 15 files changed, 794 insertions(+), 143 deletions(-)

-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 10/39] mmc: tmio: set max_busy_timeout
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 11/39] mmc: tmio: add hook for custom busy_wait calculation Lad Prabhakar
                   ` (28 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 30ae3e13caeaa47884c222ebf5711ce27ed25f19 upstream.

Set max_busy_timeouts for variants known to support the TOPxx bits in
the SD_OPTION register. The timeout mechanism was running in the
background but not yet properly handled in the driver. So, let the MMC
core know when to not use R1B to avoid unhandled timeouts.

My datasheets for older variants (tmio_mmc.c) suggest that they support
it, too. However, actual bit descriptions are lacking, so I chose an
opt-in approach.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201125213001.15003-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/renesas_sdhi_core.c |  3 +++
 drivers/mmc/host/tmio_mmc.h          |  2 ++
 drivers/mmc/host/tmio_mmc_core.c     | 15 +++++++++++++++
 drivers/mmc/host/uniphier-sd.c       |  1 +
 include/linux/mfd/tmio.h             |  7 ++++++-
 5 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 751e21243ebf..980c50b9226e 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -1046,6 +1046,9 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 	/* All SDHI have SDIO status bits which must be 1 */
 	mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;
 
+	/* All SDHI support HW busy detection */
+	mmc_data->flags |= TMIO_MMC_USE_BUSY_TIMEOUT;
+
 	dev_pm_domain_start(&pdev->dev);
 
 	ret = renesas_sdhi_clk_enable(host);
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 7ff41185896a..819198af17f4 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -80,6 +80,8 @@
 #define	CLK_CTL_SCLKEN		BIT(8)
 
 /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
+#define CARD_OPT_TOP_MASK	0xf0
+#define CARD_OPT_TOP_SHIFT	4
 #define CARD_OPT_WIDTH8		BIT(13)
 #define CARD_OPT_WIDTH		BIT(15)
 
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index ac4e7874a3f1..a896595cf575 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -885,6 +885,18 @@ static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
 	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
 }
 
+static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
+{
+	u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
+	unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
+	unsigned int cycles;
+
+	val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
+	cycles = 1 << (13 + val);
+
+	host->mmc->max_busy_timeout = cycles / (clk_rate / MSEC_PER_SEC);
+}
+
 /* Set MMC clock / power.
  * Note: This controller uses a simple divider scheme therefore it cannot
  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
@@ -943,6 +955,9 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 		break;
 	}
 
+	if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
+		tmio_mmc_max_busy_timeout(host);
+
 	/* Let things settle. delay taken from winCE driver */
 	usleep_range(140, 200);
 	if (PTR_ERR(host->mrq) == -EINTR)
diff --git a/drivers/mmc/host/uniphier-sd.c b/drivers/mmc/host/uniphier-sd.c
index 196e94bf37f0..73d5bebd0f33 100644
--- a/drivers/mmc/host/uniphier-sd.c
+++ b/drivers/mmc/host/uniphier-sd.c
@@ -586,6 +586,7 @@ static int uniphier_sd_probe(struct platform_device *pdev)
 
 	tmio_data = &priv->tmio_data;
 	tmio_data->flags |= TMIO_MMC_32BIT_DATA_PORT;
+	tmio_data->flags |= TMIO_MMC_USE_BUSY_TIMEOUT;
 
 	host = tmio_mmc_host_alloc(pdev, tmio_data);
 	if (IS_ERR(host))
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 8ba042430d8e..27264fe4b3b9 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -55,7 +55,12 @@
  */
 #define TMIO_MMC_HAS_IDLE_WAIT		BIT(4)
 
-/* BIT(5) is unused */
+/*
+ * Use the busy timeout feature. Probably all TMIO versions support it. Yet,
+ * we don't have documentation for old variants, so we enable only known good
+ * variants with this flag. Can be removed once all variants are known good.
+ */
+#define TMIO_MMC_USE_BUSY_TIMEOUT	BIT(5)
 
 /*
  * Some controllers have CMD12 automatically
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 11/39] mmc: tmio: add hook for custom busy_wait calculation
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 10/39] mmc: tmio: set max_busy_timeout Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 12/39] mmc: renesas_sdhi: populate hook for longer busy_wait Lad Prabhakar
                   ` (27 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 58959f89dd3d8cc8bedcd2d665496603098b29a2 upstream.

Newer SDHI variants can 'wait while busy' longer than the generic TMIO.
Provide a hook to get the maximum cycle count to wait for. If the hook
is not populated, fall back to a generic version which works well with
all older TMIO/SDHI variants.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201125213001.15003-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/tmio_mmc.h      |  1 +
 drivers/mmc/host/tmio_mmc_core.c | 17 ++++++++++++-----
 2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 819198af17f4..f60559bc413a 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -181,6 +181,7 @@ struct tmio_mmc_host {
 	void (*reset)(struct tmio_mmc_host *host);
 	bool (*check_retune)(struct tmio_mmc_host *host);
 	void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
+	unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host);
 
 	void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
 	void (*hs400_downgrade)(struct tmio_mmc_host *host);
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index a896595cf575..85dc5b9f4e60 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -885,16 +885,20 @@ static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
 	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
 }
 
-static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
+static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
 {
 	u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
-	unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
-	unsigned int cycles;
 
 	val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
-	cycles = 1 << (13 + val);
+	return 1 << (13 + val);
+}
+
+static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
+{
+	unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
 
-	host->mmc->max_busy_timeout = cycles / (clk_rate / MSEC_PER_SEC);
+	host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
+				      (clk_rate / MSEC_PER_SEC);
 }
 
 /* Set MMC clock / power.
@@ -1114,6 +1118,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
 	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
 		_host->write16_hook = NULL;
 
+	if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
+		_host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
+
 	_host->set_pwr = pdata->set_pwr;
 
 	ret = tmio_mmc_init_ocr(_host);
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 12/39] mmc: renesas_sdhi: populate hook for longer busy_wait
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 10/39] mmc: tmio: set max_busy_timeout Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 11/39] mmc: tmio: add hook for custom busy_wait calculation Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support Lad Prabhakar
                   ` (26 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit b191deced78a12e26a827db03745b0da6cbc4f0e upstream.

Make use of the EXTOP bit in R-Car Gen3 SoCs to have a twice as large
busy wait duration.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201125213001.15003-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/renesas_sdhi_core.c | 20 ++++++++++++++++++++
 drivers/mmc/host/tmio_mmc.h          |  2 ++
 2 files changed, 22 insertions(+)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 980c50b9226e..8306a5b5b06e 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -561,6 +561,7 @@ static int renesas_sdhi_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_io
 static void renesas_sdhi_reset(struct tmio_mmc_host *host)
 {
 	struct renesas_sdhi *priv = host_to_priv(host);
+	u16 val;
 
 	if (priv->scc_ctl) {
 		renesas_sdhi_disable_scc(host->mmc);
@@ -573,6 +574,21 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
 	}
 
 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_INIT_RCAR2);
+
+	if (sd_ctrl_read16(host, CTL_VERSION) >= SDHI_VER_GEN3_SD) {
+		val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
+		val |= CARD_OPT_EXTOP;
+		sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, val);
+	}
+}
+
+static unsigned int renesas_sdhi_gen3_get_cycles(struct tmio_mmc_host *host)
+{
+	u16 num, val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
+
+	num = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
+	return 1 << ((val & CARD_OPT_EXTOP ? 14 : 13) + num);
+
 }
 
 #define SH_MOBILE_SDHI_MIN_TAP_ROW 3
@@ -1072,6 +1088,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 			quirks->hs400_calib_table + 1);
 	}
 
+	/* these have an EXTOP bit */
+	if (ver >= SDHI_VER_GEN3_SD)
+		host->get_timeout_cycles = renesas_sdhi_gen3_get_cycles;
+
 	/* Enable tuning iff we have an SCC and a supported mode */
 	if (of_data && of_data->scc_offset &&
 	    (host->mmc->caps & MMC_CAP_UHS_SDR104 ||
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index f60559bc413a..784fa6ed5843 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -82,7 +82,9 @@
 /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
 #define CARD_OPT_TOP_MASK	0xf0
 #define CARD_OPT_TOP_SHIFT	4
+#define CARD_OPT_EXTOP		BIT(9) /* first appeared on R-Car Gen3 SDHI */
 #define CARD_OPT_WIDTH8		BIT(13)
+#define CARD_OPT_ALWAYS1	BIT(14)
 #define CARD_OPT_WIDTH		BIT(15)
 
 /* Definitions for values the CTL_SDIO_STATUS register can take */
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (2 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 12/39] mmc: renesas_sdhi: populate hook for longer busy_wait Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-31 10:16   ` Pavel Machek
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 14/39] mmc: tmio: Add data timeout error detection Lad Prabhakar
                   ` (25 subsequent siblings)
  29 siblings, 1 reply; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

commit 69e7d76afdb54243df957351804c0f1afca46d0f upstream.

Add pre_req and post_req support to improve performance.

Inspired by a patch in the BSP by Masaharu Hayakawa.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1608114572-1892-3-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 91 +++++++++++++++++--
 1 file changed, 83 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
index f3e76d6b3e3f..ff97f15e317c 100644
--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
@@ -56,6 +56,12 @@
 #define INFO2_DTRANERR1		BIT(17)
 #define INFO2_DTRANERR0		BIT(16)
 
+enum renesas_sdhi_dma_cookie {
+	COOKIE_UNMAPPED,
+	COOKIE_PRE_MAPPED,
+	COOKIE_MAPPED,
+};
+
 /*
  * Specification of this driver:
  * - host->chan_{rx,tx} will be used as a flag of enabling/disabling the dma
@@ -172,6 +178,50 @@ renesas_sdhi_internal_dmac_dataend_dma(struct tmio_mmc_host *host) {
 	tasklet_schedule(&priv->dma_priv.dma_complete);
 }
 
+/*
+ * renesas_sdhi_internal_dmac_map() will be called with two difference
+ * sg pointers in two mmc_data by .pre_req(), but tmio host can have a single
+ * sg_ptr only. So, renesas_sdhi_internal_dmac_{un}map() should use a sg
+ * pointer in a mmc_data instead of host->sg_ptr.
+ */
+static void
+renesas_sdhi_internal_dmac_unmap(struct tmio_mmc_host *host,
+				 struct mmc_data *data,
+				 enum renesas_sdhi_dma_cookie cookie)
+{
+	bool unmap = cookie == COOKIE_UNMAPPED ? (data->host_cookie != cookie) :
+						 (data->host_cookie == cookie);
+
+	if (unmap) {
+		dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
+			     mmc_get_dma_dir(data));
+		data->host_cookie = COOKIE_UNMAPPED;
+	}
+}
+
+static bool
+renesas_sdhi_internal_dmac_map(struct tmio_mmc_host *host,
+			       struct mmc_data *data,
+			       enum renesas_sdhi_dma_cookie cookie)
+{
+	if (data->host_cookie == COOKIE_PRE_MAPPED)
+		return true;
+
+	if (!dma_map_sg(&host->pdev->dev, data->sg, data->sg_len,
+			    mmc_get_dma_dir(data)))
+		return false;
+
+	data->host_cookie = cookie;
+
+	/* This DMAC cannot handle if buffer is not 128-bytes alignment */
+	if (!IS_ALIGNED(sg_dma_address(data->sg), 128)) {
+		renesas_sdhi_internal_dmac_unmap(host, data, cookie);
+		return false;
+	}
+
+	return true;
+}
+
 static void
 renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host,
 				     struct mmc_data *data)
@@ -182,14 +232,9 @@ renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host,
 	if (!test_bit(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY, &global_flags))
 		dtran_mode |= DTRAN_MODE_ADDR_MODE;
 
-	if (!dma_map_sg(&host->pdev->dev, sg, host->sg_len,
-			mmc_get_dma_dir(data)))
+	if (!renesas_sdhi_internal_dmac_map(host, data, COOKIE_MAPPED))
 		goto force_pio;
 
-	/* This DMAC cannot handle if buffer is not 128-bytes alignment */
-	if (!IS_ALIGNED(sg_dma_address(sg), 128))
-		goto force_pio_with_unmap;
-
 	if (data->flags & MMC_DATA_READ) {
 		dtran_mode |= DTRAN_MODE_CH_NUM_CH1;
 		if (test_bit(SDHI_INTERNAL_DMAC_ONE_RX_ONLY, &global_flags) &&
@@ -212,7 +257,7 @@ renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host,
 	return;
 
 force_pio_with_unmap:
-	dma_unmap_sg(&host->pdev->dev, sg, host->sg_len, mmc_get_dma_dir(data));
+	renesas_sdhi_internal_dmac_unmap(host, data, COOKIE_UNMAPPED);
 
 force_pio:
 	renesas_sdhi_internal_dmac_enable_dma(host, false);
@@ -245,7 +290,7 @@ static bool renesas_sdhi_internal_dmac_complete(struct tmio_mmc_host *host)
 		dir = DMA_TO_DEVICE;
 
 	renesas_sdhi_internal_dmac_enable_dma(host, false);
-	dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->sg_len, dir);
+	renesas_sdhi_internal_dmac_unmap(host, host->data, COOKIE_MAPPED);
 
 	if (dir == DMA_FROM_DEVICE)
 		clear_bit(SDHI_INTERNAL_DMAC_RX_IN_USE, &global_flags);
@@ -274,6 +319,32 @@ static void renesas_sdhi_internal_dmac_end_dma(struct tmio_mmc_host *host)
 		renesas_sdhi_internal_dmac_complete(host);
 }
 
+static void renesas_sdhi_internal_dmac_post_req(struct mmc_host *mmc,
+						struct mmc_request *mrq,
+						int err)
+{
+	struct tmio_mmc_host *host = mmc_priv(mmc);
+	struct mmc_data *data = mrq->data;
+
+	if (!data)
+		return;
+
+	renesas_sdhi_internal_dmac_unmap(host, data, COOKIE_UNMAPPED);
+}
+
+static void renesas_sdhi_internal_dmac_pre_req(struct mmc_host *mmc,
+					       struct mmc_request *mrq)
+{
+	struct tmio_mmc_host *host = mmc_priv(mmc);
+	struct mmc_data *data = mrq->data;
+
+	if (!data)
+		return;
+
+	data->host_cookie = COOKIE_UNMAPPED;
+	renesas_sdhi_internal_dmac_map(host, data, COOKIE_PRE_MAPPED);
+}
+
 static void
 renesas_sdhi_internal_dmac_request_dma(struct tmio_mmc_host *host,
 				       struct tmio_mmc_data *pdata)
@@ -295,6 +366,10 @@ renesas_sdhi_internal_dmac_request_dma(struct tmio_mmc_host *host,
 	tasklet_init(&host->dma_issue,
 		     renesas_sdhi_internal_dmac_issue_tasklet_fn,
 		     (unsigned long)host);
+
+	/* Add pre_req and post_req */
+	host->ops.pre_req = renesas_sdhi_internal_dmac_pre_req;
+	host->ops.post_req = renesas_sdhi_internal_dmac_post_req;
 }
 
 static void
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 14/39] mmc: tmio: Add data timeout error detection
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (3 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune Lad Prabhakar
                   ` (24 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>

commit 35cdcd1268f654f55e2308767349c44bd25d8009 upstream.

Currently, busy timeout is not checked for data transfer command. But,
if the temperature condition changes, the data cannot be acquired
correctly and timeout may occur. Also, we could reproduce an issue by
using mmc_test driver (e.g. "Correct xfer_size at write (start
failure)"). Therefore, this adds timeout error check.

Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com>
[saito: rework commit message.]
Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[shimoda: rebase, add commit description]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1608708622-29668-2-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/tmio_mmc_core.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index 85dc5b9f4e60..e694d98faed1 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -477,8 +477,10 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
 	if (!data)
 		goto out;
 
-	if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
-	    stat & TMIO_STAT_TXUNDERRUN)
+	if (stat & TMIO_STAT_DATATIMEOUT)
+		data->error = -ETIMEDOUT;
+	else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
+		 stat & TMIO_STAT_TXUNDERRUN)
 		data->error = -EILSEQ;
 	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
 		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (4 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 14/39] mmc: tmio: Add data timeout error detection Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-31 10:18   ` Pavel Machek
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 16/39] mmc: tmio: support custom irq masks Lad Prabhakar
                   ` (23 subsequent siblings)
  29 siblings, 1 reply; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

commit ed2fab9a8229cc70fe03032e48d0ec375df6013e upstream.

According to the datasheet, this controller needs retune when
cmd or data timeout happens. So, add a condition into .check_retune().

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1608708622-29668-3-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/renesas_sdhi_core.c | 16 +++++++++++++---
 drivers/mmc/host/tmio_mmc.h          |  2 +-
 drivers/mmc/host/tmio_mmc_core.c     |  2 +-
 3 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 8306a5b5b06e..622e293420f6 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -773,10 +773,12 @@ static bool renesas_sdhi_auto_correction(struct tmio_mmc_host *host)
 	return false;
 }
 
-static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host)
+static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host,
+					 struct mmc_request *mrq)
 {
 	struct renesas_sdhi *priv = host_to_priv(host);
 	bool use_4tap = priv->quirks && priv->quirks->hs400_4taps;
+	bool ret = false;
 
 	/*
 	 * Skip checking SCC errors when running on 4 taps in HS400 mode as
@@ -790,11 +792,19 @@ static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host)
 	if (mmc_doing_tune(host->mmc))
 		return false;
 
+	if (((mrq->cmd->error == -ETIMEDOUT) ||
+	     (mrq->data && mrq->data->error == -ETIMEDOUT)) &&
+	    ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
+	     (host->ops.get_cd && host->ops.get_cd(host->mmc))))
+		ret |= true;
+
 	if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) &
 	    SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN)
-		return renesas_sdhi_auto_correction(host);
+		ret |= renesas_sdhi_auto_correction(host);
+	else
+		ret |= renesas_sdhi_manual_correction(host, use_4tap);
 
-	return renesas_sdhi_manual_correction(host, use_4tap);
+	return ret;
 }
 
 static int renesas_sdhi_wait_idle(struct tmio_mmc_host *host, u32 bit)
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 784fa6ed5843..2d1db9396d4a 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -181,7 +181,7 @@ struct tmio_mmc_host {
 			      unsigned int direction, int blk_size);
 	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
 	void (*reset)(struct tmio_mmc_host *host);
-	bool (*check_retune)(struct tmio_mmc_host *host);
+	bool (*check_retune)(struct tmio_mmc_host *host, struct mmc_request *mrq);
 	void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
 	unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host);
 
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index e694d98faed1..92d1ed07cebe 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -802,7 +802,7 @@ static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
 		tmio_mmc_abort_dma(host);
 
 	/* Error means retune, but executed command was still successful */
-	if (host->check_retune && host->check_retune(host))
+	if (host->check_retune && host->check_retune(host, mrq))
 		mmc_retune_needed(host->mmc);
 
 	/* If SET_BLOCK_COUNT, continue with main command */
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 16/39] mmc: tmio: support custom irq masks
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (5 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 17/39] mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL Lad Prabhakar
                   ` (22 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 0d856c4c68c639f96cb12c26aaeb906353b9a76e upstream.

SDHI Gen2+ has a different value for TMIO_MASK_ALL, so add a member to
support that. If the member is not used, the previous default value is
applied.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210223100830.25125-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/tmio_mmc.h      | 1 +
 drivers/mmc/host/tmio_mmc_core.c | 8 +++++---
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 2d1db9396d4a..7d5201d6a006 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -164,6 +164,7 @@ struct tmio_mmc_host {
 	u32			sdio_irq_mask;
 	unsigned int		clk_cache;
 	u32			sdcard_irq_setbit_mask;
+	u32			sdcard_irq_mask_all;
 
 	spinlock_t		lock;		/* protect host private data */
 	unsigned long		last_req_ts;
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index 92d1ed07cebe..48083acdb077 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -1182,7 +1182,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
 	tmio_mmc_reset(_host);
 
 	_host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
-	tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
+	if (!_host->sdcard_irq_mask_all)
+		_host->sdcard_irq_mask_all = TMIO_MASK_ALL;
+	tmio_mmc_disable_mmc_irqs(_host, _host->sdcard_irq_mask_all);
 
 	if (_host->native_hotplug)
 		tmio_mmc_enable_mmc_irqs(_host,
@@ -1236,7 +1238,7 @@ void tmio_mmc_host_remove(struct tmio_mmc_host *host)
 	cancel_work_sync(&host->done);
 	cancel_delayed_work_sync(&host->delayed_reset_work);
 	tmio_mmc_release_dma(host);
-	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
+	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
 
 	if (host->native_hotplug)
 		pm_runtime_put_noidle(&pdev->dev);
@@ -1266,7 +1268,7 @@ int tmio_mmc_host_runtime_suspend(struct device *dev)
 {
 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
 
-	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
+	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
 
 	if (host->clk_cache)
 		host->set_clock(host, 0);
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 17/39] mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (6 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 16/39] mmc: tmio: support custom irq masks Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 19/39] mmc: tmio: restore bus width when resetting Lad Prabhakar
                   ` (21 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 9f12cac1bb88e3296990e760d867a98308d6b0ac upstream.

Populate the new member for custom mask values to make sure this value
is applied whenever needed. Also, rename the define holding the value
because this is not only about initialization anymore.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210304092903.8534-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/renesas_sdhi_core.c | 3 ++-
 drivers/mmc/host/tmio_mmc.h          | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 622e293420f6..bee27e2fe446 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -573,7 +573,7 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
 			       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
 	}
 
-	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_INIT_RCAR2);
+	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_ALL_RCAR2);
 
 	if (sd_ctrl_read16(host, CTL_VERSION) >= SDHI_VER_GEN3_SD) {
 		val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
@@ -1039,6 +1039,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 		host->ops.start_signal_voltage_switch =
 			renesas_sdhi_start_signal_voltage_switch;
 		host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27;
+		host->sdcard_irq_mask_all = TMIO_MASK_ALL_RCAR2;
 		host->reset = renesas_sdhi_reset;
 	}
 
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 7d5201d6a006..f936aad945ce 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -100,8 +100,8 @@
 
 /* Define some IRQ masks */
 /* This is the mask used at reset by the chip */
-#define TMIO_MASK_INIT_RCAR2	0x8b7f031d /* Initial value for R-Car Gen2+ */
 #define TMIO_MASK_ALL           0x837f031d
+#define TMIO_MASK_ALL_RCAR2	0x8b7f031d
 #define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
 #define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 19/39] mmc: tmio: restore bus width when resetting
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (7 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 17/39] mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 20/39] mmc: renesas_sdhi: break SCC reset into own function Lad Prabhakar
                   ` (20 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Takeshi Saito <takeshi.saito.xv@renesas.com>

commit 0a446288aa9f28ab00a31b8b51fdb005953f9f99 upstream.

Resetting the IP core will lose the bus width information and not all
code paths recover it. So, make sure the latest bus width gets restored
in the reset routine. For that, tmio_mmc_set_bus_width() is moved, but
not modified.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: reworded commit message]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210316085717.7276-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/tmio_mmc_core.c | 32 +++++++++++++++++---------------
 1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index 0c752b4348de..ee9dc175e444 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -164,6 +164,21 @@ static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 	}
 }
 
+static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
+				   unsigned char bus_width)
+{
+	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
+				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
+
+	/* reg now applies to MMC_BUS_WIDTH_4 */
+	if (bus_width == MMC_BUS_WIDTH_1)
+		reg |= CARD_OPT_WIDTH;
+	else if (bus_width == MMC_BUS_WIDTH_8)
+		reg |= CARD_OPT_WIDTH8;
+
+	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
+}
+
 static void tmio_mmc_reset(struct tmio_mmc_host *host)
 {
 	/* FIXME - should we set stop clock reg here */
@@ -177,6 +192,8 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
 	if (host->reset)
 		host->reset(host);
 
+	tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
+
 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
@@ -872,21 +889,6 @@ static void tmio_mmc_power_off(struct tmio_mmc_host *host)
 		host->set_pwr(host->pdev, 0);
 }
 
-static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
-				   unsigned char bus_width)
-{
-	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
-				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
-
-	/* reg now applies to MMC_BUS_WIDTH_4 */
-	if (bus_width == MMC_BUS_WIDTH_1)
-		reg |= CARD_OPT_WIDTH;
-	else if (bus_width == MMC_BUS_WIDTH_8)
-		reg |= CARD_OPT_WIDTH8;
-
-	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
-}
-
 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
 {
 	u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 20/39] mmc: renesas_sdhi: break SCC reset into own function
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (8 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 19/39] mmc: tmio: restore bus width when resetting Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible Lad Prabhakar
                   ` (19 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 0e5870145840e91fc33cd4eca6e228b009d86705 upstream.

renesas_sdhi_reset used to mainly reset the SCC but is now doing more
and even more will be added. So, factor out SCC reset to have a clear
distinction when we want to reset either SCC or SDHI+SCC.

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210317091622.31890-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/renesas_sdhi_core.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index bee27e2fe446..eaf6071ab3cc 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -557,21 +557,25 @@ static int renesas_sdhi_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_io
 	return 0;
 }
 
+static void renesas_sdhi_scc_reset(struct tmio_mmc_host *host, struct renesas_sdhi *priv)
+{
+	renesas_sdhi_disable_scc(host->mmc);
+	renesas_sdhi_reset_hs400_mode(host, priv);
+	priv->needs_adjust_hs400 = false;
+
+	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
+		       ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
+		       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
+}
+
 /* only populated for TMIO_MMC_MIN_RCAR2 */
 static void renesas_sdhi_reset(struct tmio_mmc_host *host)
 {
 	struct renesas_sdhi *priv = host_to_priv(host);
 	u16 val;
 
-	if (priv->scc_ctl) {
-		renesas_sdhi_disable_scc(host->mmc);
-		renesas_sdhi_reset_hs400_mode(host, priv);
-		priv->needs_adjust_hs400 = false;
-
-		sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL,
-			       ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN &
-			       sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL));
-	}
+	if (priv->scc_ctl)
+		renesas_sdhi_scc_reset(host, priv);
 
 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_ALL_RCAR2);
 
@@ -696,7 +700,7 @@ static int renesas_sdhi_execute_tuning(struct mmc_host *mmc, u32 opcode)
 
 	ret = renesas_sdhi_select_tuning(host);
 	if (ret < 0)
-		renesas_sdhi_reset(host);
+		renesas_sdhi_scc_reset(host, priv);
 	return ret;
 }
 
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (9 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 20/39] mmc: renesas_sdhi: break SCC reset into own function Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-31 10:20   ` Pavel Machek
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 22/39] mmc: tmio: always flag retune when resetting and a card is present Lad Prabhakar
                   ` (18 subsequent siblings)
  29 siblings, 1 reply; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream.

All recent SDHI instances can be reset via the reset controller. If one
is found, use it instead of the open coded reset. This is to get a
future-proof sane reset state.

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210317091622.31890-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/Kconfig             |  1 +
 drivers/mmc/host/renesas_sdhi.h      |  2 ++
 drivers/mmc/host/renesas_sdhi_core.c | 17 ++++++++++++++++-
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 30ff42fd173e..3538f9e9bce9 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -711,6 +711,7 @@ config MMC_SDHI
 	tristate "Renesas SDHI SD/SDIO controller support"
 	depends on SUPERH || ARCH_RENESAS || COMPILE_TEST
 	select MMC_TMIO_CORE
+	select RESET_CONTROLLER if ARCH_RENESAS
 	help
 	  This provides support for the SDHI SD/SDIO controller found in
 	  Renesas SuperH, ARM and ARM64 based SoCs
diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
index cb962c7883dc..53eded81a53e 100644
--- a/drivers/mmc/host/renesas_sdhi.h
+++ b/drivers/mmc/host/renesas_sdhi.h
@@ -70,6 +70,8 @@ struct renesas_sdhi {
 	DECLARE_BITMAP(smpcmp, BITS_PER_LONG);
 	unsigned int tap_num;
 	unsigned int tap_set;
+
+	struct reset_control *rstc;
 };
 
 #define host_to_priv(host) \
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index eaf6071ab3cc..1783a0a6ee56 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -20,6 +20,7 @@
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/iopoll.h>
 #include <linux/kernel.h>
 #include <linux/mfd/tmio.h>
 #include <linux/mmc/host.h>
@@ -32,6 +33,7 @@
 #include <linux/platform_device.h>
 #include <linux/pm_domain.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 #include <linux/sh_dma.h>
 #include <linux/slab.h>
 #include <linux/sys_soc.h>
@@ -572,10 +574,19 @@ static void renesas_sdhi_scc_reset(struct tmio_mmc_host *host, struct renesas_sd
 static void renesas_sdhi_reset(struct tmio_mmc_host *host)
 {
 	struct renesas_sdhi *priv = host_to_priv(host);
+	int ret;
 	u16 val;
 
-	if (priv->scc_ctl)
+	if (priv->rstc) {
+		reset_control_reset(priv->rstc);
+		/* Unknown why but without polling reset status, it will hang */
+		read_poll_timeout(reset_control_status, ret, ret == 0, 1, 100,
+				  false, priv->rstc);
+		priv->needs_adjust_hs400 = false;
+		renesas_sdhi_set_clock(host, host->clk_cache);
+	} else if (priv->scc_ctl) {
 		renesas_sdhi_scc_reset(host, priv);
+	}
 
 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_ALL_RCAR2);
 
@@ -1086,6 +1097,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
 	if (ret)
 		goto efree;
 
+	priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
+	if (IS_ERR(priv->rstc))
+		return PTR_ERR(priv->rstc);
+
 	ver = sd_ctrl_read16(host, CTL_VERSION);
 	/* GEN2_SDR104 is first known SDHI to use 32bit block count */
 	if (ver < SDHI_VER_GEN2_SDR104 && mmc_data->max_blk_count > U16_MAX)
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 22/39] mmc: tmio: always flag retune when resetting and a card is present
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (10 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 24/39] mmc: tmio: reenable card irqs after the reset callback Lad Prabhakar
                   ` (17 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 6e5c951b4c3a0bd9aa5838ecec98f3c795c83ff1 upstream.

After reset, we manually flagged retune in runtime resume, but missed it
in the workqueue. To fix that and avoid the problem in the future, let's
flag retune in the reset handler directly whenever a card is present.

Reported-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210316085717.7276-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/tmio_mmc_core.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index ee9dc175e444..59372de733b2 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -198,6 +198,9 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
 	}
+
+	if (host->mmc->card)
+		mmc_retune_needed(host->mmc);
 }
 
 static void tmio_mmc_reset_work(struct work_struct *work)
@@ -1297,8 +1300,6 @@ int tmio_mmc_host_runtime_resume(struct device *dev)
 
 	tmio_mmc_enable_dma(host, true);
 
-	mmc_retune_needed(host->mmc);
-
 	return 0;
 }
 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 24/39] mmc: tmio: reenable card irqs after the reset callback
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (11 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 22/39] mmc: tmio: always flag retune when resetting and a card is present Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 25/39] mmc: tmio: reinit card irqs in reset routine Lad Prabhakar
                   ` (16 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 90935eb303e0d12f3d3d0383262e65290321f5f6 upstream.

The reset callback may clear the internal card detect interrupts, so
make sure to reenable them if needed.

Fixes: b4d86f37eacb ("mmc: renesas_sdhi: do hard reset if possible")
Reported-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20211028195149.8003-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/tmio_mmc_core.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index bb5eb478b6cf..690094b0b6a8 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -195,6 +195,10 @@ static void tmio_mmc_reset(struct tmio_mmc_host *host)
 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
 	host->sdcard_irq_mask = host->sdcard_irq_mask_all;
 
+	if (host->native_hotplug)
+		tmio_mmc_enable_mmc_irqs(host,
+				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
+
 	tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
 
 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
@@ -954,8 +958,15 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 	case MMC_POWER_OFF:
 		tmio_mmc_power_off(host);
 		/* For R-Car Gen2+, we need to reset SDHI specific SCC */
-		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
+		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) {
 			host->reset(host);
+
+			if (host->native_hotplug)
+				tmio_mmc_enable_mmc_irqs(host,
+						TMIO_STAT_CARD_REMOVE |
+						TMIO_STAT_CARD_INSERT);
+		}
+
 		host->set_clock(host, 0);
 		break;
 	case MMC_POWER_UP:
@@ -1192,10 +1203,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
 	_host->set_clock(_host, 0);
 	tmio_mmc_reset(_host);
 
-	if (_host->native_hotplug)
-		tmio_mmc_enable_mmc_irqs(_host,
-				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
-
 	spin_lock_init(&_host->lock);
 	mutex_init(&_host->ios_lock);
 
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 25/39] mmc: tmio: reinit card irqs in reset routine
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (12 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 24/39] mmc: tmio: reenable card irqs after the reset callback Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 28/39] clk: renesas: rzg2l: Check return value of pm_genpd_init() Lad Prabhakar
                   ` (15 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit e315b1f3a170f368da5618f8a598e68880302ed1 upstream.

Refactor the code so that card detect irqs are always reenabled after a
reset. This avoids doing it manually all over the code or forgetting to
do this in the future.

Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
[wsa: added a comment when 'native_hotplug' has to be set]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211103122646.64422-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/mmc/host/tmio_mmc_core.c | 15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index 690094b0b6a8..79f237d754bd 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -958,14 +958,8 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 	case MMC_POWER_OFF:
 		tmio_mmc_power_off(host);
 		/* For R-Car Gen2+, we need to reset SDHI specific SCC */
-		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) {
-			host->reset(host);
-
-			if (host->native_hotplug)
-				tmio_mmc_enable_mmc_irqs(host,
-						TMIO_STAT_CARD_REMOVE |
-						TMIO_STAT_CARD_INSERT);
-		}
+		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
+			tmio_mmc_reset(host);
 
 		host->set_clock(host, 0);
 		break;
@@ -1173,6 +1167,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
 	if (mmc_can_gpio_cd(mmc))
 		_host->ops.get_cd = mmc_gpio_get_cd;
 
+	/* must be set before tmio_mmc_reset() */
 	_host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
 				  !mmc_card_is_removable(mmc));
@@ -1302,10 +1297,6 @@ int tmio_mmc_host_runtime_resume(struct device *dev)
 	if (host->clk_cache)
 		host->set_clock(host, host->clk_cache);
 
-	if (host->native_hotplug)
-		tmio_mmc_enable_mmc_irqs(host,
-				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
-
 	tmio_mmc_enable_dma(host, true);
 
 	return 0;
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 28/39] clk: renesas: rzg2l: Check return value of pm_genpd_init()
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (13 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 25/39] mmc: tmio: reinit card irqs in reset routine Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 29/39] clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple() Lad Prabhakar
                   ` (14 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

commit 27527a3d3b162e4512798c058c0e8a216c721187 upstream.

Make sure we check the return value of pm_genpd_init() which might fail.
Also add a devres action to remove the power-domain in-case the probe
callback fails further down in the code flow.

Fixes: ef3c613ccd68a ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117115101.28281-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/clk/renesas/rzg2l-cpg.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index a77cb47b75e7..1b1555deb20b 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -851,10 +851,16 @@ static void rzg2l_cpg_detach_dev(struct generic_pm_domain *unused, struct device
 		pm_clk_destroy(dev);
 }
 
+static void rzg2l_cpg_genpd_remove(void *data)
+{
+	pm_genpd_remove(data);
+}
+
 static int __init rzg2l_cpg_add_clk_domain(struct device *dev)
 {
 	struct device_node *np = dev->of_node;
 	struct generic_pm_domain *genpd;
+	int ret;
 
 	genpd = devm_kzalloc(dev, sizeof(*genpd), GFP_KERNEL);
 	if (!genpd)
@@ -865,7 +871,13 @@ static int __init rzg2l_cpg_add_clk_domain(struct device *dev)
 		       GENPD_FLAG_ACTIVE_WAKEUP;
 	genpd->attach_dev = rzg2l_cpg_attach_dev;
 	genpd->detach_dev = rzg2l_cpg_detach_dev;
-	pm_genpd_init(genpd, &pm_domain_always_on_gov, false);
+	ret = pm_genpd_init(genpd, &pm_domain_always_on_gov, false);
+	if (ret)
+		return ret;
+
+	ret = devm_add_action_or_reset(dev, rzg2l_cpg_genpd_remove, genpd);
+	if (ret)
+		return ret;
 
 	of_genpd_add_provider_simple(np, genpd);
 	return 0;
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 29/39] clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (14 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 28/39] clk: renesas: rzg2l: Check return value of pm_genpd_init() Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 30/39] clk: renesas: r9a07g044: Add SDHI clock and reset entries Lad Prabhakar
                   ` (13 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

commit 33748744f15a110a233b6ae0380f476006e770f0  upstream.

of_genpd_add_provider_simple() might fail, this patch makes sure we check
the return value of of_genpd_add_provider_simple() by propagating the
return value to the caller of rzg2l_cpg_add_clk_domain().

Fixes: ef3c613ccd68a ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117115101.28281-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/clk/renesas/rzg2l-cpg.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 1b1555deb20b..edd0abe34a37 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -879,8 +879,7 @@ static int __init rzg2l_cpg_add_clk_domain(struct device *dev)
 	if (ret)
 		return ret;
 
-	of_genpd_add_provider_simple(np, genpd);
-	return 0;
+	return of_genpd_add_provider_simple(np, genpd);
 }
 
 static int __init rzg2l_cpg_probe(struct platform_device *pdev)
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 30/39] clk: renesas: r9a07g044: Add SDHI clock and reset entries
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (15 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 29/39] clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple() Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 31/39] dt-bindings: Fix errors in 'if' schemas Lad Prabhakar
                   ` (12 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit 373bd6f487562e8727bc842e9983b093d57968cc upstream.

Add SDHI{0,1} mux, clock and reset entries to CPG driver.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211007111434.8665-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/clk/renesas/r9a07g044-cpg.c | 36 +++++++++++++++++++++++++++++
 drivers/clk/renesas/rzg2l-cpg.h     |  4 ++++
 2 files changed, 40 insertions(+)

diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index 6c5204981dfb..463b658a0c54 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -44,6 +44,12 @@ enum clk_ids {
 	CLK_PLL6,
 	CLK_PLL6_250,
 	CLK_P1_DIV2,
+	CLK_PLL2_800,
+	CLK_PLL2_SDHI_533,
+	CLK_PLL2_SDHI_400,
+	CLK_PLL2_SDHI_266,
+	CLK_SD0_DIV4,
+	CLK_SD1_DIV4,
 
 	/* Module Clocks */
 	MOD_CLK_BASE,
@@ -62,6 +68,7 @@ static const struct clk_div_table dtable_1_32[] = {
 /* Mux clock tables */
 static const char * const sel_pll3_3[] = { ".pll3_533", ".pll3_400" };
 static const char * const sel_pll6_2[]	= { ".pll6_250", ".pll5_250" };
+static const char * const sel_shdi[] = { ".clk_533", ".clk_400", ".clk_266" };
 
 static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = {
 	/* External Clock Inputs */
@@ -82,6 +89,11 @@ static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = {
 	DEF_FIXED(".pll6", CLK_PLL6, CLK_EXTAL, 125, 6),
 
 	DEF_FIXED(".pll2_div2", CLK_PLL2_DIV2, CLK_PLL2, 1, 2),
+	DEF_FIXED(".clk_800", CLK_PLL2_800, CLK_PLL2, 1, 2),
+	DEF_FIXED(".clk_533", CLK_PLL2_SDHI_533, CLK_PLL2, 1, 3),
+	DEF_FIXED(".clk_400", CLK_PLL2_SDHI_400, CLK_PLL2_800, 1, 2),
+	DEF_FIXED(".clk_266", CLK_PLL2_SDHI_266, CLK_PLL2_SDHI_533, 1, 2),
+
 	DEF_FIXED(".pll2_div16", CLK_PLL2_DIV16, CLK_PLL2, 1, 16),
 	DEF_FIXED(".pll2_div20", CLK_PLL2_DIV20, CLK_PLL2, 1, 20),
 
@@ -114,6 +126,12 @@ static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = {
 		sel_pll6_2, ARRAY_SIZE(sel_pll6_2), 0, CLK_MUX_HIWORD_MASK),
 	DEF_FIXED("SPI0", R9A07G044_CLK_SPI0, CLK_DIV_PLL3_C, 1, 2),
 	DEF_FIXED("SPI1", R9A07G044_CLK_SPI1, CLK_DIV_PLL3_C, 1, 4),
+	DEF_SD_MUX("SD0", R9A07G044_CLK_SD0, SEL_SDHI0,
+		   sel_shdi, ARRAY_SIZE(sel_shdi)),
+	DEF_SD_MUX("SD1", R9A07G044_CLK_SD1, SEL_SDHI1,
+		   sel_shdi, ARRAY_SIZE(sel_shdi)),
+	DEF_FIXED("SD0_DIV4", CLK_SD0_DIV4, R9A07G044_CLK_SD0, 1, 4),
+	DEF_FIXED("SD1_DIV4", CLK_SD1_DIV4, R9A07G044_CLK_SD1, 1, 4),
 };
 
 static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
@@ -131,6 +149,22 @@ static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
 				0x550, 0),
 	DEF_MOD("spi_clk",	R9A07G044_SPI_CLK, R9A07G044_CLK_SPI0,
 				0x550, 1),
+	DEF_MOD("sdhi0_imclk",	R9A07G044_SDHI0_IMCLK, CLK_SD0_DIV4,
+				0x554, 0),
+	DEF_MOD("sdhi0_imclk2",	R9A07G044_SDHI0_IMCLK2, CLK_SD0_DIV4,
+				0x554, 1),
+	DEF_MOD("sdhi0_clk_hs",	R9A07G044_SDHI0_CLK_HS, R9A07G044_CLK_SD0,
+				0x554, 2),
+	DEF_MOD("sdhi0_aclk",	R9A07G044_SDHI0_ACLK, R9A07G044_CLK_P1,
+				0x554, 3),
+	DEF_MOD("sdhi1_imclk",	R9A07G044_SDHI1_IMCLK, CLK_SD1_DIV4,
+				0x554, 4),
+	DEF_MOD("sdhi1_imclk2",	R9A07G044_SDHI1_IMCLK2, CLK_SD1_DIV4,
+				0x554, 5),
+	DEF_MOD("sdhi1_clk_hs",	R9A07G044_SDHI1_CLK_HS, R9A07G044_CLK_SD1,
+				0x554, 6),
+	DEF_MOD("sdhi1_aclk",	R9A07G044_SDHI1_ACLK, R9A07G044_CLK_P1,
+				0x554, 7),
 	DEF_MOD("ssi0_pclk",	R9A07G044_SSI0_PCLK2, R9A07G044_CLK_P0,
 				0x570, 0),
 	DEF_MOD("ssi0_sfr",	R9A07G044_SSI0_PCLK_SFR, R9A07G044_CLK_P0,
@@ -202,6 +236,8 @@ static struct rzg2l_reset r9a07g044_resets[] = {
 	DEF_RST(R9A07G044_DMAC_ARESETN, 0x82c, 0),
 	DEF_RST(R9A07G044_DMAC_RST_ASYNC, 0x82c, 1),
 	DEF_RST(R9A07G044_SPI_RST, 0x850, 0),
+	DEF_RST(R9A07G044_SDHI0_IXRST, 0x854, 0),
+	DEF_RST(R9A07G044_SDHI1_IXRST, 0x854, 1),
 	DEF_RST(R9A07G044_SSI0_RST_M2_REG, 0x870, 0),
 	DEF_RST(R9A07G044_SSI1_RST_M2_REG, 0x870, 1),
 	DEF_RST(R9A07G044_SSI2_RST_M2_REG, 0x870, 2),
diff --git a/drivers/clk/renesas/rzg2l-cpg.h b/drivers/clk/renesas/rzg2l-cpg.h
index da41bd2a7e74..484c7cee2629 100644
--- a/drivers/clk/renesas/rzg2l-cpg.h
+++ b/drivers/clk/renesas/rzg2l-cpg.h
@@ -11,6 +11,7 @@
 
 #define CPG_PL2_DDIV		(0x204)
 #define CPG_PL3A_DDIV		(0x208)
+#define CPG_PL2SDHI_DSEL	(0x218)
 #define CPG_CLKSTATUS		(0x280)
 #define CPG_PL3_SSEL		(0x408)
 #define CPG_PL6_ETH_SSEL	(0x418)
@@ -39,6 +40,9 @@
 #define SEL_PLL3_3	SEL_PLL_PACK(CPG_PL3_SSEL, 8, 1)
 #define SEL_PLL6_2	SEL_PLL_PACK(CPG_PL6_ETH_SSEL, 0, 1)
 
+#define SEL_SDHI0	DDIV_PACK(CPG_PL2SDHI_DSEL, 0, 2)
+#define SEL_SDHI1	DDIV_PACK(CPG_PL2SDHI_DSEL, 4, 2)
+
 /**
  * Definitions of CPG Core Clocks
  *
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 31/39] dt-bindings: Fix errors in 'if' schemas
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (16 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 30/39] clk: renesas: r9a07g044: Add SDHI clock and reset entries Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 33/39] dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning Lad Prabhakar
                   ` (11 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Rob Herring <robh@kernel.org>

commit 9183908e70e913d2db052588172968da55d82af5 upstream.

Properties in if/then schemas weren't getting checked by the meta-schemas.
Enabling meta-schema checks finds several errors.

The use of an 'items' schema (as opposed to the list form) is wrong in
some cases as it applies to all entries. 'contains' is the correct schema
to use in the case of multiple entries.

Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Eric Anholt <eric@anholt.net>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-crypto@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-leds@vger.kernel.org
Cc: linux-mmc@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210202205544.24812-3-robh@kernel.org
[PL: Only applied changes to renesas,sdhi.yaml]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
index 6bbf29b5c239..6c13703b31db 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -123,7 +123,7 @@ required:
 if:
   properties:
     compatible:
-      items:
+      contains:
         enum:
           - renesas,sdhi-r7s72100
           - renesas,sdhi-r7s9210
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 33/39] dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (17 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 31/39] dt-bindings: Fix errors in 'if' schemas Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 34/39] dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings Lad Prabhakar
                   ` (10 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit 4aba5dc71eae041aa1a9240de10ad2e30e9f32dd upstream.

Fix dtbs-check warning pinctrl-names:0:'default' was expected
for r8a77470-iwg23s-sbc.dts file.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210817090313.31858-2-biju.das.jz@bp.renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../devicetree/bindings/mmc/renesas,sdhi.yaml | 60 ++++++++++++-------
 1 file changed, 37 insertions(+), 23 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
index 21afaf9e7676..16050b29bc89 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -9,9 +9,6 @@ title: Renesas SDHI SD/MMC controller
 maintainers:
   - Wolfram Sang <wsa+renesas@sang-engineering.com>
 
-allOf:
-  - $ref: "mmc-controller.yaml"
-
 properties:
   compatible:
     oneOf:
@@ -103,14 +100,46 @@ properties:
   pinctrl-1:
     maxItems: 1
 
-  pinctrl-names:
-    minItems: 1
-    items:
-      - const: default
-      - const: state_uhs
+  pinctrl-names: true
 
   max-frequency: true
 
+allOf:
+  - $ref: "mmc-controller.yaml"
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: renesas,sdhi-mmc-r8a77470
+    then:
+      properties:
+        pinctrl-names:
+          items:
+            - const: state_uhs
+    else:
+      properties:
+        pinctrl-names:
+          minItems: 1
+          items:
+            - const: default
+            - const: state_uhs
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - renesas,sdhi-r7s72100
+              - renesas,sdhi-r7s9210
+    then:
+      required:
+        - clock-names
+      description:
+        The internal card detection logic that exists in these controllers is
+        sectioned off to be run by a separate second clock source to allow
+        the main core clock to be turned off to save power.
+
 required:
   - compatible
   - reg
@@ -118,21 +147,6 @@ required:
   - clocks
   - power-domains
 
-if:
-  properties:
-    compatible:
-      contains:
-        enum:
-          - renesas,sdhi-r7s72100
-          - renesas,sdhi-r7s9210
-then:
-  required:
-    - clock-names
-  description:
-    The internal card detection logic that exists in these controllers is
-    sectioned off to be run by a separate second clock source to allow
-    the main core clock to be turned off to save power.
-
 unevaluatedProperties: false
 
 examples:
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 34/39] dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (18 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 33/39] dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 35/39] dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock Lad Prabhakar
                   ` (9 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit bfadee4554c3782bfbc5943866bd2ad44d631e50 upstream.

Document RZ/G2L SDHI controller bindings.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210817090313.31858-3-biju.das.jz@bp.renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
[PL: Manually applied the changes]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../devicetree/bindings/mmc/renesas,sdhi.yaml | 71 +++++++++++++------
 1 file changed, 51 insertions(+), 20 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
index 16050b29bc89..77b1bb907497 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -44,18 +44,19 @@ properties:
           - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
       - items:
           - enum:
-              - renesas,sdhi-r8a774a1 # RZ/G2M
-              - renesas,sdhi-r8a774b1 # RZ/G2N
-              - renesas,sdhi-r8a774c0 # RZ/G2E
-              - renesas,sdhi-r8a774e1 # RZ/G2H
-              - renesas,sdhi-r8a7795  # R-Car H3
-              - renesas,sdhi-r8a7796  # R-Car M3-W
-              - renesas,sdhi-r8a77961 # R-Car M3-W+
-              - renesas,sdhi-r8a77965 # R-Car M3-N
-              - renesas,sdhi-r8a77970 # R-Car V3M
-              - renesas,sdhi-r8a77980 # R-Car V3H
-              - renesas,sdhi-r8a77990 # R-Car E3
-              - renesas,sdhi-r8a77995 # R-Car D3
+              - renesas,sdhi-r8a774a1  # RZ/G2M
+              - renesas,sdhi-r8a774b1  # RZ/G2N
+              - renesas,sdhi-r8a774c0  # RZ/G2E
+              - renesas,sdhi-r8a774e1  # RZ/G2H
+              - renesas,sdhi-r8a7795   # R-Car H3
+              - renesas,sdhi-r8a7796   # R-Car M3-W
+              - renesas,sdhi-r8a77961  # R-Car M3-W+
+              - renesas,sdhi-r8a77965  # R-Car M3-N
+              - renesas,sdhi-r8a77970  # R-Car V3M
+              - renesas,sdhi-r8a77980  # R-Car V3H
+              - renesas,sdhi-r8a77990  # R-Car E3
+              - renesas,sdhi-r8a77995  # R-Car D3
+              - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
           - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
 
   reg:
@@ -65,15 +66,9 @@ properties:
     minItems: 1
     maxItems: 3
 
-  clocks:
-    minItems: 1
-    maxItems: 2
+  clocks: true
 
-  clock-names:
-    minItems: 1
-    items:
-      - const: core
-      - const: cd
+  clock-names: true
 
   dmas:
     minItems: 4
@@ -107,6 +102,42 @@ properties:
 allOf:
   - $ref: "mmc-controller.yaml"
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: renesas,sdhi-r9a07g044
+    then:
+      properties:
+        clocks:
+          items:
+            - description: IMCLK, SDHI channel main clock1.
+            - description: IMCLK2, SDHI channel main clock2. When this clock is
+                           turned off, external SD card detection cannot be
+                           detected.
+            - description: CLK_HS, SDHI channel High speed clock which operates
+                           4 times that of SDHI channel main clock1.
+            - description: ACLK, SDHI channel bus clock.
+        clock-names:
+          items:
+            - const: imclk
+            - const: imclk2
+            - const: clk_hs
+            - const: aclk
+      required:
+        - clock-names
+        - resets
+    else:
+      properties:
+        clocks:
+          minItems: 1
+          maxItems: 2
+        clock-names:
+          minItems: 1
+          items:
+            - const: core
+            - const: cd
+
   - if:
       properties:
         compatible:
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 35/39] dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (19 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 34/39] dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 36/39] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks Lad Prabhakar
                   ` (8 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit e051025efac3929ca7e3e2f2c8860d3447366ebc upstream.

This only applies to R-Car Gen2 and later generations, so we need to
distinguish.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211115160600.4455-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../devicetree/bindings/mmc/renesas,sdhi.yaml | 38 ++++++++++++++-----
 1 file changed, 29 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
index 77b1bb907497..c20ee9e5b8e8 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -128,15 +128,35 @@ allOf:
         - clock-names
         - resets
     else:
-      properties:
-        clocks:
-          minItems: 1
-          maxItems: 2
-        clock-names:
-          minItems: 1
-          items:
-            - const: core
-            - const: cd
+      if:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - renesas,rcar-gen2-sdhi
+                - renesas,rcar-gen3-sdhi
+      then:
+        properties:
+          clocks:
+            minItems: 1
+            maxItems: 3
+          clock-names:
+            minItems: 1
+            uniqueItems: true
+            items:
+              - const: core
+              - enum: [ clkh, cd ]
+              - const: cd
+      else:
+        properties:
+          clocks:
+            minItems: 1
+            maxItems: 2
+          clock-names:
+            minItems: 1
+            items:
+              - const: core
+              - const: cd
 
   - if:
       properties:
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 36/39] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (20 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 35/39] dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 37/39] arm64: dts: renesas: r9a07g044: Add SDHI nodes Lad Prabhakar
                   ` (7 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit 217c7d1840b5377543eff84fe28409d0bd4d3433 upstream.

Rename the below RZ/G2L clocks to match with the clock names used in
R-Car Gen2 and later generations.

 imclk->core
 clk_hs->clkh
 imclk2->cd

This changes will avoid using fallback for RZ/G2L high speed clock,
if "clkh" is not used in device tree and also the code changes in
driver related to this clocks.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211122103905.14439-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../devicetree/bindings/mmc/renesas,sdhi.yaml          | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
index c20ee9e5b8e8..3aeff9036628 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -112,17 +112,17 @@ allOf:
         clocks:
           items:
             - description: IMCLK, SDHI channel main clock1.
+            - description: CLK_HS, SDHI channel High speed clock which operates
+                           4 times that of SDHI channel main clock1.
             - description: IMCLK2, SDHI channel main clock2. When this clock is
                            turned off, external SD card detection cannot be
                            detected.
-            - description: CLK_HS, SDHI channel High speed clock which operates
-                           4 times that of SDHI channel main clock1.
             - description: ACLK, SDHI channel bus clock.
         clock-names:
           items:
-            - const: imclk
-            - const: imclk2
-            - const: clk_hs
+            - const: core
+            - const: clkh
+            - const: cd
             - const: aclk
       required:
         - clock-names
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 37/39] arm64: dts: renesas: r9a07g044: Add SDHI nodes
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (21 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 36/39] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 38/39] arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform Lad Prabhakar
                   ` (6 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit a83ad872f4ba6b9fbf81b9f70d6ff6d61d74bf7e upstream.

Add SDHI{0, 1} nodes to RZ/G2L SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20211007155451.10654-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index ebe155ccd721..468a3d8cbd1f 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -460,6 +460,38 @@
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
 		};
 
+		sdhi0: mmc@11c00000  {
+			compatible = "renesas,sdhi-r9a07g044",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0x0 0x11c00000 0 0x10000>;
+			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK>,
+				 <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
+				 <&cpg CPG_MOD R9A07G044_SDHI0_CLK_HS>,
+				 <&cpg CPG_MOD R9A07G044_SDHI0_ACLK>;
+			clock-names = "imclk", "imclk2", "clk_hs", "aclk";
+			resets = <&cpg R9A07G044_SDHI0_IXRST>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		sdhi1: mmc@11c10000 {
+			compatible = "renesas,sdhi-r9a07g044",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0x0 0x11c10000 0 0x10000>;
+			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK>,
+				 <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
+				 <&cpg CPG_MOD R9A07G044_SDHI1_CLK_HS>,
+				 <&cpg CPG_MOD R9A07G044_SDHI1_ACLK>;
+			clock-names = "imclk", "imclk2", "clk_hs", "aclk";
+			resets = <&cpg R9A07G044_SDHI1_IXRST>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		eth0: ethernet@11c20000 {
 			compatible = "renesas,r9a07g044-gbeth",
 				     "renesas,rzg2l-gbeth";
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 38/39] arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (22 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 37/39] arm64: dts: renesas: r9a07g044: Add SDHI nodes Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 39/39] arm64: dts: renesas: rzg2l-smarc: Enable microSD " Lad Prabhakar
                   ` (5 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit a60a311cb8d0cddaaeb1eee22bfd76138e6b5ad6 upstream.

RZ/G2L SoM has both 64 GB eMMC and microSD connected to SDHI0.

Both these interfaces are mutually exclusive and the SD0 device
selection is based on the XOR between GPIO_SD0_DEV_SEL and SW1[2]
switch position.

This patch sets GPIO_SD0_DEV_SEL to high in DT. Use the below switch
setting logic for device selection between eMMC and microSD slot
connected to SDHI0.

Set SW1[2] to position 2/OFF for selecting eMMC
Set SW1[2] to position 3/ON for selecting microSD

This patch enables eMMC on RZ/G2L SMARC platform by default.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20211010142520.21976-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[PL: Manually applied the changes]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 .../boot/dts/renesas/rzg2l-smarc-som.dtsi     | 143 ++++++++++++++++++
 1 file changed, 143 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index 9804ca0fd528..c496c3bf212b 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -5,8 +5,19 @@
  * Copyright (C) 2021 Renesas Electronics Corp.
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
 
+/* SW1[2] should be at position 2/OFF to enable 64 GB eMMC */
+#define EMMC	1
+
+/*
+ * To enable uSD card on CN3,
+ * SW1[2] should be at position 3/ON.
+ * Disable eMMC by setting "#define EMMC	0" above.
+ */
+#define SDHI	(!EMMC)
+
 / {
 	aliases {
 		ethernet0 = &eth0;
@@ -22,6 +33,36 @@
 		/* first 128MB is reserved for secure area. */
 		reg = <0x0 0x48000000 0x0 0x78000000>;
 	};
+
+	reg_1p8v: regulator0 {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_3p3v: regulator1 {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	vccq_sdhi0: regulator-vccq-sdhi0 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI0 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		states = <3300000 1>, <1800000 0>;
+		regulator-boot-on;
+		gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>;
+		regulator-always-on;
+	};
 };
 
 &adc {
@@ -130,6 +171,13 @@
 			 <RZG2L_PORT_PINMUX(36, 0, 1)>; /* ET1_RXD3 */
 	};
 
+	gpio-sd0-pwr-en-hog {
+		gpio-hog;
+		gpios = <RZG2L_GPIO(4, 1) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "gpio_sd0_pwr_en";
+	};
+
 	qspi0_pins: qspi0 {
 		qspi0-data {
 			pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
@@ -141,6 +189,70 @@
 			power-source = <1800>;
 		};
 	};
+
+	/*
+	 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
+	 * The below switch logic can be used to select the device between
+	 * eMMC and microSD, after setting GPIO_SD0_DEV_SEL to high in DT.
+	 * SW1[2] should be at position 2/OFF to enable 64 GB eMMC
+	 * SW1[2] should be at position 3/ON to enable uSD card CN3
+	 */
+	sd0-dev-sel-hog {
+		gpio-hog;
+		gpios = <RZG2L_GPIO(41, 1) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "sd0_dev_sel";
+	};
+
+	sdhi0_emmc_pins: sd0emmc {
+		sd0_emmc_data {
+			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+			       "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+			power-source = <1800>;
+		};
+
+		sd0_emmc_ctrl {
+			pins = "SD0_CLK", "SD0_CMD";
+			power-source = <1800>;
+		};
+
+		sd0_emmc_rst {
+			pins = "SD0_RST#";
+			power-source = <1800>;
+		};
+	};
+
+	sdhi0_pins: sd0 {
+		sd0_data {
+			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
+			power-source = <3300>;
+		};
+
+		sd0_ctrl {
+			pins = "SD0_CLK", "SD0_CMD";
+			power-source = <3300>;
+		};
+
+		sd0_mux {
+			pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
+		};
+	};
+
+	sdhi0_pins_uhs: sd0_uhs {
+		sd0_data_uhs {
+			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
+			power-source = <1800>;
+		};
+
+		sd0_ctrl_uhs {
+			pins = "SD0_CLK", "SD0_CMD";
+			power-source = <1800>;
+		};
+
+		sd0_mux_uhs {
+			pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
+		};
+	};
 };
 
 &sbc {
@@ -170,3 +282,34 @@
 		};
 	};
 };
+
+#if SDHI
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-1 = <&sdhi0_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&vccq_sdhi0>;
+	bus-width = <4>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+#endif
+
+#if EMMC
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_emmc_pins>;
+	pinctrl-1 = <&sdhi0_emmc_pins>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_1p8v>;
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	non-removable;
+	fixed-emmc-driver-type = <1>;
+	status = "okay";
+};
+#endif
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* [PATCH 5.10.y-cip 39/39] arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (23 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 38/39] arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform Lad Prabhakar
@ 2022-03-30 18:54 ` Lad Prabhakar
  2022-03-31  8:58 ` [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Pavel Machek
                   ` (4 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Lad Prabhakar @ 2022-03-30 18:54 UTC (permalink / raw)
  To: cip-dev, Nobuhiro Iwamatsu, Pavel Machek; +Cc: Biju Das

From: Biju Das <biju.das.jz@bp.renesas.com>

commit 34cdc0edfe8f6d660e3c4c47d10f5506d08f09e1 upstream.

This patch enables microSD card slot connected to SDHI1 on RZ/G2L SMARC
platform.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20211010142520.21976-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[PL: Manually applied the changes]
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 62 ++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 70aca5d0306d..0cd7da8af1d4 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -31,6 +31,16 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 	};
+
+	vccq_sdhi1: regulator-vccq-sdhi1 {
+		compatible = "regulator-gpio";
+		regulator-name = "SDHI1 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <3300000 1>, <1800000 0>;
+	};
 };
 
 &canfd {
@@ -149,6 +159,45 @@
 			 <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */
 	};
 
+	sd1-pwr-en-hog {
+		gpio-hog;
+		gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "sd1_pwr_en";
+	};
+
+	sdhi1_pins: sd1 {
+		sd1_data {
+			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+			power-source = <3300>;
+		};
+
+		sd1_ctrl {
+			pins = "SD1_CLK", "SD1_CMD";
+			power-source = <3300>;
+		};
+
+		sd1_mux {
+			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
+		};
+	};
+
+	sdhi1_pins_uhs: sd1_uhs {
+		sd1_data_uhs {
+			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+			power-source = <1800>;
+		};
+
+		sd1_ctrl_uhs {
+			pins = "SD1_CLK", "SD1_CMD";
+			power-source = <1800>;
+		};
+
+		sd1_mux_uhs {
+			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
+		};
+	};
+
 	usb0_pins: usb0 {
 		pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
 			 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
@@ -184,6 +233,19 @@
 };
 #endif
 
+&sdhi1 {
+	pinctrl-0 = <&sdhi1_pins>;
+	pinctrl-1 = <&sdhi1_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&vccq_sdhi1>;
+	bus-width = <4>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
 &usb2_phy0 {
 	pinctrl-0 = <&usb0_pins>;
 	pinctrl-names = "default";
-- 
2.17.1



^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (24 preceding siblings ...)
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 39/39] arm64: dts: renesas: rzg2l-smarc: Enable microSD " Lad Prabhakar
@ 2022-03-31  8:58 ` Pavel Machek
  2022-03-31  9:28 ` Pavel Machek
                   ` (3 subsequent siblings)
  29 siblings, 0 replies; 44+ messages in thread
From: Pavel Machek @ 2022-03-31  8:58 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 578 bytes --]

Hi!

> This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
> enables this interfaces on Renesas RZ/G2L SMARC EVK.
> 
> All the patches have been cherry picked from v5.17 release.

Thanks for the series.

Review did not find anything that would prevent merge, so I'll proceed
with testing. If it tests okay and there are no other comments, I'll
likely apply the patches.

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
  2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
                   ` (25 preceding siblings ...)
  2022-03-31  8:58 ` [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Pavel Machek
@ 2022-03-31  9:28 ` Pavel Machek
  2022-03-31 11:29   ` Prabhakar Mahadev Lad
  2022-04-01 19:35   ` Prabhakar Mahadev Lad
       [not found] ` <20220330185454.10887-5-prabhakar.mahadev-lad.rj@bp.renesas.com>
                   ` (2 subsequent siblings)
  29 siblings, 2 replies; 44+ messages in thread
From: Pavel Machek @ 2022-03-31  9:28 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 713 bytes --]

Hi!

> This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
> enables this interfaces on Renesas RZ/G2L SMARC EVK.
> 
> All the patches have been cherry picked from v5.17 release.

I tried to apply the patches on top of 5.10.106-cip4, and could
not. Can you double check series applies properly?

8bb6e30b765989a3c0924158316d689e16317cd1
    CIP: Bump version suffix to -cip4 after merge from stable
commit 66f600a7a5460b6acab5272ac9f54f842927a50d
    Merge tag 'v5.10.106' into linux-5.10.y-cip

Best regards,
							Pavel
							
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 04/39] mmc: renesas_sdhi: clear TAPEN when resetting, too
       [not found] ` <20220330185454.10887-5-prabhakar.mahadev-lad.rj@bp.renesas.com>
@ 2022-03-31 10:13   ` Pavel Machek
  2022-04-01 19:18     ` Prabhakar Mahadev Lad
  0 siblings, 1 reply; 44+ messages in thread
From: Pavel Machek @ 2022-03-31 10:13 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 1074 bytes --]

Hi!

> From: Wolfram Sang <wsa+renesas@sang-engineering.com>
> 
> commit 183edc060e6969a3afe83f663b534f6324fb7e3a upstream.
> 
> We want to clear TAPEN in a software reset, too, to have a completely
> known state. Especially when we doing the initial reset during boot to
> clear previous firmware states.
> 

> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -558,7 +558,7 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host)
>  	struct renesas_sdhi *priv = host_to_priv(host);
>  
>  	if (priv->scc_ctl) {
> -		renesas_sdhi_reset_scc(host, priv);
> +		renesas_sdhi_disable_scc(host->mmc);
>  		renesas_sdhi_reset_hs400_mode(host, priv);
>  		priv->needs_adjust_hs400 = false;

Having half of functions receive host, priv pointers and the other
half receiving host->mmc pointer is not very nice. Is there some logic
behind that / is it possible to somehow fix?

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes
       [not found] ` <20220330185454.10887-10-prabhakar.mahadev-lad.rj@bp.renesas.com>
@ 2022-03-31 10:14   ` Pavel Machek
  2022-04-01 19:19     ` Prabhakar Mahadev Lad
  0 siblings, 1 reply; 44+ messages in thread
From: Pavel Machek @ 2022-03-31 10:14 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 1410 bytes --]

Hi!

> From: Wolfram Sang <wsa+renesas@sang-engineering.com>
> 
> commit ab07a1356043f07142ba351253904ef8c42ecd4f upstream.
> 
> Better prevent double includes.

> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -18,22 +18,22 @@
>   *
>   */
>  
> -#include <linux/kernel.h>
>  #include <linux/clk.h>
> -#include <linux/slab.h>
> -#include <linux/module.h>
> -#include <linux/of_device.h>
> -#include <linux/platform_device.h>
> -#include <linux/pm_domain.h>
> +#include <linux/delay.h>
> +#include <linux/kernel.h>
> +#include <linux/mfd/tmio.h>
>  #include <linux/mmc/host.h>
>  #include <linux/mmc/mmc.h>
>  #include <linux/mmc/slot-gpio.h>
> -#include <linux/mfd/tmio.h>
> -#include <linux/sh_dma.h>
> -#include <linux/delay.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
>  #include <linux/pinctrl/consumer.h>
>  #include <linux/pinctrl/pinctrl-state.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_domain.h>
>  #include <linux/regulator/consumer.h>
> +#include <linux/sh_dma.h>
> +#include <linux/slab.h>
>  #include <linux/sys_soc.h>
>  
>  #include "renesas_sdhi.h"

In these cases we usually sort be include length, first ("reverse
xmass tree").

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support Lad Prabhakar
@ 2022-03-31 10:16   ` Pavel Machek
  2022-04-01 19:20     ` Prabhakar Mahadev Lad
  0 siblings, 1 reply; 44+ messages in thread
From: Pavel Machek @ 2022-03-31 10:16 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 567 bytes --]

Hi!

> commit 69e7d76afdb54243df957351804c0f1afca46d0f upstream.
> 
> Add pre_req and post_req support to improve performance.
> 
> Inspired by a patch in the BSP by Masaharu Hayakawa.
> 

> +/*
> + * renesas_sdhi_internal_dmac_map() will be called with two difference

"two different"?

> +	/* This DMAC cannot handle if buffer is not 128-bytes alignment */

"aligned"?

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune Lad Prabhakar
@ 2022-03-31 10:18   ` Pavel Machek
  2022-04-01 19:27     ` Prabhakar Mahadev Lad
  0 siblings, 1 reply; 44+ messages in thread
From: Pavel Machek @ 2022-03-31 10:18 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 831 bytes --]

Hi!

> commit ed2fab9a8229cc70fe03032e48d0ec375df6013e upstream.
> 
> According to the datasheet, this controller needs retune when
> cmd or data timeout happens. So, add a condition into
> .check_retune().

> @@ -790,11 +792,19 @@ static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host)
>  	if (mmc_doing_tune(host->mmc))
>  		return false;
>  
> +	if (((mrq->cmd->error == -ETIMEDOUT) ||
> +	     (mrq->data && mrq->data->error == -ETIMEDOUT)) &&
> +	    ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
> +	     (host->ops.get_cd && host->ops.get_cd(host->mmc))))
> +		ret |= true;

I'd preffer simple "ret = true" here.

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible
  2022-03-30 18:54 ` [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible Lad Prabhakar
@ 2022-03-31 10:20   ` Pavel Machek
  2022-04-01 19:29     ` Prabhakar Mahadev Lad
  0 siblings, 1 reply; 44+ messages in thread
From: Pavel Machek @ 2022-03-31 10:20 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 822 bytes --]

Hi!

> commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream.
> 
> All recent SDHI instances can be reset via the reset controller. If one
> is found, use it instead of the open coded reset. This is to get a
> future-proof sane reset state.

> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -1086,6 +1097,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
>  	if (ret)
>  		goto efree;
>  
> +	priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
> +	if (IS_ERR(priv->rstc))
> +		return PTR_ERR(priv->rstc);
> +

I believe this needs to goto to appropriate error path, not return
directly.

Best regards,
								Pavel
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant minItems/maxItems
       [not found] ` <20220330185454.10887-33-prabhakar.mahadev-lad.rj@bp.renesas.com>
@ 2022-03-31 10:22   ` Pavel Machek
  2022-04-01 19:32     ` Prabhakar Mahadev Lad
  0 siblings, 1 reply; 44+ messages in thread
From: Pavel Machek @ 2022-03-31 10:22 UTC (permalink / raw)
  To: Lad Prabhakar; +Cc: cip-dev, Nobuhiro Iwamatsu, Pavel Machek, Biju Das

[-- Attachment #1: Type: text/plain, Size: 914 bytes --]

Hi!

> This condition is partially checked with the meta-schema already, but
> only if both 'minItems' and 'maxItems' are equal to the 'items' length.
> An improved meta-schema is pending.

Do we have the improved meta-scheme in 5.10.X? Are we actually running
the dts schema checks?

I guess it is not a big deal either way.

Best regards,
								Pavel

> +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
> @@ -74,7 +74,6 @@ properties:
>  
>    clock-names:
>      minItems: 1
> -    maxItems: 2
>      items:
>        - const: core
>        - const: cd
> @@ -106,7 +105,6 @@ properties:
>  
>    pinctrl-names:
>      minItems: 1
> -    maxItems: 2
>      items:
>        - const: default
>        - const: state_uhs

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

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^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
  2022-03-31  9:28 ` Pavel Machek
@ 2022-03-31 11:29   ` Prabhakar Mahadev Lad
  2022-03-31 12:49     ` Pavel Machek
  2022-04-01 19:35   ` Prabhakar Mahadev Lad
  1 sibling, 1 reply; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-03-31 11:29 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel,

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 10:28
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas
> RZ/G2L SoC
> 
> Hi!
> 
> > This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
> > enables this interfaces on Renesas RZ/G2L SMARC EVK.
> >
> > All the patches have been cherry picked from v5.17 release.
> 
> I tried to apply the patches on top of 5.10.106-cip4, and could not. Can
> you double check series applies properly?
> 
I did cross check my base branch and it is 5.10.106-cip4. For some weird reason patches 01 to 09 are missing in patchwork. (I can see the patches are in my inbox though and pretty sure you too have it as have received feedback on patch 04 and 09).

Do you want me to resend the series hoping patches appear on patchwork?

Cheers,
Prabhakar

> 8bb6e30b765989a3c0924158316d689e16317cd1
>     CIP: Bump version suffix to -cip4 after merge from stable commit
> 66f600a7a5460b6acab5272ac9f54f842927a50d
>     Merge tag 'v5.10.106' into linux-5.10.y-cip
> 
> Best regards,
> 							Pavel
> 
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

* Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
  2022-03-31 11:29   ` Prabhakar Mahadev Lad
@ 2022-03-31 12:49     ` Pavel Machek
  2022-03-31 23:35       ` nobuhiro1.iwamatsu
  0 siblings, 1 reply; 44+ messages in thread
From: Pavel Machek @ 2022-03-31 12:49 UTC (permalink / raw)
  To: Prabhakar Mahadev Lad; +Cc: Pavel Machek, cip-dev, Nobuhiro Iwamatsu, Biju Das

[-- Attachment #1: Type: text/plain, Size: 3269 bytes --]

Hi!

> > > This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
> > > enables this interfaces on Renesas RZ/G2L SMARC EVK.
> > >
> > > All the patches have been cherry picked from v5.17 release.
> > 
> > I tried to apply the patches on top of 5.10.106-cip4, and could not. Can
> > you double check series applies properly?
> > 
> I did cross check my base branch and it is 5.10.106-cip4. For some weird reason patches 01 to 09 are missing in patchwork. (I can see the patches are in my inbox though and pretty sure you too have it as have received feedback on patch 04 and 09).
> 
> Do you want me to resend the series hoping patches appear on
> patchwork?

I took patches from emails list, not from patchwork, so that should
not be it.

Let me try again:

git log
commit 8bb6e30b765989a3c0924158316d689e16317cd1 (HEAD -> linux-5.10.y-cip, tag: v5.10.106-cip4, origin/l\
inux-5.10.y-cip)
Author: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Date:   Tue Mar 29 08:32:48 2022 +0900

    CIP: Bump version suffix to -cip4 after merge from stable
pavel@duo:~/cip/10$ ./git-am /tmp/delme.zz

pavel@duo:~/cip/10$ ./git-am /tmp/delme.zt
Applying: mmc: renesas_sdhi: probe into TMIO after SCC parameters have been setup
Applying: mmc: renesas_sdhi: populate SCC pointer at the proper place
Applying: mmc: renesas_sdhi: simplify reset routine a little
error: patch failed: drivers/mmc/host/renesas_sdhi_core.c:569
error: drivers/mmc/host/renesas_sdhi_core.c: patch does not apply
Patch failed at 0003 mmc: renesas_sdhi: simplify reset routine a little
hint: Use 'git am --show-current-patch' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
pavel@duo:~/cip/10$ git am --skip
Applying: mmc: renesas_sdhi: clear TAPEN when resetting, too
error: patch failed: drivers/mmc/host/renesas_sdhi_core.c:558
error: drivers/mmc/host/renesas_sdhi_core.c: patch does not apply
Patch failed at 0004 mmc: renesas_sdhi: clear TAPEN when resetting, too
hint: Use 'git am --show-current-patch' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
pavel@duo:~/cip/10$
pavel@duo:~/cip/10$ git am --skip
Applying: mmc: renesas_sdhi: merge the SCC reset functions
Applying: mmc: renesas_sdhi: remove superfluous SCLKEN
error: patch failed: drivers/mmc/host/renesas_sdhi_core.c:556
error: drivers/mmc/host/renesas_sdhi_core.c: patch does not apply
Patch failed at 0006 mmc: renesas_sdhi: remove superfluous SCLKEN
hint: Use 'git am --show-current-patch' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
pavel@duo:~/cip/10$

Best regards,
								Pavel

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]

^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
  2022-03-31 12:49     ` Pavel Machek
@ 2022-03-31 23:35       ` nobuhiro1.iwamatsu
  0 siblings, 0 replies; 44+ messages in thread
From: nobuhiro1.iwamatsu @ 2022-03-31 23:35 UTC (permalink / raw)
  To: pavel, prabhakar.mahadev-lad.rj; +Cc: cip-dev, biju.das.jz

Hi all,

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: Thursday, March 31, 2022 9:49 PM
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: Pavel Machek <pavel@denx.de>; cip-dev@lists.cip-project.org; iwamatsu
> nobuhiro(岩松 信洋 □SWC◯ACT)
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas
> RZ/G2L SoC
> 
> Hi!
> 
> > > > This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC
> > > > and enables this interfaces on Renesas RZ/G2L SMARC EVK.
> > > >
> > > > All the patches have been cherry picked from v5.17 release.
> > >
> > > I tried to apply the patches on top of 5.10.106-cip4, and could not.
> > > Can you double check series applies properly?
> > >
> > I did cross check my base branch and it is 5.10.106-cip4. For some weird
> reason patches 01 to 09 are missing in patchwork. (I can see the patches are in
> my inbox though and pretty sure you too have it as have received feedback on
> patch 04 and 09).
> >
> > Do you want me to resend the series hoping patches appear on
> > patchwork?
> 
> I took patches from emails list, not from patchwork, so that should not be it.
> 
> Let me try again:
> 
> git log
> commit 8bb6e30b765989a3c0924158316d689e16317cd1 (HEAD ->
> linux-5.10.y-cip, tag: v5.10.106-cip4, origin/l\
> inux-5.10.y-cip)
> Author: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> Date:   Tue Mar 29 08:32:48 2022 +0900
> 
>     CIP: Bump version suffix to -cip4 after merge from stable
> pavel@duo:~/cip/10$ ./git-am /tmp/delme.zz
> 
> pavel@duo:~/cip/10$ ./git-am /tmp/delme.zt
> Applying: mmc: renesas_sdhi: probe into TMIO after SCC parameters have
> been setup
> Applying: mmc: renesas_sdhi: populate SCC pointer at the proper place
> Applying: mmc: renesas_sdhi: simplify reset routine a little
> error: patch failed: drivers/mmc/host/renesas_sdhi_core.c:569
> error: drivers/mmc/host/renesas_sdhi_core.c: patch does not apply Patch
> failed at 0003 mmc: renesas_sdhi: simplify reset routine a little
> hint: Use 'git am --show-current-patch' to see the failed patch When you have
> resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> pavel@duo:~/cip/10$ git am --skip
> Applying: mmc: renesas_sdhi: clear TAPEN when resetting, too
> error: patch failed: drivers/mmc/host/renesas_sdhi_core.c:558
> error: drivers/mmc/host/renesas_sdhi_core.c: patch does not apply Patch
> failed at 0004 mmc: renesas_sdhi: clear TAPEN when resetting, too
> hint: Use 'git am --show-current-patch' to see the failed patch When you have
> resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> pavel@duo:~/cip/10$
> pavel@duo:~/cip/10$ git am --skip
> Applying: mmc: renesas_sdhi: merge the SCC reset functions
> Applying: mmc: renesas_sdhi: remove superfluous SCLKEN
> error: patch failed: drivers/mmc/host/renesas_sdhi_core.c:556
> error: drivers/mmc/host/renesas_sdhi_core.c: patch does not apply Patch
> failed at 0006 mmc: renesas_sdhi: remove superfluous SCLKEN
> hint: Use 'git am --show-current-patch' to see the failed patch When you have
> resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> pavel@duo:~/cip/10$

I have the same issue.
It seems that patchwork has not been able to catch all the patches.
  https://patchwork.kernel.org/project/cip-dev/list/?series=627598
And CIP-dev ML is in the same situation.
  https://lore.kernel.org/cip-dev/20220331124910.GA16062@duo.ucw.cz/T/#m5be9be981a6acb372766fc280b7fb27eb5a27527
1 to 10, 18, 23, 26, 27, 32 do not exist.

Best regards,
  Nobuhiro



^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 04/39] mmc: renesas_sdhi: clear TAPEN when resetting, too
  2022-03-31 10:13   ` [PATCH 5.10.y-cip 04/39] mmc: renesas_sdhi: clear TAPEN when resetting, too Pavel Machek
@ 2022-04-01 19:18     ` Prabhakar Mahadev Lad
  0 siblings, 0 replies; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-04-01 19:18 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel,

Thank you for the review.

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 11:14
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 04/39] mmc: renesas_sdhi: clear TAPEN when
> resetting, too
> 
> Hi!
> 
> > From: Wolfram Sang <wsa+renesas@sang-engineering.com>
> >
> > commit 183edc060e6969a3afe83f663b534f6324fb7e3a upstream.
> >
> > We want to clear TAPEN in a software reset, too, to have a completely
> > known state. Especially when we doing the initial reset during boot to
> > clear previous firmware states.
> >
> 
> > +++ b/drivers/mmc/host/renesas_sdhi_core.c
> > @@ -558,7 +558,7 @@ static void renesas_sdhi_reset(struct tmio_mmc_host
> *host)
> >  	struct renesas_sdhi *priv = host_to_priv(host);
> >
> >  	if (priv->scc_ctl) {
> > -		renesas_sdhi_reset_scc(host, priv);
> > +		renesas_sdhi_disable_scc(host->mmc);
> >  		renesas_sdhi_reset_hs400_mode(host, priv);
> >  		priv->needs_adjust_hs400 = false;
> 
> Having half of functions receive host, priv pointers and the other half
> receiving host->mmc pointer is not very nice. Is there some logic behind
> that / is it possible to somehow fix?
> 
That's because renesas_sdhi_disable_scc() needed only host->mmc pointer.

Cheers,
Prabhakar

> Best regards,
> 								Pavel
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes
  2022-03-31 10:14   ` [PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes Pavel Machek
@ 2022-04-01 19:19     ` Prabhakar Mahadev Lad
  0 siblings, 0 replies; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-04-01 19:19 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel,

Thank you for the review.

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 11:15
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes
> 
> Hi!
> 
> > From: Wolfram Sang <wsa+renesas@sang-engineering.com>
> >
> > commit ab07a1356043f07142ba351253904ef8c42ecd4f upstream.
> >
> > Better prevent double includes.
> 
> > +++ b/drivers/mmc/host/renesas_sdhi_core.c
> > @@ -18,22 +18,22 @@
> >   *
> >   */
> >
> > -#include <linux/kernel.h>
> >  #include <linux/clk.h>
> > -#include <linux/slab.h>
> > -#include <linux/module.h>
> > -#include <linux/of_device.h>
> > -#include <linux/platform_device.h>
> > -#include <linux/pm_domain.h>
> > +#include <linux/delay.h>
> > +#include <linux/kernel.h>
> > +#include <linux/mfd/tmio.h>
> >  #include <linux/mmc/host.h>
> >  #include <linux/mmc/mmc.h>
> >  #include <linux/mmc/slot-gpio.h>
> > -#include <linux/mfd/tmio.h>
> > -#include <linux/sh_dma.h>
> > -#include <linux/delay.h>
> > +#include <linux/module.h>
> > +#include <linux/of_device.h>
> >  #include <linux/pinctrl/consumer.h>
> >  #include <linux/pinctrl/pinctrl-state.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_domain.h>
> >  #include <linux/regulator/consumer.h>
> > +#include <linux/sh_dma.h>
> > +#include <linux/slab.h>
> >  #include <linux/sys_soc.h>
> >
> >  #include "renesas_sdhi.h"
> 
> In these cases we usually sort be include length, first ("reverse xmass
> tree").
> 
My understating was most subsystems prefer alphabetical.

Cheers,
Prabhakar

> Best regards,
> 								Pavel
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support
  2022-03-31 10:16   ` Pavel Machek
@ 2022-04-01 19:20     ` Prabhakar Mahadev Lad
  0 siblings, 0 replies; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-04-01 19:20 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel,

Thank you for the review.

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 11:16
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add
> pre_req and post_req support
> 
> Hi!
> 
> > commit 69e7d76afdb54243df957351804c0f1afca46d0f upstream.
> >
> > Add pre_req and post_req support to improve performance.
> >
> > Inspired by a patch in the BSP by Masaharu Hayakawa.
> >
> 
> > +/*
> > + * renesas_sdhi_internal_dmac_map() will be called with two difference
> 
> "two different"?
>
Agreed.
 
> > +	/* This DMAC cannot handle if buffer is not 128-bytes alignment */
> 
> "aligned"?
> 
Ditto.

Cheers,
Prabhakar

> Best regards,
> 								Pavel
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune
  2022-03-31 10:18   ` Pavel Machek
@ 2022-04-01 19:27     ` Prabhakar Mahadev Lad
  0 siblings, 0 replies; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-04-01 19:27 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel,

Thank you for the review.

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 11:19
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition
> of cmd/data timeout for retune
> 
> Hi!
> 
> > commit ed2fab9a8229cc70fe03032e48d0ec375df6013e upstream.
> >
> > According to the datasheet, this controller needs retune when cmd or
> > data timeout happens. So, add a condition into .check_retune().
> 
> > @@ -790,11 +792,19 @@ static bool renesas_sdhi_check_scc_error(struct
> tmio_mmc_host *host)
> >  	if (mmc_doing_tune(host->mmc))
> >  		return false;
> >
> > +	if (((mrq->cmd->error == -ETIMEDOUT) ||
> > +	     (mrq->data && mrq->data->error == -ETIMEDOUT)) &&
> > +	    ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
> > +	     (host->ops.get_cd && host->ops.get_cd(host->mmc))))
> > +		ret |= true;
> 
> I'd preffer simple "ret = true" here.
> 
Agreed.

Cheers,
Prabhakar

> Best regards,
> 								Pavel
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible
  2022-03-31 10:20   ` Pavel Machek
@ 2022-04-01 19:29     ` Prabhakar Mahadev Lad
  0 siblings, 0 replies; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-04-01 19:29 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel,

Thank you for the review.

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 11:20
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if
> possible
> 
> Hi!
> 
> > commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream.
> >
> > All recent SDHI instances can be reset via the reset controller. If
> > one is found, use it instead of the open coded reset. This is to get a
> > future-proof sane reset state.
> 
> > +++ b/drivers/mmc/host/renesas_sdhi_core.c
> > @@ -1086,6 +1097,10 @@ int renesas_sdhi_probe(struct platform_device
> *pdev,
> >  	if (ret)
> >  		goto efree;
> >
> > +	priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev,
> NULL);
> > +	if (IS_ERR(priv->rstc))
> > +		return PTR_ERR(priv->rstc);
> > +
> 
> I believe this needs to goto to appropriate error path, not return
> directly.
> 
Yes you are right this needs to land into appropriate error path.

Cheers,
Prabhakar

> Best regards,
> 								Pavel
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant minItems/maxItems
  2022-03-31 10:22   ` [PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant minItems/maxItems Pavel Machek
@ 2022-04-01 19:32     ` Prabhakar Mahadev Lad
  0 siblings, 0 replies; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-04-01 19:32 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel,

Thank you for the review.

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 11:22
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant
> minItems/maxItems
> 
> Hi!
> 
> > This condition is partially checked with the meta-schema already, but
> > only if both 'minItems' and 'maxItems' are equal to the 'items' length.
> > An improved meta-schema is pending.
> 
> Do we have the improved meta-scheme in 5.10.X? Are we actually running the
> dts schema checks?
>
Right 5.10.x will use older schemas. Let me know your thoughts If you want me to drop this patch.
 
> I guess it is not a big deal either way.
> 
Im hoping you are ok with this change.

Cheers,
Prabhakar

> Best regards,
> 								Pavel
> 
> > +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
> > @@ -74,7 +74,6 @@ properties:
> >
> >    clock-names:
> >      minItems: 1
> > -    maxItems: 2
> >      items:
> >        - const: core
> >        - const: cd
> > @@ -106,7 +105,6 @@ properties:
> >
> >    pinctrl-names:
> >      minItems: 1
> > -    maxItems: 2
> >      items:
> >        - const: default
> >        - const: state_uhs
> 
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

* RE: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC
  2022-03-31  9:28 ` Pavel Machek
  2022-03-31 11:29   ` Prabhakar Mahadev Lad
@ 2022-04-01 19:35   ` Prabhakar Mahadev Lad
  1 sibling, 0 replies; 44+ messages in thread
From: Prabhakar Mahadev Lad @ 2022-04-01 19:35 UTC (permalink / raw)
  To: Pavel Machek; +Cc: cip-dev, Nobuhiro Iwamatsu, Biju Das

Hi Pavel, Nobuhiro,

> -----Original Message-----
> From: Pavel Machek <pavel@denx.de>
> Sent: 31 March 2022 10:28
> To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu
> <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das
> <biju.das.jz@bp.renesas.com>
> Subject: Re: [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas
> RZ/G2L SoC
> 
> Hi!
> 
> > This patch series adds support for SD/eMMC on Renesas RZ/G2L SoC and
> > enables this interfaces on Renesas RZ/G2L SMARC EVK.
> >
> > All the patches have been cherry picked from v5.17 release.
> 
> I tried to apply the patches on top of 5.10.106-cip4, and could not. Can
> you double check series applies properly?
> 
Sorry about that, I realized now I had missed a patch!

Will resend the series (with 40 patches).

Cheers,
Prabhakar

> 8bb6e30b765989a3c0924158316d689e16317cd1
>     CIP: Bump version suffix to -cip4 after merge from stable commit
> 66f600a7a5460b6acab5272ac9f54f842927a50d
>     Merge tag 'v5.10.106' into linux-5.10.y-cip
> 
> Best regards,
> 							Pavel
> 
> --
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


^ permalink raw reply	[flat|nested] 44+ messages in thread

end of thread, other threads:[~2022-04-04 18:46 UTC | newest]

Thread overview: 44+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-30 18:54 [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 10/39] mmc: tmio: set max_busy_timeout Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 11/39] mmc: tmio: add hook for custom busy_wait calculation Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 12/39] mmc: renesas_sdhi: populate hook for longer busy_wait Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 13/39] mmc: renesas_internal_dmac: add pre_req and post_req support Lad Prabhakar
2022-03-31 10:16   ` Pavel Machek
2022-04-01 19:20     ` Prabhakar Mahadev Lad
2022-03-30 18:54 ` [PATCH 5.10.y-cip 14/39] mmc: tmio: Add data timeout error detection Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 15/39] mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune Lad Prabhakar
2022-03-31 10:18   ` Pavel Machek
2022-04-01 19:27     ` Prabhakar Mahadev Lad
2022-03-30 18:54 ` [PATCH 5.10.y-cip 16/39] mmc: tmio: support custom irq masks Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 17/39] mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 19/39] mmc: tmio: restore bus width when resetting Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 20/39] mmc: renesas_sdhi: break SCC reset into own function Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if possible Lad Prabhakar
2022-03-31 10:20   ` Pavel Machek
2022-04-01 19:29     ` Prabhakar Mahadev Lad
2022-03-30 18:54 ` [PATCH 5.10.y-cip 22/39] mmc: tmio: always flag retune when resetting and a card is present Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 24/39] mmc: tmio: reenable card irqs after the reset callback Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 25/39] mmc: tmio: reinit card irqs in reset routine Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 28/39] clk: renesas: rzg2l: Check return value of pm_genpd_init() Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 29/39] clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple() Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 30/39] clk: renesas: r9a07g044: Add SDHI clock and reset entries Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 31/39] dt-bindings: Fix errors in 'if' schemas Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 33/39] dt-bindings: mmc: renesas,sdhi: Fix dtbs-check warning Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 34/39] dt-bindings: mmc: renesas,sdhi: Document RZ/G2L bindings Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 35/39] dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 36/39] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 37/39] arm64: dts: renesas: r9a07g044: Add SDHI nodes Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 38/39] arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform Lad Prabhakar
2022-03-30 18:54 ` [PATCH 5.10.y-cip 39/39] arm64: dts: renesas: rzg2l-smarc: Enable microSD " Lad Prabhakar
2022-03-31  8:58 ` [PATCH 5.10.y-cip 00/39] Add SD/eMMC support for Renesas RZ/G2L SoC Pavel Machek
2022-03-31  9:28 ` Pavel Machek
2022-03-31 11:29   ` Prabhakar Mahadev Lad
2022-03-31 12:49     ` Pavel Machek
2022-03-31 23:35       ` nobuhiro1.iwamatsu
2022-04-01 19:35   ` Prabhakar Mahadev Lad
     [not found] ` <20220330185454.10887-5-prabhakar.mahadev-lad.rj@bp.renesas.com>
2022-03-31 10:13   ` [PATCH 5.10.y-cip 04/39] mmc: renesas_sdhi: clear TAPEN when resetting, too Pavel Machek
2022-04-01 19:18     ` Prabhakar Mahadev Lad
     [not found] ` <20220330185454.10887-10-prabhakar.mahadev-lad.rj@bp.renesas.com>
2022-03-31 10:14   ` [PATCH 5.10.y-cip 09/39] mmc: renesas_sdhi: sort includes Pavel Machek
2022-04-01 19:19     ` Prabhakar Mahadev Lad
     [not found] ` <20220330185454.10887-33-prabhakar.mahadev-lad.rj@bp.renesas.com>
2022-03-31 10:22   ` [PATCH 5.10.y-cip 32/39] dt-bindings: Drop redundant minItems/maxItems Pavel Machek
2022-04-01 19:32     ` Prabhakar Mahadev Lad

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