From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [RFC] dmaengine: add fifo_size member From: Sameer Pujar Message-Id: <1556623828-21577-1-git-send-email-spujar@nvidia.com> Date: Tue, 30 Apr 2019 17:00:28 +0530 To: vkoul@kernel.org, dan.j.williams@intel.com, tiwai@suse.com Cc: jonathanh@nvidia.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Sameer Pujar List-ID: RHVyaW5nIHRoZSBETUEgdHJhbnNmZXJzIGZyb20gbWVtb3J5IHRvIEkvTywgaXQgd2FzIG9ic2Vy dmVkIHRoYXQgdHJhbnNmZXJzCndlcmUgaW5jb25zaXN0ZW50IGFuZCByZXN1bHRlZCBpbiBnbGl0 Y2hlcyBmb3IgYXVkaW8gcGxheWJhY2suIEl0IGhhcHBlbmVkCmJlY2F1c2UgZmlmbyBzaXplIG9u IERNQSBkaWQgbm90IG1hdGNoIHdpdGggc2xhdmUgY2hhbm5lbCBjb25maWd1cmF0aW9uLgoKY3Vy cmVudGx5ICdkbWFfc2xhdmVfY29uZmlnJyBzdHJ1Y3R1cmUgZG9lcyBub3QgaGF2ZSBhIGZpZWxk IGZvciBmaWZvIHNpemUuCkhlbmNlIHRoZSBwbGF0Zm9ybSBwY20gZHJpdmVyIGNhbm5vdCBwYXNz IHRoZSBmaWZvIHNpemUgYXMgYSBzbGF2ZV9jb25maWcuCk5vdGUgdGhhdCAnc25kX2RtYWVuZ2lu ZV9kYWlfZG1hX2RhdGEnIHN0cnVjdHVyZSBoYXMgZmlmb19zaXplIGZpZWxkIHdoaWNoCmNhbm5v dCBiZSB1c2VkIHRvIHBhc3MgdGhlIHNpemUgaW5mby4gVGhpcyBwYXRjaCBpbnRyb2R1Y2VzIGZp Zm9fc2l6ZSBmaWVsZAphbmQgdGhlIHNhbWUgY2FuIGJlIHBvcHVsYXRlZCBvbiBzbGF2ZSBzaWRl LiBVc2VycyBjYW4gc2V0IHJlcXVpcmVkIHNpemUKZm9yIHNsYXZlIHBlcmlwaGVyYWwgKG11bHRp cGxlIGNoYW5uZWxzIGNhbiBiZSBpbmRlcGVuZGVudGx5IHJ1bm5pbmcgd2l0aApkaWZmZXJlbnQg ZmlmbyBzaXplcykgYW5kIHRoZSBjb3JyZXNwb25kaW5nIHNpemVzIGFyZSBwcm9ncmFtbWVkIHRo cm91Z2gKZG1hX3NsYXZlX2NvbmZpZyBvbiBETUEgc2lkZS4KClJlcXVlc3QgZm9yIGZlZWRiYWNr L3N1Z2dlc3Rpb25zLgoKU2lnbmVkLW9mZi1ieTogU2FtZWVyIFB1amFyIDxzcHVqYXJAbnZpZGlh LmNvbT4KLS0tCiBpbmNsdWRlL2xpbnV4L2RtYWVuZ2luZS5oIHwgMyArKysKIDEgZmlsZSBjaGFu Z2VkLCAzIGluc2VydGlvbnMoKykKCmRpZmYgLS1naXQgYS9pbmNsdWRlL2xpbnV4L2RtYWVuZ2lu ZS5oIGIvaW5jbHVkZS9saW51eC9kbWFlbmdpbmUuaAppbmRleCBkNDllYzVjLi45ZWMxOThiIDEw MDY0NAotLS0gYS9pbmNsdWRlL2xpbnV4L2RtYWVuZ2luZS5oCisrKyBiL2luY2x1ZGUvbGludXgv ZG1hZW5naW5lLmgKQEAgLTM1MSw2ICszNTEsOCBAQCBlbnVtIGRtYV9zbGF2ZV9idXN3aWR0aCB7 CiAgKiBAc2xhdmVfaWQ6IFNsYXZlIHJlcXVlc3RlciBpZC4gT25seSB2YWxpZCBmb3Igc2xhdmUg Y2hhbm5lbHMuIFRoZSBkbWEKICAqIHNsYXZlIHBlcmlwaGVyYWwgd2lsbCBoYXZlIHVuaXF1ZSBp ZCBhcyBkbWEgcmVxdWVzdGVyIHdoaWNoIG5lZWQgdG8gYmUKICAqIHBhc3MgYXMgc2xhdmUgY29u ZmlnLgorICogQGZpZm9fc2l6ZTogRmlmbyBzaXplIHZhbHVlLiBUaGUgZG1hIHNsYXZlIHBlcmlw aGVyYWwgY2FuIGNvbmZpZ3VyZSByZXF1aXJlZAorICogZmlmbyBzaXplIGFuZCB0aGUgc2FtZSBu ZWVkcyB0byBiZSBwYXNzZWQgYXMgc2xhdmUgY29uZmlnLgogICoKICAqIFRoaXMgc3RydWN0IGlz IHBhc3NlZCBpbiBhcyBjb25maWd1cmF0aW9uIGRhdGEgdG8gYSBETUEgZW5naW5lCiAgKiBpbiBv cmRlciB0byBzZXQgdXAgYSBjZXJ0YWluIGNoYW5uZWwgZm9yIERNQSB0cmFuc3BvcnQgYXQgcnVu dGltZS4KQEAgLTM3Niw2ICszNzgsNyBAQCBzdHJ1Y3QgZG1hX3NsYXZlX2NvbmZpZyB7CiAJdTMy IGRzdF9wb3J0X3dpbmRvd19zaXplOwogCWJvb2wgZGV2aWNlX2ZjOwogCXVuc2lnbmVkIGludCBz bGF2ZV9pZDsKKwl1MzIgZmlmb19zaXplOwogfTsKIAogLyoqCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F1E3C43219 for ; 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Tue, 30 Apr 2019 11:30:38 +0000 Received: from HQMAIL106.nvidia.com (172.18.146.12) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 30 Apr 2019 11:30:38 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 30 Apr 2019 11:30:38 +0000 Received: from linux.nvidia.com (Not Verified[10.24.34.185]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 30 Apr 2019 04:30:38 -0700 From: Sameer Pujar To: , , CC: , , , Sameer Pujar Subject: [PATCH] [RFC] dmaengine: add fifo_size member Date: Tue, 30 Apr 2019 17:00:28 +0530 Message-ID: <1556623828-21577-1-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1556623809; bh=AH+q4xpuhOjvbuUu+/2uIx5A6NBKPe1QLxkPOVg1H7g=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:Content-Type; b=EkDUb7qA27dFZrFmJITvZIkKP9+U7Zf2yP0qu14TcCUS8apyFLBShJ42wst5bN7C2 RGTut2NU6SczZwm6DP5TDswAOXF/VFb+4WAFQXdWqofziwlRNsJfVXbsJKUHEQka0x K07H4Ue4ZJfImQc6KKe/y3LXLxzhT5Bw9AgGxrT8YYtHPwmDalNx/XV7d448Ff1hCe YIMExb31Z1MFQUeSlz/Zyj4aBeocylldTZOwNr0wdve/ec6ZuilyPqNaijZqx0UQ97 0q0QMEB9X9o5azZ9qcXLkyoPmqNMATZcZ30SLMQMSyxhuZvxmEuWfRECB5wcT3ZkY0 l5WmtAYwesiEw== Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Message-ID: <20190430113028.ZD_Nc6lMXX4k5wsXTptC7fVWPgqxdNXSonUAhoML8gA@z> During the DMA transfers from memory to I/O, it was observed that transfers were inconsistent and resulted in glitches for audio playback. It happened because fifo size on DMA did not match with slave channel configuration. currently 'dma_slave_config' structure does not have a field for fifo size. Hence the platform pcm driver cannot pass the fifo size as a slave_config. Note that 'snd_dmaengine_dai_dma_data' structure has fifo_size field which cannot be used to pass the size info. This patch introduces fifo_size field and the same can be populated on slave side. Users can set required size for slave peripheral (multiple channels can be independently running with different fifo sizes) and the corresponding sizes are programmed through dma_slave_config on DMA side. Request for feedback/suggestions. Signed-off-by: Sameer Pujar --- include/linux/dmaengine.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index d49ec5c..9ec198b 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -351,6 +351,8 @@ enum dma_slave_buswidth { * @slave_id: Slave requester id. Only valid for slave channels. The dma * slave peripheral will have unique id as dma requester which need to be * pass as slave config. + * @fifo_size: Fifo size value. The dma slave peripheral can configure required + * fifo size and the same needs to be passed as slave config. * * This struct is passed in as configuration data to a DMA engine * in order to set up a certain channel for DMA transport at runtime. @@ -376,6 +378,7 @@ struct dma_slave_config { u32 dst_port_window_size; bool device_fc; unsigned int slave_id; + u32 fifo_size; }; /** -- 2.7.4