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* [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all
@ 2019-11-25  6:42 Radhey Shyam Pandey
  2019-12-10  6:01 ` Vinod Koul
  0 siblings, 1 reply; 3+ messages in thread
From: Radhey Shyam Pandey @ 2019-11-25  6:42 UTC (permalink / raw)
  To: vkoul, dan.j.williams, michal.simek, nick.graumann,
	andrea.merello, appana.durga.rao, mcgrof
  Cc: dmaengine, linux-kernel, git, Radhey Shyam Pandey

Reset DMA channel after stop to ensure that pending transfers and FIFOs
in the datapath are flushed or completed. It fixes intermittent data
verification failure reported by xilinx dma test client.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
---
 drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index a9c5d5c..6f1539c 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -2404,16 +2404,17 @@ static int xilinx_dma_terminate_all(struct dma_chan *dchan)
 	u32 reg;
 	int err;
 
-	if (chan->cyclic)
-		xilinx_dma_chan_reset(chan);
-
-	err = chan->stop_transfer(chan);
-	if (err) {
-		dev_err(chan->dev, "Cannot stop channel %p: %x\n",
-			chan, dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
-		chan->err = true;
+	if (!chan->cyclic) {
+		err = chan->stop_transfer(chan);
+		if (err) {
+			dev_err(chan->dev, "Cannot stop channel %p: %x\n",
+				chan, dma_ctrl_read(chan,
+				XILINX_DMA_REG_DMASR));
+			chan->err = true;
+		}
 	}
 
+	xilinx_dma_chan_reset(chan);
 	/* Remove and free all of the descriptors in the lists */
 	xilinx_dma_free_descriptors(chan);
 	chan->idle = true;
-- 
2.7.4


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all
  2019-11-25  6:42 [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all Radhey Shyam Pandey
@ 2019-12-10  6:01 ` Vinod Koul
  2019-12-11 14:46   ` Radhey Shyam Pandey
  0 siblings, 1 reply; 3+ messages in thread
From: Vinod Koul @ 2019-12-10  6:01 UTC (permalink / raw)
  To: Radhey Shyam Pandey
  Cc: dan.j.williams, michal.simek, nick.graumann, andrea.merello,
	appana.durga.rao, mcgrof, dmaengine, linux-kernel, git

On 25-11-19, 12:12, Radhey Shyam Pandey wrote:
> Reset DMA channel after stop to ensure that pending transfers and FIFOs
> in the datapath are flushed or completed. It fixes intermittent data
> verification failure reported by xilinx dma test client.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
>  drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
>  1 file changed, 9 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index a9c5d5c..6f1539c 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -2404,16 +2404,17 @@ static int xilinx_dma_terminate_all(struct dma_chan *dchan)
>  	u32 reg;
>  	int err;
>  
> -	if (chan->cyclic)
> -		xilinx_dma_chan_reset(chan);

So reset is required for non cyclic cases as well now?

> -
> -	err = chan->stop_transfer(chan);
> -	if (err) {
> -		dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> -			chan, dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
> -		chan->err = true;
> +	if (!chan->cyclic) {
> +		err = chan->stop_transfer(chan);

no stop for cyclic now..?

> +		if (err) {
> +			dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> +				chan, dma_ctrl_read(chan,
> +				XILINX_DMA_REG_DMASR));
> +			chan->err = true;
> +		}
>  	}
>  
> +	xilinx_dma_chan_reset(chan);
>  	/* Remove and free all of the descriptors in the lists */
>  	xilinx_dma_free_descriptors(chan);
>  	chan->idle = true;
> -- 
> 2.7.4

-- 
~Vinod

^ permalink raw reply	[flat|nested] 3+ messages in thread

* RE: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all
  2019-12-10  6:01 ` Vinod Koul
@ 2019-12-11 14:46   ` Radhey Shyam Pandey
  0 siblings, 0 replies; 3+ messages in thread
From: Radhey Shyam Pandey @ 2019-12-11 14:46 UTC (permalink / raw)
  To: Vinod Koul
  Cc: dan.j.williams, Michal Simek, nick.graumann, andrea.merello,
	Appana Durga Kedareswara Rao, mcgrof, dmaengine, linux-kernel,
	git

> -----Original Message-----
> From: Vinod Koul <vkoul@kernel.org>
> Sent: Tuesday, December 10, 2019 11:31 AM
> To: Radhey Shyam Pandey <radheys@xilinx.com>
> Cc: dan.j.williams@intel.com; Michal Simek <michals@xilinx.com>;
> nick.graumann@gmail.com; andrea.merello@gmail.com; Appana Durga
> Kedareswara Rao <appanad@xilinx.com>; mcgrof@kernel.org;
> dmaengine@vger.kernel.org; linux-kernel@vger.kernel.org; git
> <git@xilinx.com>
> Subject: Re: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in
> dma_terminate_all
> 
> On 25-11-19, 12:12, Radhey Shyam Pandey wrote:
> > Reset DMA channel after stop to ensure that pending transfers and
> > FIFOs in the datapath are flushed or completed. It fixes intermittent
> > data verification failure reported by xilinx dma test client.
> >
> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> > ---
> >  drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
> >  1 file changed, 9 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/dma/xilinx/xilinx_dma.c
> > b/drivers/dma/xilinx/xilinx_dma.c index a9c5d5c..6f1539c 100644
> > --- a/drivers/dma/xilinx/xilinx_dma.c
> > +++ b/drivers/dma/xilinx/xilinx_dma.c
> > @@ -2404,16 +2404,17 @@ static int xilinx_dma_terminate_all(struct
> dma_chan *dchan)
> >  	u32 reg;
> >  	int err;
> >
> > -	if (chan->cyclic)
> > -		xilinx_dma_chan_reset(chan);
> 
> So reset is required for non cyclic cases as well now?

Yes. In absence of reset in non-cyclic case, when dmatest client
driver is stressed and loaded/unloaded multiple times we see dma 
data comparison failures. Possibly IP is prefetching/holding the
previous state and reset ensures a clean state on each iteration.
> 
> > -
> > -	err = chan->stop_transfer(chan);
> > -	if (err) {
> > -		dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> > -			chan, dma_ctrl_read(chan,
> XILINX_DMA_REG_DMASR));
> > -		chan->err = true;
> > +	if (!chan->cyclic) {
> > +		err = chan->stop_transfer(chan);
> 
> no stop for cyclic now..?
After reset stop is not needed, so for the cyclic mode we only do reset.

> 
> > +		if (err) {
> > +			dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> > +				chan, dma_ctrl_read(chan,
> > +				XILINX_DMA_REG_DMASR));
> > +			chan->err = true;
> > +		}
> >  	}
> >
> > +	xilinx_dma_chan_reset(chan);
> >  	/* Remove and free all of the descriptors in the lists */
> >  	xilinx_dma_free_descriptors(chan);
> >  	chan->idle = true;
> > --
> > 2.7.4
> 
> --
> ~Vinod

^ permalink raw reply	[flat|nested] 3+ messages in thread

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Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2019-11-25  6:42 [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all Radhey Shyam Pandey
2019-12-10  6:01 ` Vinod Koul
2019-12-11 14:46   ` Radhey Shyam Pandey

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