From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [V3,2/2] dmaengine: fsl-dpaa2-qdma: Add NXP dpaa2 qDMA controller driver for Layerscape SoCs From: Vinod Koul Message-Id: <20190429053203.GF3845@vkoul-mobl.Dlink> Date: Mon, 29 Apr 2019 11:02:03 +0530 To: Peng Ma Cc: dan.j.williams@intel.com, leoyang.li@nxp.com, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org List-ID: T24gMDktMDQtMTksIDE1OjIyLCBQZW5nIE1hIHdyb3RlOgo+IERQUEEyKERhdGEgUGF0aCBBY2Nl bGVyYXRpb24gQXJjaGl0ZWN0dXJlIDIpIHFETUEKPiBUaGUgcURNQSBzdXBwb3J0cyBjaGFubmVs IHZpcnR1YWxpemF0aW9uIGJ5IGFsbG93aW5nIERNQSBqb2JzIHRvIGJlIGVucXVldWVkCj4gaW50 byBkaWZmZXJlbnQgZnJhbWUgcXVldWVzLiBDb3JlIGNhbiBpbml0aWF0ZSBhIERNQSB0cmFuc2Fj dGlvbiBieSBwcmVwYXJpbmcKPiBhIGZyYW1lIGRlc2NyaXB0b3IoRkQpIGZvciBlYWNoIERNQSBq b2IgYW5kIGVucXVldWluZyB0aGlzIGpvYiB0byBhIGZyYW1lIHF1ZXVlLgo+IHRocm91Z2ggYSBo YXJkd2FyZSBwb3J0YWwuIFRoZSBxRE1BIHByZWZldGNoZXMgRE1BIGpvYnMgZnJvbSB0aGUgZnJh bWUgcXVldWVzLgo+IEl0IHRoZW4gc2NoZWR1bGVzIGFuZCBkaXNwYXRjaGVzIHRvIGludGVybmFs IERNQSBoYXJkd2FyZSBlbmdpbmVzLCB3aGljaAo+IGdlbmVyYXRlIHJlYWQgYW5kIHdyaXRlIHJl cXVlc3RzLiBCb3RoIHFETUEgc291cmNlIGRhdGEgYW5kIGRlc3RpbmF0aW9uIGRhdGEgY2FuCj4g YmUgZWl0aGVyIGNvbnRpZ3VvdXMgb3Igbm9uLWNvbnRpZ3VvdXMgdXNpbmcgb25lIG9yIG1vcmUg c2NhdHRlci9nYXRoZXIgdGFibGVzLgo+IFRoZSBxRE1BIHN1cHBvcnRzIGdsb2JhbCBiYW5kd2lk dGggZmxvdyBjb250cm9sIHdoZXJlIGFsbCBETUEgdHJhbnNhY3Rpb25zIGFyZQo+IHN0YWxsZWQg aWYgdGhlIGJhbmR3aWR0aCB0aHJlc2hvbGQgaGFzIGJlZW4gcmVhY2hlZC4gQWxzbyBzdXBwb3J0 ZWQgYXJlCj4gdHJhbnNhY3Rpb24gYmFzZWQgcmVhZCB0aHJvdHRsaW5nLgo+IAo+IEFkZCBOWFAg ZHBwYTIgcURNQSB0byBzdXBwb3J0IHNvbWUgb2YgTGF5ZXJzY2FwZSBTb0NzLgo+IHN1Y2ggYXM6 IExTMTA4OEEsIExTMjA4eEEsIExYMiwgZXRjLgo+IAo+IFNpZ25lZC1vZmYtYnk6IFBlbmcgTWEg PHBlbmcubWFAbnhwLmNvbT4KPiAtLS0KPiBjaGFuZ2VkIGZvciB2MzoKPiAJLSBBZGQgZGVwZW5k cyBvbiBhcm02NCBmb3IgZHBhYTIgcWRtYSBkcml2ZXIgCj4gCS0gVGhlIGRwYWEyX2lvX3NlcnZp Y2VfW2RlXXJlZ2lzdGVyIGZ1bmN0aW9ucyBoYXZlIGEgbmV3IHBhcmFtZXRlcgo+IAlTbyB1cGRh dGUgYWxsIGNhbGxzIHRvIHNvbWUgZnVuY3Rpb25zCj4gCj4gIGRyaXZlcnMvZG1hL0tjb25maWcg ICAgICAgICAgICAgICAgICAgICB8ICAgIDIgKwo+ICBkcml2ZXJzL2RtYS9NYWtlZmlsZSAgICAg ICAgICAgICAgICAgICAgfCAgICAxICsKPiAgZHJpdmVycy9kbWEvZnNsLWRwYWEyLXFkbWEvS2Nv bmZpZyAgICAgIHwgICAgOSArCj4gIGRyaXZlcnMvZG1hL2ZzbC1kcGFhMi1xZG1hL01ha2VmaWxl ICAgICB8ICAgIDMgKwo+ICBkcml2ZXJzL2RtYS9mc2wtZHBhYTItcWRtYS9kcGFhMi1xZG1hLmMg fCAgNzgyICsrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysKPiAgZHJpdmVycy9kbWEvZnNs LWRwYWEyLXFkbWEvZHBhYTItcWRtYS5oIHwgIDE1MiArKysrKysKPiAgNiBmaWxlcyBjaGFuZ2Vk LCA5NDkgaW5zZXJ0aW9ucygrKSwgMCBkZWxldGlvbnMoLSkKPiAgY3JlYXRlIG1vZGUgMTAwNjQ0 IGRyaXZlcnMvZG1hL2ZzbC1kcGFhMi1xZG1hL0tjb25maWcKPiAgY3JlYXRlIG1vZGUgMTAwNjQ0 IGRyaXZlcnMvZG1hL2ZzbC1kcGFhMi1xZG1hL01ha2VmaWxlCj4gIGNyZWF0ZSBtb2RlIDEwMDY0 NCBkcml2ZXJzL2RtYS9mc2wtZHBhYTItcWRtYS9kcGFhMi1xZG1hLmMKPiAgY3JlYXRlIG1vZGUg MTAwNjQ0IGRyaXZlcnMvZG1hL2ZzbC1kcGFhMi1xZG1hL2RwYWEyLXFkbWEuaAo+IAo+IGRpZmYg LS1naXQgYS9kcml2ZXJzL2RtYS9LY29uZmlnIGIvZHJpdmVycy9kbWEvS2NvbmZpZwo+IGluZGV4 IGVhZjc4ZjQuLjA4YWFlMDEgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9kbWEvS2NvbmZpZwo+ICsr KyBiL2RyaXZlcnMvZG1hL0tjb25maWcKPiBAQCAtNjcxLDYgKzY3MSw4IEBAIHNvdXJjZSAiZHJp dmVycy9kbWEvc2gvS2NvbmZpZyIKPiAgCj4gIHNvdXJjZSAiZHJpdmVycy9kbWEvdGkvS2NvbmZp ZyIKPiAgCj4gK3NvdXJjZSAiZHJpdmVycy9kbWEvZnNsLWRwYWEyLXFkbWEvS2NvbmZpZyIKPiAr Cj4gICMgY2xpZW50cwo+ICBjb21tZW50ICJETUEgQ2xpZW50cyIKPiAgCWRlcGVuZHMgb24gRE1B X0VOR0lORQo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2RtYS9NYWtlZmlsZSBiL2RyaXZlcnMvZG1h L01ha2VmaWxlCj4gaW5kZXggNjEyNmUxYy4uMjQ5OWVkOCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJz L2RtYS9NYWtlZmlsZQo+ICsrKyBiL2RyaXZlcnMvZG1hL01ha2VmaWxlCj4gQEAgLTc1LDYgKzc1 LDcgQEAgb2JqLSQoQ09ORklHX1VOSVBISUVSX01ETUFDKSArPSB1bmlwaGllci1tZG1hYy5vCj4g IG9iai0kKENPTkZJR19YR0VORV9ETUEpICs9IHhnZW5lLWRtYS5vCj4gIG9iai0kKENPTkZJR19a WF9ETUEpICs9IHp4X2RtYS5vCj4gIG9iai0kKENPTkZJR19TVF9GRE1BKSArPSBzdF9mZG1hLm8K PiArb2JqLSQoQ09ORklHX0ZTTF9EUEFBMl9RRE1BKSArPSBmc2wtZHBhYTItcWRtYS8KPiAgCj4g IG9iai15ICs9IG1lZGlhdGVrLwo+ICBvYmoteSArPSBxY29tLwo+IGRpZmYgLS1naXQgYS9kcml2 ZXJzL2RtYS9mc2wtZHBhYTItcWRtYS9LY29uZmlnIGIvZHJpdmVycy9kbWEvZnNsLWRwYWEyLXFk bWEvS2NvbmZpZwo+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMC4uMjU4ZWQ2 Ygo+IC0tLSAvZGV2L251bGwKPiArKysgYi9kcml2ZXJzL2RtYS9mc2wtZHBhYTItcWRtYS9LY29u ZmlnCj4gQEAgLTAsMCArMSw5IEBACj4gK21lbnVjb25maWcgRlNMX0RQQUEyX1FETUEKPiArCXRy aXN0YXRlICJOWFAgRFBBQTIgUURNQSIKPiArCWRlcGVuZHMgb24gQVJNNjQKPiArCWRlcGVuZHMg b24gRlNMX01DX0JVUyAmJiBGU0xfTUNfRFBJTwo+ICsJc2VsZWN0IERNQV9FTkdJTkUKPiArCXNl bGVjdCBETUFfVklSVFVBTF9DSEFOTkVMUwo+ICsJaGVscAo+ICsJICBOWFAgRGF0YSBQYXRoIEFj Y2VsZXJhdGlvbiBBcmNoaXRlY3R1cmUgMiBRRE1BIGRyaXZlciwKPiArCSAgdXNpbmcgdGhlIE5Y UCBNQyBidXMgZHJpdmVyLgo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2RtYS9mc2wtZHBhYTItcWRt YS9NYWtlZmlsZSBiL2RyaXZlcnMvZG1hL2ZzbC1kcGFhMi1xZG1hL01ha2VmaWxlCj4gbmV3IGZp bGUgbW9kZSAxMDA2NDQKPiBpbmRleCAwMDAwMDAwLi5jMWQwMjI2Cj4gLS0tIC9kZXYvbnVsbAo+ ICsrKyBiL2RyaXZlcnMvZG1hL2ZzbC1kcGFhMi1xZG1hL01ha2VmaWxlCj4gQEAgLTAsMCArMSwz IEBACj4gKyMgU1BEWC1MaWNlbnNlLUlkZW50aWZpZXI6IEdQTC0yLjAKPiArIyBNYWtlZmlsZSBm b3IgdGhlIE5YUCBEUEFBMiBxRE1BIGNvbnRyb2xsZXJzCj4gK29iai0kKENPTkZJR19GU0xfRFBB QTJfUURNQSkgKz0gZHBhYTItcWRtYS5vIGRwZG1haS5vCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv ZG1hL2ZzbC1kcGFhMi1xZG1hL2RwYWEyLXFkbWEuYyBiL2RyaXZlcnMvZG1hL2ZzbC1kcGFhMi1x ZG1hL2RwYWEyLXFkbWEuYwo+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMC4u MGNkZGUwZgo+IC0tLSAvZGV2L251bGwKPiArKysgYi9kcml2ZXJzL2RtYS9mc2wtZHBhYTItcWRt YS9kcGFhMi1xZG1hLmMKPiBAQCAtMCwwICsxLDc4MiBAQAo+ICsvLyBTUERYLUxpY2Vuc2UtSWRl bnRpZmllcjogR1BMLTIuMAo+ICsvLyBDb3B5cmlnaHQgMjAxNC0yMDE4IE5YUAo+ICsKPiArLyoK PiArICogQXV0aG9yOiBDaGFuZ21pbmcgSHVhbmcgPGplcnJ5Lmh1YW5nQG54cC5jb20+Cj4gKyAq Cj4gKyAqIERyaXZlciBmb3IgdGhlIE5YUCBRRE1BIGVuZ2luZSB3aXRoIFFNYW4gbW9kZS4KPiAr ICogQ2hhbm5lbCB2aXJ0dWFsaXphdGlvbiBpcyBzdXBwb3J0ZWQgdGhyb3VnaCBlbnF1ZXVpbmcg b2YgRE1BIGpvYnMgdG8sCj4gKyAqIG9yIGRlcXVldWluZyBETUEgam9icyBmcm9tIGRpZmZlcmVu dCB3b3JrIHF1ZXVlcyB3aXRoIFFNYW4gcG9ydGFsLgo+ICsgKiBUaGlzIG1vZHVsZSBjYW4gYmUg Zm91bmQgb24gTlhQIExTMiBTb0NzLgo+ICsgKgo+ICsgKi8KPiArCj4gKyNpbmNsdWRlIDxsaW51 eC9pbml0Lmg+Cj4gKyNpbmNsdWRlIDxsaW51eC9tb2R1bGUuaD4KPiArI2luY2x1ZGUgPGxpbnV4 L2RtYXBvb2wuaD4KPiArI2luY2x1ZGUgPGxpbnV4L29mX2lycS5oPgo+ICsjaW5jbHVkZSA8bGlu dXgvaW9tbXUuaD4KPiArI2luY2x1ZGUgPGxpbnV4L3N5c19zb2MuaD4KPiArI2luY2x1ZGUgPGxp bnV4L2ZzbC9tYy5oPgo+ICsjaW5jbHVkZSA8c29jL2ZzbC9kcGFhMi1pby5oPgo+ICsKPiArI2lu Y2x1ZGUgIi4uL3ZpcnQtZG1hLmgiCj4gKyNpbmNsdWRlICJkcGRtYWlfY21kLmgiCj4gKyNpbmNs dWRlICJkcGRtYWkuaCIKPiArI2luY2x1ZGUgImRwYWEyLXFkbWEuaCIKPiArCj4gK3N0YXRpYyBi b29sIHNtbXVfZGlzYWJsZSA9IHRydWU7Cj4gKwo+ICtzdGF0aWMgc3RydWN0IGRwYWEyX3FkbWFf Y2hhbiAqdG9fZHBhYTJfcWRtYV9jaGFuKHN0cnVjdCBkbWFfY2hhbiAqY2hhbikKPiArewo+ICsJ cmV0dXJuIGNvbnRhaW5lcl9vZihjaGFuLCBzdHJ1Y3QgZHBhYTJfcWRtYV9jaGFuLCB2Y2hhbi5j aGFuKTsKPiArfQo+ICsKPiArc3RhdGljIHN0cnVjdCBkcGFhMl9xZG1hX2NvbXAgKnRvX2ZzbF9x ZG1hX2NvbXAoc3RydWN0IHZpcnRfZG1hX2Rlc2MgKnZkKQo+ICt7Cj4gKwlyZXR1cm4gY29udGFp bmVyX29mKHZkLCBzdHJ1Y3QgZHBhYTJfcWRtYV9jb21wLCB2ZGVzYyk7Cj4gK30KPiArCj4gK3N0 YXRpYyBpbnQgZHBhYTJfcWRtYV9hbGxvY19jaGFuX3Jlc291cmNlcyhzdHJ1Y3QgZG1hX2NoYW4g KmNoYW4pCj4gK3sKPiArCXN0cnVjdCBkcGFhMl9xZG1hX2NoYW4gKmRwYWEyX2NoYW4gPSB0b19k cGFhMl9xZG1hX2NoYW4oY2hhbik7Cj4gKwlzdHJ1Y3QgZHBhYTJfcWRtYV9lbmdpbmUgKmRwYWEy X3FkbWEgPSBkcGFhMl9jaGFuLT5xZG1hOwo+ICsJc3RydWN0IGRldmljZSAqZGV2ID0gJmRwYWEy X3FkbWEtPnByaXYtPmRwZG1haV9kZXYtPmRldjsKPiArCj4gKwlkcGFhMl9jaGFuLT5mZF9wb29s ID0gZG1hX3Bvb2xfY3JlYXRlKCJmZF9wb29sIiwgZGV2LAo+ICsJCQkJCSAgICAgIEZEX1BPT0xf U0laRSwgMzIsIDApOwo+ICsJaWYgKCFkcGFhMl9jaGFuLT5mZF9wb29sKQo+ICsJCXJldHVybiAt RU5PTUVNOwo+ICsKPiArCXJldHVybiBkcGFhMl9xZG1hLT5kZXNjX2FsbG9jYXRlZCsrOwo+ICt9 Cj4gKwo+ICtzdGF0aWMgdm9pZCBkcGFhMl9xZG1hX2ZyZWVfY2hhbl9yZXNvdXJjZXMoc3RydWN0 IGRtYV9jaGFuICpjaGFuKQo+ICt7Cj4gKwlzdHJ1Y3QgZHBhYTJfcWRtYV9jaGFuICpkcGFhMl9j aGFuID0gdG9fZHBhYTJfcWRtYV9jaGFuKGNoYW4pOwo+ICsJc3RydWN0IGRwYWEyX3FkbWFfZW5n aW5lICpkcGFhMl9xZG1hID0gZHBhYTJfY2hhbi0+cWRtYTsKPiArCXVuc2lnbmVkIGxvbmcgZmxh Z3M7Cj4gKwo+ICsJTElTVF9IRUFEKGhlYWQpOwo+ICsKPiArCXNwaW5fbG9ja19pcnFzYXZlKCZk cGFhMl9jaGFuLT52Y2hhbi5sb2NrLCBmbGFncyk7Cj4gKwl2Y2hhbl9nZXRfYWxsX2Rlc2NyaXB0 b3JzKCZkcGFhMl9jaGFuLT52Y2hhbiwgJmhlYWQpOwo+ICsJc3Bpbl91bmxvY2tfaXJxcmVzdG9y ZSgmZHBhYTJfY2hhbi0+dmNoYW4ubG9jaywgZmxhZ3MpOwo+ICsKPiArCXZjaGFuX2RtYV9kZXNj X2ZyZWVfbGlzdCgmZHBhYTJfY2hhbi0+dmNoYW4sICZoZWFkKTsKPiArCj4gKwlkcGFhMl9kcGRt YWlfZnJlZV9jb21wKGRwYWEyX2NoYW4sICZkcGFhMl9jaGFuLT5jb21wX3VzZWQpOwo+ICsJZHBh YTJfZHBkbWFpX2ZyZWVfY29tcChkcGFhMl9jaGFuLCAmZHBhYTJfY2hhbi0+Y29tcF9mcmVlKTsK PiArCj4gKwlkbWFfcG9vbF9kZXN0cm95KGRwYWEyX2NoYW4tPmZkX3Bvb2wpOwo+ICsJZHBhYTJf cWRtYS0+ZGVzY19hbGxvY2F0ZWQtLTsKPiArfQo+ICsKPiArLyoKPiArICogUmVxdWVzdCBhIGNv bW1hbmQgZGVzY3JpcHRvciBmb3IgZW5xdWV1ZS4KPiArICovCj4gK3N0YXRpYyBzdHJ1Y3QgZHBh YTJfcWRtYV9jb21wICoKPiArZHBhYTJfcWRtYV9yZXF1ZXN0X2Rlc2Moc3RydWN0IGRwYWEyX3Fk bWFfY2hhbiAqZHBhYTJfY2hhbikKPiArewo+ICsJc3RydWN0IGRwYWEyX3FkbWFfY29tcCAqY29t cF90ZW1wID0gTlVMTDsKPiArCXVuc2lnbmVkIGxvbmcgZmxhZ3M7Cj4gKwo+ICsJc3Bpbl9sb2Nr X2lycXNhdmUoJmRwYWEyX2NoYW4tPnF1ZXVlX2xvY2ssIGZsYWdzKTsKPiArCWlmIChsaXN0X2Vt cHR5KCZkcGFhMl9jaGFuLT5jb21wX2ZyZWUpKSB7Cj4gKwkJc3Bpbl91bmxvY2tfaXJxcmVzdG9y ZSgmZHBhYTJfY2hhbi0+cXVldWVfbG9jaywgZmxhZ3MpOwo+ICsJCWNvbXBfdGVtcCA9IGt6YWxs b2Moc2l6ZW9mKCpjb21wX3RlbXApLCBHRlBfS0VSTkVMKTsKCkdGUF9OT1dBSVQ/Cgo+ICsJCWlm ICghY29tcF90ZW1wKQo+ICsJCQlnb3RvIGVycjsKPiArCQljb21wX3RlbXAtPmZkX3ZpcnRfYWRk ciA9Cj4gKwkJCWRtYV9wb29sX2FsbG9jKGRwYWEyX2NoYW4tPmZkX3Bvb2wsIEdGUF9OT1dBSVQs Cj4gKwkJCQkgICAgICAgJmNvbXBfdGVtcC0+ZmRfYnVzX2FkZHIpOwo+ICsJCWlmICghY29tcF90 ZW1wLT5mZF92aXJ0X2FkZHIpCgplcnIgaGFuZGxpbmcgc2VlbXMgaW5jb3JyZWN0LCB5b3UgZG9u dCBjbGVhbiB1cCwgY2FsbGVyIGRvZXNudCBjaGVjawpyZXR1cm4hCgo+ICsJCQlnb3RvIGVycjsK PiArCj4gKwkJY29tcF90ZW1wLT5mbF92aXJ0X2FkZHIgPQo+ICsJCQkodm9pZCAqKSgoc3RydWN0 IGRwYWEyX2ZkICopCj4gKwkJCQljb21wX3RlbXAtPmZkX3ZpcnRfYWRkciArIDEpOwoKY2FzdHMg YW5kIHBvaW50ZXIgbWF0aCwgd2hhdCBjb3VsZCBnbyB3cm9uZyEhIFRoaXMgZG9lc250IHNtZWxs IHJpZ2h0IQoKPiArCQljb21wX3RlbXAtPmZsX2J1c19hZGRyID0gY29tcF90ZW1wLT5mZF9idXNf YWRkciArCj4gKwkJCQkJc2l6ZW9mKHN0cnVjdCBkcGFhMl9mZCk7Cgp3aHkgbm90IHVzZSBmbF92 aXJ0X2FkZHIgYW5kIGdldCB0aGUgYnVzX2FkZHJlc3M/Cgo+ICsJCWNvbXBfdGVtcC0+ZGVzY192 aXJ0X2FkZHIgPQo+ICsJCQkodm9pZCAqKSgoc3RydWN0IGRwYWEyX2ZsX2VudHJ5ICopCj4gKwkJ CQljb21wX3RlbXAtPmZsX3ZpcnRfYWRkciArIDMpOwo+ICsJCWNvbXBfdGVtcC0+ZGVzY19idXNf YWRkciA9IGNvbXBfdGVtcC0+ZmxfYnVzX2FkZHIgKwo+ICsJCQkJc2l6ZW9mKHN0cnVjdCBkcGFh Ml9mbF9lbnRyeSkgKiAzOwoKcG9pbnRlciBtYXRoIGluIHRoZSB0d28gY2FsbHMgZG9lc250IG1h dGNoIGFuZCBhcyBJIHNhaWQgZG9lc250IGxvb2sKZ29vZC4uLgoKPiArCj4gKwkJY29tcF90ZW1w LT5xY2hhbiA9IGRwYWEyX2NoYW47Cj4gKwkJcmV0dXJuIGNvbXBfdGVtcDsKPiArCX0KPiArCWNv bXBfdGVtcCA9IGxpc3RfZmlyc3RfZW50cnkoJmRwYWEyX2NoYW4tPmNvbXBfZnJlZSwKPiArCQkJ CSAgICAgc3RydWN0IGRwYWEyX3FkbWFfY29tcCwgbGlzdCk7Cj4gKwlsaXN0X2RlbCgmY29tcF90 ZW1wLT5saXN0KTsKPiArCXNwaW5fdW5sb2NrX2lycXJlc3RvcmUoJmRwYWEyX2NoYW4tPnF1ZXVl X2xvY2ssIGZsYWdzKTsKPiArCj4gKwljb21wX3RlbXAtPnFjaGFuID0gZHBhYTJfY2hhbjsKPiAr ZXJyOgo+ICsJcmV0dXJuIGNvbXBfdGVtcDsKPiArfQo+ICsKPiArc3RhdGljIHZvaWQKPiArZHBh YTJfcWRtYV9wb3B1bGF0ZV9mZCh1MzIgZm9ybWF0LCBzdHJ1Y3QgZHBhYTJfcWRtYV9jb21wICpk cGFhMl9jb21wKQo+ICt7Cj4gKwlzdHJ1Y3QgZHBhYTJfZmQgKmZkOwo+ICsKPiArCWZkID0gKHN0 cnVjdCBkcGFhMl9mZCAqKWRwYWEyX2NvbXAtPmZkX3ZpcnRfYWRkcjsKCndoYXRzIHdpdGggdGhl IGNhc3RzISB5b3Ugc2VlbSB0byBsaWtlIHRoZW0hIFlvdSBhcmUgY2FzdGluZyBhd2F5IGZyb20K dm9pZCEKCj4gKwltZW1zZXQoZmQsIDAsIHNpemVvZihzdHJ1Y3QgZHBhYTJfZmQpKTsKPiArCj4g KwkvKiBmZCBwb3B1bGF0ZWQgKi8KPiArCWRwYWEyX2ZkX3NldF9hZGRyKGZkLCBkcGFhMl9jb21w LT5mbF9idXNfYWRkcik7Cj4gKwkvKiBCeXBhc3MgbWVtb3J5IHRyYW5zbGF0aW9uLCBGcmFtZSBs aXN0IGZvcm1hdCwgc2hvcnQgbGVuZ3RoIGRpc2FibGUgKi8KPiArCS8qIHdlIG5lZWQgdG8gZGlz YWJsZSBCTVQgaWYgZnNsLW1jIHVzZSBpb3ZhIGFkZHIgKi8KPiArCWlmIChzbW11X2Rpc2FibGUp Cj4gKwkJZHBhYTJfZmRfc2V0X2JwaWQoZmQsIFFNQU5fRkRfQk1UX0VOQUJMRSk7Cj4gKwlkcGFh Ml9mZF9zZXRfZm9ybWF0KGZkLCBRTUFOX0ZEX0ZNVF9FTkFCTEUgfCBRTUFOX0ZEX1NMX0RJU0FC TEUpOwo+ICsKPiArCWRwYWEyX2ZkX3NldF9mcmMoZmQsIGZvcm1hdCB8IFFETUFfU0VSX0NUWCk7 Cj4gK30KPiArCj4gKy8qIGZpcnN0IGZyYW1lIGxpc3QgZm9yIGRlc2NyaXB0b3IgYnVmZmVyICov Cj4gK3N0YXRpYyB2b2lkCj4gK2RwYWEyX3FkbWFfcG9wdWxhdGVfZmlyc3RfZnJhbWVsKHN0cnVj dCBkcGFhMl9mbF9lbnRyeSAqZl9saXN0LAo+ICsJCQkJIHN0cnVjdCBkcGFhMl9xZG1hX2NvbXAg KmRwYWEyX2NvbXAsCj4gKwkJCQkgYm9vbCB3cnRfY2hhbmdlZCkKPiArewo+ICsJc3RydWN0IGRw YWEyX3FkbWFfc2RfZCAqc2RkOwo+ICsKPiArCXNkZCA9IChzdHJ1Y3QgZHBhYTJfcWRtYV9zZF9k ICopZHBhYTJfY29tcC0+ZGVzY192aXJ0X2FkZHI7CgphZ2FpbgoKPiArCW1lbXNldChzZGQsIDAs IDIgKiAoc2l6ZW9mKCpzZGQpKSk7Cj4gKwo+ICsJLyogc291cmNlIGRlc2NyaXB0b3IgQ01EICov Cj4gKwlzZGQtPmNtZCA9IGNwdV90b19sZTMyKFFETUFfU0RfQ01EX1JEVFRZUEVfQ09IRVJFTlQp Owo+ICsJc2RkKys7Cj4gKwo+ICsJLyogZGVzdCBkZXNjcmlwdG9yIENNRCAqLwo+ICsJaWYgKHdy dF9jaGFuZ2VkKQo+ICsJCXNkZC0+Y21kID0gY3B1X3RvX2xlMzIoTFgyMTYwX1FETUFfRERfQ01E X1dSVFRZUEVfQ09IRVJFTlQpOwo+ICsJZWxzZQo+ICsJCXNkZC0+Y21kID0gY3B1X3RvX2xlMzIo UURNQV9ERF9DTURfV1JUVFlQRV9DT0hFUkVOVCk7Cj4gKwo+ICsJbWVtc2V0KGZfbGlzdCwgMCwg c2l6ZW9mKHN0cnVjdCBkcGFhMl9mbF9lbnRyeSkpOwo+ICsKPiArCS8qIGZpcnN0IGZyYW1lIGxp c3QgdG8gc291cmNlIGRlc2NyaXB0b3IgKi8KPiArCWRwYWEyX2ZsX3NldF9hZGRyKGZfbGlzdCwg ZHBhYTJfY29tcC0+ZGVzY19idXNfYWRkcik7Cj4gKwlkcGFhMl9mbF9zZXRfbGVuKGZfbGlzdCwg MHgyMCk7Cj4gKwlkcGFhMl9mbF9zZXRfZm9ybWF0KGZfbGlzdCwgUURNQV9GTF9GTVRfU0JGIHwg UURNQV9GTF9TTF9MT05HKTsKPiArCj4gKwkvKiBieXBhc3MgbWVtb3J5IHRyYW5zbGF0aW9uICov Cj4gKwlpZiAoc21tdV9kaXNhYmxlKQo+ICsJCWZfbGlzdC0+YnBpZCA9IGNwdV90b19sZTE2KFFE TUFfRkxfQk1UX0VOQUJMRSk7Cj4gK30KPiArCj4gKy8qIHNvdXJjZSBhbmQgZGVzdGluYXRpb24g ZnJhbWUgbGlzdCAqLwo+ICtzdGF0aWMgdm9pZAo+ICtkcGFhMl9xZG1hX3BvcHVsYXRlX2ZyYW1l cyhzdHJ1Y3QgZHBhYTJfZmxfZW50cnkgKmZfbGlzdCwKPiArCQkJICAgZG1hX2FkZHJfdCBkc3Qs IGRtYV9hZGRyX3Qgc3JjLAo+ICsJCQkgICBzaXplX3QgbGVuLCB1aW50OF90IGZtdCkKPiArewo+ ICsJLyogc291cmNlIGZyYW1lIGxpc3QgdG8gc291cmNlIGJ1ZmZlciAqLwo+ICsJbWVtc2V0KGZf bGlzdCwgMCwgc2l6ZW9mKHN0cnVjdCBkcGFhMl9mbF9lbnRyeSkpOwo+ICsKPiArCWRwYWEyX2Zs X3NldF9hZGRyKGZfbGlzdCwgc3JjKTsKPiArCWRwYWEyX2ZsX3NldF9sZW4oZl9saXN0LCBsZW4p Owo+ICsKPiArCS8qIHNpbmdsZSBidWZmZXIgZnJhbWUgb3Igc2NhdHRlciBnYXRoZXIgZnJhbWUg Ki8KPiArCWRwYWEyX2ZsX3NldF9mb3JtYXQoZl9saXN0LCAoZm10IHwgUURNQV9GTF9TTF9MT05H KSk7Cj4gKwo+ICsJLyogYnlwYXNzIG1lbW9yeSB0cmFuc2xhdGlvbiAqLwo+ICsJaWYgKHNtbXVf ZGlzYWJsZSkKPiArCQlmX2xpc3QtPmJwaWQgPSBjcHVfdG9fbGUxNihRRE1BX0ZMX0JNVF9FTkFC TEUpOwo+ICsKPiArCWZfbGlzdCsrOwo+ICsKPiArCS8qIGRlc3RpbmF0aW9uIGZyYW1lIGxpc3Qg dG8gZGVzdGluYXRpb24gYnVmZmVyICovCj4gKwltZW1zZXQoZl9saXN0LCAwLCBzaXplb2Yoc3Ry dWN0IGRwYWEyX2ZsX2VudHJ5KSk7Cj4gKwo+ICsJZHBhYTJfZmxfc2V0X2FkZHIoZl9saXN0LCBk c3QpOwo+ICsJZHBhYTJfZmxfc2V0X2xlbihmX2xpc3QsIGxlbik7Cj4gKwlkcGFhMl9mbF9zZXRf Zm9ybWF0KGZfbGlzdCwgKGZtdCB8IFFETUFfRkxfU0xfTE9ORykpOwo+ICsJLyogc2luZ2xlIGJ1 ZmZlciBmcmFtZSBvciBzY2F0dGVyIGdhdGhlciBmcmFtZSAqLwo+ICsJZHBhYTJfZmxfc2V0X2Zp bmFsKGZfbGlzdCwgUURNQV9GTF9GKTsKPiArCS8qIGJ5cGFzcyBtZW1vcnkgdHJhbnNsYXRpb24g Ki8KPiArCWlmIChzbW11X2Rpc2FibGUpCj4gKwkJZl9saXN0LT5icGlkID0gY3B1X3RvX2xlMTYo UURNQV9GTF9CTVRfRU5BQkxFKTsKPiArfQo+ICsKPiArc3RhdGljIHN0cnVjdCBkbWFfYXN5bmNf dHhfZGVzY3JpcHRvcgo+ICsqZHBhYTJfcWRtYV9wcmVwX21lbWNweShzdHJ1Y3QgZG1hX2NoYW4g KmNoYW4sIGRtYV9hZGRyX3QgZHN0LAo+ICsJCQlkbWFfYWRkcl90IHNyYywgc2l6ZV90IGxlbiwg dWxvbmcgZmxhZ3MpCj4gK3sKPiArCXN0cnVjdCBkcGFhMl9xZG1hX2NoYW4gKmRwYWEyX2NoYW4g PSB0b19kcGFhMl9xZG1hX2NoYW4oY2hhbik7Cj4gKwlzdHJ1Y3QgZHBhYTJfcWRtYV9lbmdpbmUg KmRwYWEyX3FkbWE7Cj4gKwlzdHJ1Y3QgZHBhYTJfcWRtYV9jb21wICpkcGFhMl9jb21wOwo+ICsJ c3RydWN0IGRwYWEyX2ZsX2VudHJ5ICpmX2xpc3Q7Cj4gKwlib29sIHdydF9jaGFuZ2VkOwo+ICsJ dTMyIGZvcm1hdDsKPiArCj4gKwlkcGFhMl9xZG1hID0gZHBhYTJfY2hhbi0+cWRtYTsKPiArCWRw YWEyX2NvbXAgPSBkcGFhMl9xZG1hX3JlcXVlc3RfZGVzYyhkcGFhMl9jaGFuKTsKPiArCXdydF9j aGFuZ2VkID0gKGJvb2wpZHBhYTJfcWRtYS0+cWRtYV93cnR5cGVfZml4dXA7Cj4gKwo+ICsjaWZk ZWYgTE9OR19GT1JNQVQKCiBjb21waWxlIGZsYWcgYW5kIGRlZmluZSwgc28gZWxzZSBwYXJ0IGlz IGRlYWQgY29kZT8/Cgo+ICsJZm9ybWF0ID0gUURNQV9GRF9MT05HX0ZPUk1BVDsKPiArI2Vsc2UK PiArCWZvcm1hdCA9IFFETUFfRkRfU0hPUlRfRk9STUFUOwo+ICsjZW5kaWYKPiArCS8qIHBvcHVs YXRlIEZyYW1lIGRlc2NyaXB0b3IgKi8KPiArCWRwYWEyX3FkbWFfcG9wdWxhdGVfZmQoZm9ybWF0 LCBkcGFhMl9jb21wKTsKPiArCj4gKwlmX2xpc3QgPSAoc3RydWN0IGRwYWEyX2ZsX2VudHJ5ICop ZHBhYTJfY29tcC0+ZmxfdmlydF9hZGRyOwo+ICsKPiArI2lmZGVmIExPTkdfRk9STUFUCj4gKwkv KiBmaXJzdCBmcmFtZSBsaXN0IGZvciBkZXNjcmlwdG9yIGJ1ZmZlciAobG9nbiBmb3JtYXQpICov Cj4gKwlkcGFhMl9xZG1hX3BvcHVsYXRlX2ZpcnN0X2ZyYW1lbChmX2xpc3QsIGRwYWEyX2NvbXAs IHdydF9jaGFuZ2VkKTsKPiArCj4gKwlmX2xpc3QrKzsKPiArI2VuZGlmCj4gKwo+ICsJZHBhYTJf cWRtYV9wb3B1bGF0ZV9mcmFtZXMoZl9saXN0LCBkc3QsIHNyYywgbGVuLCBRRE1BX0ZMX0ZNVF9T QkYpOwo+ICsKPiArCXJldHVybiB2Y2hhbl90eF9wcmVwKCZkcGFhMl9jaGFuLT52Y2hhbiwgJmRw YWEyX2NvbXAtPnZkZXNjLCBmbGFncyk7Cj4gK30KPiArCj4gK3N0YXRpYyBlbnVtCj4gK2RtYV9z dGF0dXMgZHBhYTJfcWRtYV90eF9zdGF0dXMoc3RydWN0IGRtYV9jaGFuICpjaGFuLAo+ICsJCQkJ ZG1hX2Nvb2tpZV90IGNvb2tpZSwKPiArCQkJCXN0cnVjdCBkbWFfdHhfc3RhdGUgKnR4c3RhdGUp Cj4gK3sKPiArCXJldHVybiBkbWFfY29va2llX3N0YXR1cyhjaGFuLCBjb29raWUsIHR4c3RhdGUp Owo+ICt9Cj4gKwo+ICtzdGF0aWMgdm9pZCBkcGFhMl9xZG1hX2lzc3VlX3BlbmRpbmcoc3RydWN0 IGRtYV9jaGFuICpjaGFuKQo+ICt7Cj4gKwlzdHJ1Y3QgZHBhYTJfcWRtYV9jaGFuICpkcGFhMl9j aGFuID0gdG9fZHBhYTJfcWRtYV9jaGFuKGNoYW4pOwo+ICsJc3RydWN0IGRwYWEyX3FkbWFfZW5n aW5lICpkcGFhMl9xZG1hID0gZHBhYTJfY2hhbi0+cWRtYTsKPiArCXN0cnVjdCBkcGFhMl9xZG1h X3ByaXYgKnByaXYgPSBkcGFhMl9xZG1hLT5wcml2Owo+ICsJc3RydWN0IGRwYWEyX3FkbWFfY29t cCAqZHBhYTJfY29tcDsKPiArCXN0cnVjdCB2aXJ0X2RtYV9kZXNjICp2ZGVzYzsKPiArCXN0cnVj dCBkcGFhMl9mZCAqZmQ7Cj4gKwl1bnNpZ25lZCBsb25nIGZsYWdzOwo+ICsJaW50IGVycjsKPiAr Cj4gKwlzcGluX2xvY2tfaXJxc2F2ZSgmZHBhYTJfY2hhbi0+cXVldWVfbG9jaywgZmxhZ3MpOwo+ ICsJc3Bpbl9sb2NrKCZkcGFhMl9jaGFuLT52Y2hhbi5sb2NrKTsKPiArCWlmICh2Y2hhbl9pc3N1 ZV9wZW5kaW5nKCZkcGFhMl9jaGFuLT52Y2hhbikpIHsKPiArCQl2ZGVzYyA9IHZjaGFuX25leHRf ZGVzYygmZHBhYTJfY2hhbi0+dmNoYW4pOwo+ICsJCWlmICghdmRlc2MpCj4gKwkJCWdvdG8gZXJy X2VucXVldWU7Cj4gKwkJZHBhYTJfY29tcCA9IHRvX2ZzbF9xZG1hX2NvbXAodmRlc2MpOwo+ICsK PiArCQlmZCA9IChzdHJ1Y3QgZHBhYTJfZmQgKilkcGFhMl9jb21wLT5mZF92aXJ0X2FkZHI7Cj4g Kwo+ICsJCWxpc3RfZGVsKCZ2ZGVzYy0+bm9kZSk7Cj4gKwkJbGlzdF9hZGRfdGFpbCgmZHBhYTJf Y29tcC0+bGlzdCwgJmRwYWEyX2NoYW4tPmNvbXBfdXNlZCk7Cgp3aGF0IGRvZXMgdGhpcyBsaXN0 IGRvPwoKPiArCj4gKwkJLyogVE9CTzogcHJpb3JpdHkgaGFyZC1jb2RlZCB0byB6ZXJvICovCgpZ b3UgbWVhbiBUT0RPPwoKPiArCQllcnIgPSBkcGFhMl9pb19zZXJ2aWNlX2VucXVldWVfZnEoTlVM TCwKPiArCQkJCXByaXYtPnR4X3F1ZXVlX2F0dHJbMF0uZnFpZCwgZmQpOwo+ICsJCWlmIChlcnIp IHsKPiArCQkJbGlzdF9kZWwoJmRwYWEyX2NvbXAtPmxpc3QpOwo+ICsJCQlsaXN0X2FkZF90YWls KCZkcGFhMl9jb21wLT5saXN0LAo+ICsJCQkJICAgICAgJmRwYWEyX2NoYW4tPmNvbXBfZnJlZSk7 Cj4gKwkJfQo+ICsJfQo+ICtlcnJfZW5xdWV1ZToKPiArCXNwaW5fdW5sb2NrKCZkcGFhMl9jaGFu LT52Y2hhbi5sb2NrKTsKPiArCXNwaW5fdW5sb2NrX2lycXJlc3RvcmUoJmRwYWEyX2NoYW4tPnF1 ZXVlX2xvY2ssIGZsYWdzKTsKPiArfQo+ICsKPiArc3RhdGljIGludCBfX2NvbGQgZHBhYTJfcWRt YV9zZXR1cChzdHJ1Y3QgZnNsX21jX2RldmljZSAqbHNfZGV2KQo+ICt7Cj4gKwlzdHJ1Y3QgZHBh YTJfcWRtYV9wcml2X3Blcl9wcmlvICpwcHJpdjsKPiArCXN0cnVjdCBkZXZpY2UgKmRldiA9ICZs c19kZXYtPmRldjsKPiArCXN0cnVjdCBkcGFhMl9xZG1hX3ByaXYgKnByaXY7Cj4gKwl1OCBwcmlv X2RlZiA9IERQRE1BSV9QUklPX05VTTsKPiArCWludCBlcnI7Cj4gKwlpbnQgaTsKPiArCj4gKwlw cml2ID0gZGV2X2dldF9kcnZkYXRhKGRldik7Cj4gKwo+ICsJcHJpdi0+ZGV2ID0gZGV2Owo+ICsJ cHJpdi0+ZHBxZG1hX2lkID0gbHNfZGV2LT5vYmpfZGVzYy5pZDsKPiArCj4gKwkvKkdldCB0aGUg aGFuZGxlIGZvciB0aGUgRFBETUFJIHRoaXMgaW50ZXJmYWNlIGlzIGFzc29jaWF0ZSB3aXRoICov CgpQbGVhc2UgcnVuIGNoZWNrcGF0Y2gsIGl0IHNob3VsZCBoYXZlIHRvbGQgeW91IHRoYXQgeW91 IG5lZWQgc3BhY2UgYWZ0ZXIKY29tbWVudCBtYXJrZXIgLyogZm9vLi4uCgo+ICsJZXJyID0gZHBk bWFpX29wZW4ocHJpdi0+bWNfaW8sIDAsIHByaXYtPmRwcWRtYV9pZCwgJmxzX2Rldi0+bWNfaGFu ZGxlKTsKPiArCWlmIChlcnIpIHsKPiArCQlkZXZfZXJyKGRldiwgImRwZG1haV9vcGVuKCkgZmFp bGVkXG4iKTsKPiArCQlyZXR1cm4gZXJyOwo+ICsJfQo+ICsJZGV2X2luZm8oZGV2LCAiT3BlbmVk IGRwZG1haSBvYmplY3Qgc3VjY2Vzc2Z1bGx5XG4iKTsKPiArCj4gKwllcnIgPSBkcGRtYWlfZ2V0 X2F0dHJpYnV0ZXMocHJpdi0+bWNfaW8sIDAsIGxzX2Rldi0+bWNfaGFuZGxlLAo+ICsJCQkJICAg ICZwcml2LT5kcGRtYWlfYXR0cik7Cj4gKwlpZiAoZXJyKSB7Cj4gKwkJZGV2X2VycihkZXYsICJk cGRtYWlfZ2V0X2F0dHJpYnV0ZXMoKSBmYWlsZWRcbiIpOwo+ICsJCXJldHVybiBlcnI7CgpzbyB5 b3UgZG9udCBjbG9zZSB3aGF0IHlvdSBvcGVuZWQgaW4gZHBkbWFpX29wZW4oKSBQbGVhc2UgZ2l2 ZSBhIHNlcmlvdXMKdGhvdWdodCBhbmQgdGVzdGluZyB0byB0aGlzIGRyaXZlcgoKPiArCX0KPiAr Cj4gKwlpZiAocHJpdi0+ZHBkbWFpX2F0dHIudmVyc2lvbi5tYWpvciA+IERQRE1BSV9WRVJfTUFK T1IpIHsKPiArCQlkZXZfZXJyKGRldiwgIkRQRE1BSSBtYWpvciB2ZXJzaW9uIG1pc21hdGNoXG4i Cj4gKwkJCSAgICAgIkZvdW5kICV1LiV1LCBzdXBwb3J0ZWQgdmVyc2lvbiBpcyAldS4ldVxuIiwK PiArCQkJCXByaXYtPmRwZG1haV9hdHRyLnZlcnNpb24ubWFqb3IsCj4gKwkJCQlwcml2LT5kcGRt YWlfYXR0ci52ZXJzaW9uLm1pbm9yLAo+ICsJCQkJRFBETUFJX1ZFUl9NQUpPUiwgRFBETUFJX1ZF Ul9NSU5PUik7Cj4gKwl9Cj4gKwo+ICsJaWYgKHByaXYtPmRwZG1haV9hdHRyLnZlcnNpb24ubWlu b3IgPiBEUERNQUlfVkVSX01JTk9SKSB7Cj4gKwkJZGV2X2VycihkZXYsICJEUERNQUkgbWlub3Ig dmVyc2lvbiBtaXNtYXRjaFxuIgo+ICsJCQkgICAgICJGb3VuZCAldS4ldSwgc3VwcG9ydGVkIHZl cnNpb24gaXMgJXUuJXVcbiIsCj4gKwkJCQlwcml2LT5kcGRtYWlfYXR0ci52ZXJzaW9uLm1ham9y LAo+ICsJCQkJcHJpdi0+ZHBkbWFpX2F0dHIudmVyc2lvbi5taW5vciwKPiArCQkJCURQRE1BSV9W RVJfTUFKT1IsIERQRE1BSV9WRVJfTUlOT1IpOwoKd2hhdCBpcyB0aGUgaW1wbGljYXRpb24gb2Yg dGhlc2UgZXJyb3IsIHdoeSBub3QgYmFpbCBvdXQgb24gdGhlc2U/Cgo+ICsJfQo+ICsKPiArCXBy aXYtPm51bV9wYWlycyA9IG1pbihwcml2LT5kcGRtYWlfYXR0ci5udW1fb2ZfcHJpb3JpdGllcywg cHJpb19kZWYpOwo+ICsJcHByaXYgPSBrY2FsbG9jKHByaXYtPm51bV9wYWlycywgc2l6ZW9mKCpw cHJpdiksIEdGUF9LRVJORUwpOwoKd2hhdCBpcyB0aGUgY29udGV4dCBvZiB0aGUgZm4sIHNsZWVw eSwgYXRvbWljPwoKPiArCWlmICghcHByaXYpIHsKPiArCQlkZXZfZXJyKGRldiwgImt6YWxsb2Mg Zm9yIHBwcml2IGZhaWxlZFxuIik7Cgp0aGlzIG5lZWQgbm90IGJlIGxvZ2dlZCwgY29yZSB3aWxs IGRvIHNvCgo+ICsJCXJldHVybiAtMTsKCnJlYWxseSAtMT8/CgpJIHRoaW5rIHRoaXMgZHJpdmVy IG5lZWRzIG1vcmUgd29yaywgcGxlYXNlIGZpeCB0aGVzZSBpc3N1ZXMgaW4gdGhlCmNvbW1lbnRz IGFib3ZlIGFuZCBhbHNvIHNlZSBpbiByZXN0IG9mIHRoZSBjb2RlCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, T_DKIMWL_WL_HIGH,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E385C43219 for ; Mon, 29 Apr 2019 05:32:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D28F72147A for ; Mon, 29 Apr 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1556515929; bh=R7yH6SCc2CdS819L2jITRdSb1HXfUxdjdXlqVBUtlGk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TEi4Q2ZS8heyrnZg0UuRD9dV4snqtWJyavXuT15OE0+SwGz4fgEKthIH71p/GTEa9 uAhU6T3i4Ikp7OrnZ6uK5vE0/jo7t3zttmW4YYaPWoBcIlmxFcLzo4JplqFQA19gHt TmprPVEUAr+tp94oEAkGORX/SjenW7CbaG3F4FSA= Date: Mon, 29 Apr 2019 11:02:03 +0530 From: Vinod Koul To: Peng Ma Cc: dan.j.williams@intel.com, leoyang.li@nxp.com, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Subject: Re: [V3 2/2] dmaengine: fsl-dpaa2-qdma: Add NXP dpaa2 qDMA controller driver for Layerscape SoCs Message-ID: <20190429053203.GF3845@vkoul-mobl.Dlink> References: <20190409072212.15860-1-peng.ma@nxp.com> <20190409072212.15860-2-peng.ma@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline In-Reply-To: <20190409072212.15860-2-peng.ma@nxp.com> User-Agent: Mutt/1.11.3 (2019-02-01) Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Message-ID: <20190429053203.HKwpXoP0EKn5k64A4h-_1JbsGHMLUk6b9sw19RN5or4@z> On 09-04-19, 15:22, Peng Ma wrote: > DPPA2(Data Path Acceleration Architecture 2) qDMA > The qDMA supports channel virtualization by allowing DMA jobs to be enqueued > into different frame queues. Core can initiate a DMA transaction by preparing > a frame descriptor(FD) for each DMA job and enqueuing this job to a frame queue. > through a hardware portal. The qDMA prefetches DMA jobs from the frame queues. > It then schedules and dispatches to internal DMA hardware engines, which > generate read and write requests. Both qDMA source data and destination data can > be either contiguous or non-contiguous using one or more scatter/gather tables. > The qDMA supports global bandwidth flow control where all DMA transactions are > stalled if the bandwidth threshold has been reached. Also supported are > transaction based read throttling. > > Add NXP dppa2 qDMA to support some of Layerscape SoCs. > such as: LS1088A, LS208xA, LX2, etc. > > Signed-off-by: Peng Ma > --- > changed for v3: > - Add depends on arm64 for dpaa2 qdma driver > - The dpaa2_io_service_[de]register functions have a new parameter > So update all calls to some functions > > drivers/dma/Kconfig | 2 + > drivers/dma/Makefile | 1 + > drivers/dma/fsl-dpaa2-qdma/Kconfig | 9 + > drivers/dma/fsl-dpaa2-qdma/Makefile | 3 + > drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c | 782 +++++++++++++++++++++++++++++++ > drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.h | 152 ++++++ > 6 files changed, 949 insertions(+), 0 deletions(-) > create mode 100644 drivers/dma/fsl-dpaa2-qdma/Kconfig > create mode 100644 drivers/dma/fsl-dpaa2-qdma/Makefile > create mode 100644 drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c > create mode 100644 drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.h > > diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig > index eaf78f4..08aae01 100644 > --- a/drivers/dma/Kconfig > +++ b/drivers/dma/Kconfig > @@ -671,6 +671,8 @@ source "drivers/dma/sh/Kconfig" > > source "drivers/dma/ti/Kconfig" > > +source "drivers/dma/fsl-dpaa2-qdma/Kconfig" > + > # clients > comment "DMA Clients" > depends on DMA_ENGINE > diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile > index 6126e1c..2499ed8 100644 > --- a/drivers/dma/Makefile > +++ b/drivers/dma/Makefile > @@ -75,6 +75,7 @@ obj-$(CONFIG_UNIPHIER_MDMAC) += uniphier-mdmac.o > obj-$(CONFIG_XGENE_DMA) += xgene-dma.o > obj-$(CONFIG_ZX_DMA) += zx_dma.o > obj-$(CONFIG_ST_FDMA) += st_fdma.o > +obj-$(CONFIG_FSL_DPAA2_QDMA) += fsl-dpaa2-qdma/ > > obj-y += mediatek/ > obj-y += qcom/ > diff --git a/drivers/dma/fsl-dpaa2-qdma/Kconfig b/drivers/dma/fsl-dpaa2-qdma/Kconfig > new file mode 100644 > index 0000000..258ed6b > --- /dev/null > +++ b/drivers/dma/fsl-dpaa2-qdma/Kconfig > @@ -0,0 +1,9 @@ > +menuconfig FSL_DPAA2_QDMA > + tristate "NXP DPAA2 QDMA" > + depends on ARM64 > + depends on FSL_MC_BUS && FSL_MC_DPIO > + select DMA_ENGINE > + select DMA_VIRTUAL_CHANNELS > + help > + NXP Data Path Acceleration Architecture 2 QDMA driver, > + using the NXP MC bus driver. > diff --git a/drivers/dma/fsl-dpaa2-qdma/Makefile b/drivers/dma/fsl-dpaa2-qdma/Makefile > new file mode 100644 > index 0000000..c1d0226 > --- /dev/null > +++ b/drivers/dma/fsl-dpaa2-qdma/Makefile > @@ -0,0 +1,3 @@ > +# SPDX-License-Identifier: GPL-2.0 > +# Makefile for the NXP DPAA2 qDMA controllers > +obj-$(CONFIG_FSL_DPAA2_QDMA) += dpaa2-qdma.o dpdmai.o > diff --git a/drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c b/drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c > new file mode 100644 > index 0000000..0cdde0f > --- /dev/null > +++ b/drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c > @@ -0,0 +1,782 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// Copyright 2014-2018 NXP > + > +/* > + * Author: Changming Huang > + * > + * Driver for the NXP QDMA engine with QMan mode. > + * Channel virtualization is supported through enqueuing of DMA jobs to, > + * or dequeuing DMA jobs from different work queues with QMan portal. > + * This module can be found on NXP LS2 SoCs. > + * > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "../virt-dma.h" > +#include "dpdmai_cmd.h" > +#include "dpdmai.h" > +#include "dpaa2-qdma.h" > + > +static bool smmu_disable = true; > + > +static struct dpaa2_qdma_chan *to_dpaa2_qdma_chan(struct dma_chan *chan) > +{ > + return container_of(chan, struct dpaa2_qdma_chan, vchan.chan); > +} > + > +static struct dpaa2_qdma_comp *to_fsl_qdma_comp(struct virt_dma_desc *vd) > +{ > + return container_of(vd, struct dpaa2_qdma_comp, vdesc); > +} > + > +static int dpaa2_qdma_alloc_chan_resources(struct dma_chan *chan) > +{ > + struct dpaa2_qdma_chan *dpaa2_chan = to_dpaa2_qdma_chan(chan); > + struct dpaa2_qdma_engine *dpaa2_qdma = dpaa2_chan->qdma; > + struct device *dev = &dpaa2_qdma->priv->dpdmai_dev->dev; > + > + dpaa2_chan->fd_pool = dma_pool_create("fd_pool", dev, > + FD_POOL_SIZE, 32, 0); > + if (!dpaa2_chan->fd_pool) > + return -ENOMEM; > + > + return dpaa2_qdma->desc_allocated++; > +} > + > +static void dpaa2_qdma_free_chan_resources(struct dma_chan *chan) > +{ > + struct dpaa2_qdma_chan *dpaa2_chan = to_dpaa2_qdma_chan(chan); > + struct dpaa2_qdma_engine *dpaa2_qdma = dpaa2_chan->qdma; > + unsigned long flags; > + > + LIST_HEAD(head); > + > + spin_lock_irqsave(&dpaa2_chan->vchan.lock, flags); > + vchan_get_all_descriptors(&dpaa2_chan->vchan, &head); > + spin_unlock_irqrestore(&dpaa2_chan->vchan.lock, flags); > + > + vchan_dma_desc_free_list(&dpaa2_chan->vchan, &head); > + > + dpaa2_dpdmai_free_comp(dpaa2_chan, &dpaa2_chan->comp_used); > + dpaa2_dpdmai_free_comp(dpaa2_chan, &dpaa2_chan->comp_free); > + > + dma_pool_destroy(dpaa2_chan->fd_pool); > + dpaa2_qdma->desc_allocated--; > +} > + > +/* > + * Request a command descriptor for enqueue. > + */ > +static struct dpaa2_qdma_comp * > +dpaa2_qdma_request_desc(struct dpaa2_qdma_chan *dpaa2_chan) > +{ > + struct dpaa2_qdma_comp *comp_temp = NULL; > + unsigned long flags; > + > + spin_lock_irqsave(&dpaa2_chan->queue_lock, flags); > + if (list_empty(&dpaa2_chan->comp_free)) { > + spin_unlock_irqrestore(&dpaa2_chan->queue_lock, flags); > + comp_temp = kzalloc(sizeof(*comp_temp), GFP_KERNEL); GFP_NOWAIT? > + if (!comp_temp) > + goto err; > + comp_temp->fd_virt_addr = > + dma_pool_alloc(dpaa2_chan->fd_pool, GFP_NOWAIT, > + &comp_temp->fd_bus_addr); > + if (!comp_temp->fd_virt_addr) err handling seems incorrect, you dont clean up, caller doesnt check return! > + goto err; > + > + comp_temp->fl_virt_addr = > + (void *)((struct dpaa2_fd *) > + comp_temp->fd_virt_addr + 1); casts and pointer math, what could go wrong!! This doesnt smell right! > + comp_temp->fl_bus_addr = comp_temp->fd_bus_addr + > + sizeof(struct dpaa2_fd); why not use fl_virt_addr and get the bus_address? > + comp_temp->desc_virt_addr = > + (void *)((struct dpaa2_fl_entry *) > + comp_temp->fl_virt_addr + 3); > + comp_temp->desc_bus_addr = comp_temp->fl_bus_addr + > + sizeof(struct dpaa2_fl_entry) * 3; pointer math in the two calls doesnt match and as I said doesnt look good... > + > + comp_temp->qchan = dpaa2_chan; > + return comp_temp; > + } > + comp_temp = list_first_entry(&dpaa2_chan->comp_free, > + struct dpaa2_qdma_comp, list); > + list_del(&comp_temp->list); > + spin_unlock_irqrestore(&dpaa2_chan->queue_lock, flags); > + > + comp_temp->qchan = dpaa2_chan; > +err: > + return comp_temp; > +} > + > +static void > +dpaa2_qdma_populate_fd(u32 format, struct dpaa2_qdma_comp *dpaa2_comp) > +{ > + struct dpaa2_fd *fd; > + > + fd = (struct dpaa2_fd *)dpaa2_comp->fd_virt_addr; whats with the casts! you seem to like them! You are casting away from void! > + memset(fd, 0, sizeof(struct dpaa2_fd)); > + > + /* fd populated */ > + dpaa2_fd_set_addr(fd, dpaa2_comp->fl_bus_addr); > + /* Bypass memory translation, Frame list format, short length disable */ > + /* we need to disable BMT if fsl-mc use iova addr */ > + if (smmu_disable) > + dpaa2_fd_set_bpid(fd, QMAN_FD_BMT_ENABLE); > + dpaa2_fd_set_format(fd, QMAN_FD_FMT_ENABLE | QMAN_FD_SL_DISABLE); > + > + dpaa2_fd_set_frc(fd, format | QDMA_SER_CTX); > +} > + > +/* first frame list for descriptor buffer */ > +static void > +dpaa2_qdma_populate_first_framel(struct dpaa2_fl_entry *f_list, > + struct dpaa2_qdma_comp *dpaa2_comp, > + bool wrt_changed) > +{ > + struct dpaa2_qdma_sd_d *sdd; > + > + sdd = (struct dpaa2_qdma_sd_d *)dpaa2_comp->desc_virt_addr; again > + memset(sdd, 0, 2 * (sizeof(*sdd))); > + > + /* source descriptor CMD */ > + sdd->cmd = cpu_to_le32(QDMA_SD_CMD_RDTTYPE_COHERENT); > + sdd++; > + > + /* dest descriptor CMD */ > + if (wrt_changed) > + sdd->cmd = cpu_to_le32(LX2160_QDMA_DD_CMD_WRTTYPE_COHERENT); > + else > + sdd->cmd = cpu_to_le32(QDMA_DD_CMD_WRTTYPE_COHERENT); > + > + memset(f_list, 0, sizeof(struct dpaa2_fl_entry)); > + > + /* first frame list to source descriptor */ > + dpaa2_fl_set_addr(f_list, dpaa2_comp->desc_bus_addr); > + dpaa2_fl_set_len(f_list, 0x20); > + dpaa2_fl_set_format(f_list, QDMA_FL_FMT_SBF | QDMA_FL_SL_LONG); > + > + /* bypass memory translation */ > + if (smmu_disable) > + f_list->bpid = cpu_to_le16(QDMA_FL_BMT_ENABLE); > +} > + > +/* source and destination frame list */ > +static void > +dpaa2_qdma_populate_frames(struct dpaa2_fl_entry *f_list, > + dma_addr_t dst, dma_addr_t src, > + size_t len, uint8_t fmt) > +{ > + /* source frame list to source buffer */ > + memset(f_list, 0, sizeof(struct dpaa2_fl_entry)); > + > + dpaa2_fl_set_addr(f_list, src); > + dpaa2_fl_set_len(f_list, len); > + > + /* single buffer frame or scatter gather frame */ > + dpaa2_fl_set_format(f_list, (fmt | QDMA_FL_SL_LONG)); > + > + /* bypass memory translation */ > + if (smmu_disable) > + f_list->bpid = cpu_to_le16(QDMA_FL_BMT_ENABLE); > + > + f_list++; > + > + /* destination frame list to destination buffer */ > + memset(f_list, 0, sizeof(struct dpaa2_fl_entry)); > + > + dpaa2_fl_set_addr(f_list, dst); > + dpaa2_fl_set_len(f_list, len); > + dpaa2_fl_set_format(f_list, (fmt | QDMA_FL_SL_LONG)); > + /* single buffer frame or scatter gather frame */ > + dpaa2_fl_set_final(f_list, QDMA_FL_F); > + /* bypass memory translation */ > + if (smmu_disable) > + f_list->bpid = cpu_to_le16(QDMA_FL_BMT_ENABLE); > +} > + > +static struct dma_async_tx_descriptor > +*dpaa2_qdma_prep_memcpy(struct dma_chan *chan, dma_addr_t dst, > + dma_addr_t src, size_t len, ulong flags) > +{ > + struct dpaa2_qdma_chan *dpaa2_chan = to_dpaa2_qdma_chan(chan); > + struct dpaa2_qdma_engine *dpaa2_qdma; > + struct dpaa2_qdma_comp *dpaa2_comp; > + struct dpaa2_fl_entry *f_list; > + bool wrt_changed; > + u32 format; > + > + dpaa2_qdma = dpaa2_chan->qdma; > + dpaa2_comp = dpaa2_qdma_request_desc(dpaa2_chan); > + wrt_changed = (bool)dpaa2_qdma->qdma_wrtype_fixup; > + > +#ifdef LONG_FORMAT compile flag and define, so else part is dead code?? > + format = QDMA_FD_LONG_FORMAT; > +#else > + format = QDMA_FD_SHORT_FORMAT; > +#endif > + /* populate Frame descriptor */ > + dpaa2_qdma_populate_fd(format, dpaa2_comp); > + > + f_list = (struct dpaa2_fl_entry *)dpaa2_comp->fl_virt_addr; > + > +#ifdef LONG_FORMAT > + /* first frame list for descriptor buffer (logn format) */ > + dpaa2_qdma_populate_first_framel(f_list, dpaa2_comp, wrt_changed); > + > + f_list++; > +#endif > + > + dpaa2_qdma_populate_frames(f_list, dst, src, len, QDMA_FL_FMT_SBF); > + > + return vchan_tx_prep(&dpaa2_chan->vchan, &dpaa2_comp->vdesc, flags); > +} > + > +static enum > +dma_status dpaa2_qdma_tx_status(struct dma_chan *chan, > + dma_cookie_t cookie, > + struct dma_tx_state *txstate) > +{ > + return dma_cookie_status(chan, cookie, txstate); > +} > + > +static void dpaa2_qdma_issue_pending(struct dma_chan *chan) > +{ > + struct dpaa2_qdma_chan *dpaa2_chan = to_dpaa2_qdma_chan(chan); > + struct dpaa2_qdma_engine *dpaa2_qdma = dpaa2_chan->qdma; > + struct dpaa2_qdma_priv *priv = dpaa2_qdma->priv; > + struct dpaa2_qdma_comp *dpaa2_comp; > + struct virt_dma_desc *vdesc; > + struct dpaa2_fd *fd; > + unsigned long flags; > + int err; > + > + spin_lock_irqsave(&dpaa2_chan->queue_lock, flags); > + spin_lock(&dpaa2_chan->vchan.lock); > + if (vchan_issue_pending(&dpaa2_chan->vchan)) { > + vdesc = vchan_next_desc(&dpaa2_chan->vchan); > + if (!vdesc) > + goto err_enqueue; > + dpaa2_comp = to_fsl_qdma_comp(vdesc); > + > + fd = (struct dpaa2_fd *)dpaa2_comp->fd_virt_addr; > + > + list_del(&vdesc->node); > + list_add_tail(&dpaa2_comp->list, &dpaa2_chan->comp_used); what does this list do? > + > + /* TOBO: priority hard-coded to zero */ You mean TODO? > + err = dpaa2_io_service_enqueue_fq(NULL, > + priv->tx_queue_attr[0].fqid, fd); > + if (err) { > + list_del(&dpaa2_comp->list); > + list_add_tail(&dpaa2_comp->list, > + &dpaa2_chan->comp_free); > + } > + } > +err_enqueue: > + spin_unlock(&dpaa2_chan->vchan.lock); > + spin_unlock_irqrestore(&dpaa2_chan->queue_lock, flags); > +} > + > +static int __cold dpaa2_qdma_setup(struct fsl_mc_device *ls_dev) > +{ > + struct dpaa2_qdma_priv_per_prio *ppriv; > + struct device *dev = &ls_dev->dev; > + struct dpaa2_qdma_priv *priv; > + u8 prio_def = DPDMAI_PRIO_NUM; > + int err; > + int i; > + > + priv = dev_get_drvdata(dev); > + > + priv->dev = dev; > + priv->dpqdma_id = ls_dev->obj_desc.id; > + > + /*Get the handle for the DPDMAI this interface is associate with */ Please run checkpatch, it should have told you that you need space after comment marker /* foo... > + err = dpdmai_open(priv->mc_io, 0, priv->dpqdma_id, &ls_dev->mc_handle); > + if (err) { > + dev_err(dev, "dpdmai_open() failed\n"); > + return err; > + } > + dev_info(dev, "Opened dpdmai object successfully\n"); > + > + err = dpdmai_get_attributes(priv->mc_io, 0, ls_dev->mc_handle, > + &priv->dpdmai_attr); > + if (err) { > + dev_err(dev, "dpdmai_get_attributes() failed\n"); > + return err; so you dont close what you opened in dpdmai_open() Please give a serious thought and testing to this driver > + } > + > + if (priv->dpdmai_attr.version.major > DPDMAI_VER_MAJOR) { > + dev_err(dev, "DPDMAI major version mismatch\n" > + "Found %u.%u, supported version is %u.%u\n", > + priv->dpdmai_attr.version.major, > + priv->dpdmai_attr.version.minor, > + DPDMAI_VER_MAJOR, DPDMAI_VER_MINOR); > + } > + > + if (priv->dpdmai_attr.version.minor > DPDMAI_VER_MINOR) { > + dev_err(dev, "DPDMAI minor version mismatch\n" > + "Found %u.%u, supported version is %u.%u\n", > + priv->dpdmai_attr.version.major, > + priv->dpdmai_attr.version.minor, > + DPDMAI_VER_MAJOR, DPDMAI_VER_MINOR); what is the implication of these error, why not bail out on these? > + } > + > + priv->num_pairs = min(priv->dpdmai_attr.num_of_priorities, prio_def); > + ppriv = kcalloc(priv->num_pairs, sizeof(*ppriv), GFP_KERNEL); what is the context of the fn, sleepy, atomic? > + if (!ppriv) { > + dev_err(dev, "kzalloc for ppriv failed\n"); this need not be logged, core will do so > + return -1; really -1?? I think this driver needs more work, please fix these issues in the comments above and also see in rest of the code -- ~Vinod