From: Vinod Koul <vkoul@kernel.org>
To: Sameer Pujar <spujar@nvidia.com>
Cc: dan.j.williams@intel.com, tiwai@suse.com, jonathanh@nvidia.com,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] [RFC] dmaengine: add fifo_size member
Date: Thu, 2 May 2019 17:55:06 +0530 [thread overview]
Message-ID: <20190502122506.GP3845@vkoul-mobl.Dlink> (raw)
In-Reply-To: <e852d576-9cc2-ed42-1a1a-d696112c88bf@nvidia.com>
On 02-05-19, 16:23, Sameer Pujar wrote:
>
> On 5/2/2019 11:34 AM, Vinod Koul wrote:
> > On 30-04-19, 17:00, Sameer Pujar wrote:
> > > During the DMA transfers from memory to I/O, it was observed that transfers
> > > were inconsistent and resulted in glitches for audio playback. It happened
> > > because fifo size on DMA did not match with slave channel configuration.
> > >
> > > currently 'dma_slave_config' structure does not have a field for fifo size.
> > > Hence the platform pcm driver cannot pass the fifo size as a slave_config.
> > > Note that 'snd_dmaengine_dai_dma_data' structure has fifo_size field which
> > > cannot be used to pass the size info. This patch introduces fifo_size field
> > > and the same can be populated on slave side. Users can set required size
> > > for slave peripheral (multiple channels can be independently running with
> > > different fifo sizes) and the corresponding sizes are programmed through
> > > dma_slave_config on DMA side.
> > FIFO size is a hardware property not sure why you would want an
> > interface to program that?
> >
> > On mismatch, I guess you need to take care of src/dst_maxburst..
> Yes, FIFO size is a HW property. But it is SW configurable(atleast in my
> case) on
> slave side and can be set to different sizes. The src/dst_maxburst is
Are you sure, have you talked to HW folks on that? IIUC you are
programming the data to be used in FIFO not the FIFO length!
> programmed
> for specific values, I think this depends on few factors related to
> bandwidth
> needs of client, DMA needs of the system etc.,
Precisely
> In such cases how does DMA know the actual FIFO depth of slave peripheral?
Why should DMA know? Its job is to push/pull data as configured by
peripheral driver. The peripheral driver knows and configures DMA
accordingly.
> > > Request for feedback/suggestions.
> > >
> > > Signed-off-by: Sameer Pujar <spujar@nvidia.com>
> > > ---
> > > include/linux/dmaengine.h | 3 +++
> > > 1 file changed, 3 insertions(+)
> > >
> > > diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> > > index d49ec5c..9ec198b 100644
> > > --- a/include/linux/dmaengine.h
> > > +++ b/include/linux/dmaengine.h
> > > @@ -351,6 +351,8 @@ enum dma_slave_buswidth {
> > > * @slave_id: Slave requester id. Only valid for slave channels. The dma
> > > * slave peripheral will have unique id as dma requester which need to be
> > > * pass as slave config.
> > > + * @fifo_size: Fifo size value. The dma slave peripheral can configure required
> > > + * fifo size and the same needs to be passed as slave config.
> > > *
> > > * This struct is passed in as configuration data to a DMA engine
> > > * in order to set up a certain channel for DMA transport at runtime.
> > > @@ -376,6 +378,7 @@ struct dma_slave_config {
> > > u32 dst_port_window_size;
> > > bool device_fc;
> > > unsigned int slave_id;
> > > + u32 fifo_size;
> > > };
> > > /**
> > > --
> > > 2.7.4
--
~Vinod
next prev parent reply other threads:[~2019-05-02 12:25 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 11:30 [RFC] dmaengine: add fifo_size member Sameer Pujar
2019-04-30 11:30 ` [PATCH] " Sameer Pujar
2019-05-02 6:04 ` Vinod Koul
2019-05-02 6:04 ` [PATCH] " Vinod Koul
2019-05-02 10:53 ` Sameer Pujar
2019-05-02 12:25 ` Vinod Koul [this message]
2019-05-02 13:29 ` Sameer Pujar
2019-05-03 19:10 ` Peter Ujfalusi
2019-05-04 10:23 ` Vinod Koul
2019-05-06 13:04 ` Sameer Pujar
2019-05-06 15:50 ` Vinod Koul
2019-06-06 3:49 ` Sameer Pujar
2019-06-06 6:00 ` Peter Ujfalusi
2019-06-06 6:41 ` Sameer Pujar
2019-06-06 7:14 ` Jon Hunter
2019-06-06 10:22 ` Peter Ujfalusi
2019-06-06 10:49 ` Jon Hunter
2019-06-06 11:54 ` Peter Ujfalusi
2019-06-06 12:37 ` Jon Hunter
2019-06-06 13:45 ` Dmitry Osipenko
2019-06-06 13:55 ` Dmitry Osipenko
2019-06-06 14:26 ` Jon Hunter
2019-06-06 14:36 ` Jon Hunter
2019-06-06 14:36 ` Dmitry Osipenko
2019-06-06 14:47 ` Jon Hunter
2019-06-06 14:25 ` Jon Hunter
2019-06-06 15:18 ` Dmitry Osipenko
2019-06-06 16:32 ` Jon Hunter
2019-06-06 16:44 ` Dmitry Osipenko
2019-06-06 16:53 ` Jon Hunter
2019-06-06 17:25 ` Dmitry Osipenko
2019-06-06 17:56 ` Dmitry Osipenko
2019-06-07 9:24 ` Jon Hunter
2019-06-07 5:50 ` Peter Ujfalusi
2019-06-07 9:18 ` Jon Hunter
2019-06-07 10:27 ` Jon Hunter
2019-06-07 12:17 ` Peter Ujfalusi
2019-06-07 12:58 ` Jon Hunter
2019-06-07 13:35 ` Peter Ujfalusi
2019-06-07 20:53 ` Dmitry Osipenko
2019-06-10 8:01 ` Jon Hunter
2019-06-10 7:59 ` Jon Hunter
2019-06-13 4:43 ` Vinod Koul
2019-06-17 7:07 ` Sameer Pujar
2019-06-18 4:33 ` Vinod Koul
2019-06-20 10:29 ` Sameer Pujar
2019-06-24 6:26 ` Vinod Koul
2019-06-25 2:57 ` Sameer Pujar
2019-07-05 6:15 ` Sameer Pujar
2019-07-15 15:42 ` Sameer Pujar
2019-07-19 5:04 ` Vinod Koul
2019-07-23 5:54 ` Sameer Pujar
2019-07-29 6:10 ` Vinod Koul
2019-07-31 9:48 ` Jon Hunter
2019-07-31 15:16 ` Vinod Koul
2019-08-02 8:51 ` Jon Hunter
2019-08-08 12:38 ` Vinod Koul
2019-08-19 15:56 ` Jon Hunter
2019-08-20 11:05 ` Vinod Koul
2019-09-16 9:02 ` Sameer Pujar
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