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* [PATCH] dmaengine: ti: edma: Enable support for polled (memcpy) completion
@ 2019-05-14  8:09 Peter Ujfalusi
  2019-05-21  5:04 ` Vinod Koul
  0 siblings, 1 reply; 4+ messages in thread
From: Peter Ujfalusi @ 2019-05-14  8:09 UTC (permalink / raw)
  To: vkoul; +Cc: dan.j.williams, dmaengine, linux-arm-kernel, linux-omap

When a DMA client driver decides that it is not providing callback for
completion of a transfer (and/or does not set the DMA_PREP_INTERRUPT) but
it will poll the status of the transfer (in case of short memcpy for
example) we will not get interrupt for the completion of the transfer and
will not mark the transaction as done.

Check the event registers (ER and EER) and if the channel is inactive then
return wioth DMA_COMPLETE to let the client know that the transfer is
completed.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 drivers/dma/ti/edma.c | 23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/ti/edma.c b/drivers/dma/ti/edma.c
index ceabdea40ae0..7501445af069 100644
--- a/drivers/dma/ti/edma.c
+++ b/drivers/dma/ti/edma.c
@@ -1211,8 +1211,9 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
 
 	edesc->pset[0].param.opt |= ITCCHEN;
 	if (nslots == 1) {
-		/* Enable transfer complete interrupt */
-		edesc->pset[0].param.opt |= TCINTEN;
+		/* Enable transfer complete interrupt if requested */
+		if (tx_flags & DMA_PREP_INTERRUPT)
+			edesc->pset[0].param.opt |= TCINTEN;
 	} else {
 		/* Enable transfer complete chaining for the first slot */
 		edesc->pset[0].param.opt |= TCCHEN;
@@ -1239,7 +1240,9 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
 		}
 
 		edesc->pset[1].param.opt |= ITCCHEN;
-		edesc->pset[1].param.opt |= TCINTEN;
+		/* Enable transfer complete interrupt if requested */
+		if (tx_flags & DMA_PREP_INTERRUPT)
+			edesc->pset[1].param.opt |= TCINTEN;
 	}
 
 	return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
@@ -1801,6 +1804,20 @@ static enum dma_status edma_tx_status(struct dma_chan *chan,
 	unsigned long flags;
 
 	ret = dma_cookie_status(chan, cookie, txstate);
+
+	if (ret != DMA_COMPLETE && echan->edesc && !echan->edesc->cyclic) {
+		struct edma_cc *ecc = echan->ecc;
+		int channel = EDMA_CHAN_SLOT(echan->ch_num);
+		int j = (channel >> 5);
+		unsigned int mask = BIT(channel & 0x1f);
+		unsigned int sh_er = edma_shadow0_read_array(ecc, SH_ER, j);
+		unsigned int sh_eer = edma_shadow0_read_array(ecc, SH_EER, j);
+
+		/* The channel is no longer active */
+		if (!(sh_er & mask) && !(sh_eer & mask))
+			ret = DMA_COMPLETE;
+	}
+
 	if (ret == DMA_COMPLETE || !txstate)
 		return ret;
 
-- 
Peter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] dmaengine: ti: edma: Enable support for polled (memcpy) completion
  2019-05-14  8:09 [PATCH] dmaengine: ti: edma: Enable support for polled (memcpy) completion Peter Ujfalusi
@ 2019-05-21  5:04 ` Vinod Koul
  2019-05-21  6:16   ` Peter Ujfalusi
  0 siblings, 1 reply; 4+ messages in thread
From: Vinod Koul @ 2019-05-21  5:04 UTC (permalink / raw)
  To: Peter Ujfalusi; +Cc: dan.j.williams, dmaengine, linux-arm-kernel, linux-omap

On 14-05-19, 11:09, Peter Ujfalusi wrote:
> When a DMA client driver decides that it is not providing callback for
> completion of a transfer (and/or does not set the DMA_PREP_INTERRUPT) but
> it will poll the status of the transfer (in case of short memcpy for
> example) we will not get interrupt for the completion of the transfer and
> will not mark the transaction as done.
> 
> Check the event registers (ER and EER) and if the channel is inactive then
> return wioth DMA_COMPLETE to let the client know that the transfer is
        ^^^^^
Typo

> completed.
> 
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
>  drivers/dma/ti/edma.c | 23 ++++++++++++++++++++---
>  1 file changed, 20 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/dma/ti/edma.c b/drivers/dma/ti/edma.c
> index ceabdea40ae0..7501445af069 100644
> --- a/drivers/dma/ti/edma.c
> +++ b/drivers/dma/ti/edma.c
> @@ -1211,8 +1211,9 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
>  
>  	edesc->pset[0].param.opt |= ITCCHEN;
>  	if (nslots == 1) {
> -		/* Enable transfer complete interrupt */
> -		edesc->pset[0].param.opt |= TCINTEN;
> +		/* Enable transfer complete interrupt if requested */
> +		if (tx_flags & DMA_PREP_INTERRUPT)
> +			edesc->pset[0].param.opt |= TCINTEN;
>  	} else {
>  		/* Enable transfer complete chaining for the first slot */
>  		edesc->pset[0].param.opt |= TCCHEN;
> @@ -1239,7 +1240,9 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
>  		}
>  
>  		edesc->pset[1].param.opt |= ITCCHEN;
> -		edesc->pset[1].param.opt |= TCINTEN;
> +		/* Enable transfer complete interrupt if requested */
> +		if (tx_flags & DMA_PREP_INTERRUPT)
> +			edesc->pset[1].param.opt |= TCINTEN;
>  	}
>  
>  	return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
> @@ -1801,6 +1804,20 @@ static enum dma_status edma_tx_status(struct dma_chan *chan,
>  	unsigned long flags;
>  
>  	ret = dma_cookie_status(chan, cookie, txstate);
> +
> +	if (ret != DMA_COMPLETE && echan->edesc && !echan->edesc->cyclic) {
> +		struct edma_cc *ecc = echan->ecc;
> +		int channel = EDMA_CHAN_SLOT(echan->ch_num);
> +		int j = (channel >> 5);
> +		unsigned int mask = BIT(channel & 0x1f);

GENMASK or define a macro instead of a magic number?

> +		unsigned int sh_er = edma_shadow0_read_array(ecc, SH_ER, j);
> +		unsigned int sh_eer = edma_shadow0_read_array(ecc, SH_EER, j);
> +
> +		/* The channel is no longer active */
> +		if (!(sh_er & mask) && !(sh_eer & mask))
> +			ret = DMA_COMPLETE;
> +	}
> +
>  	if (ret == DMA_COMPLETE || !txstate)
>  		return ret;
>  
> -- 
> Peter
> 
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

-- 
~Vinod

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] dmaengine: ti: edma: Enable support for polled (memcpy) completion
  2019-05-21  5:04 ` Vinod Koul
@ 2019-05-21  6:16   ` Peter Ujfalusi
  2019-05-21  7:21     ` Vinod Koul
  0 siblings, 1 reply; 4+ messages in thread
From: Peter Ujfalusi @ 2019-05-21  6:16 UTC (permalink / raw)
  To: Vinod Koul; +Cc: dan.j.williams, dmaengine, linux-arm-kernel, linux-omap



On 21/05/2019 8.04, Vinod Koul wrote:
> On 14-05-19, 11:09, Peter Ujfalusi wrote:
>> When a DMA client driver decides that it is not providing callback for
>> completion of a transfer (and/or does not set the DMA_PREP_INTERRUPT) but
>> it will poll the status of the transfer (in case of short memcpy for
>> example) we will not get interrupt for the completion of the transfer and
>> will not mark the transaction as done.
>>
>> Check the event registers (ER and EER) and if the channel is inactive then
>> return wioth DMA_COMPLETE to let the client know that the transfer is
>         ^^^^^
> Typo

Ok

> 
>> completed.
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
>> ---
>>  drivers/dma/ti/edma.c | 23 ++++++++++++++++++++---
>>  1 file changed, 20 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/dma/ti/edma.c b/drivers/dma/ti/edma.c
>> index ceabdea40ae0..7501445af069 100644
>> --- a/drivers/dma/ti/edma.c
>> +++ b/drivers/dma/ti/edma.c
>> @@ -1211,8 +1211,9 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
>>  
>>  	edesc->pset[0].param.opt |= ITCCHEN;
>>  	if (nslots == 1) {
>> -		/* Enable transfer complete interrupt */
>> -		edesc->pset[0].param.opt |= TCINTEN;
>> +		/* Enable transfer complete interrupt if requested */
>> +		if (tx_flags & DMA_PREP_INTERRUPT)
>> +			edesc->pset[0].param.opt |= TCINTEN;
>>  	} else {
>>  		/* Enable transfer complete chaining for the first slot */
>>  		edesc->pset[0].param.opt |= TCCHEN;
>> @@ -1239,7 +1240,9 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
>>  		}
>>  
>>  		edesc->pset[1].param.opt |= ITCCHEN;
>> -		edesc->pset[1].param.opt |= TCINTEN;
>> +		/* Enable transfer complete interrupt if requested */
>> +		if (tx_flags & DMA_PREP_INTERRUPT)
>> +			edesc->pset[1].param.opt |= TCINTEN;
>>  	}
>>  
>>  	return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
>> @@ -1801,6 +1804,20 @@ static enum dma_status edma_tx_status(struct dma_chan *chan,
>>  	unsigned long flags;
>>  
>>  	ret = dma_cookie_status(chan, cookie, txstate);
>> +
>> +	if (ret != DMA_COMPLETE && echan->edesc && !echan->edesc->cyclic) {
>> +		struct edma_cc *ecc = echan->ecc;
>> +		int channel = EDMA_CHAN_SLOT(echan->ch_num);
>> +		int j = (channel >> 5);
>> +		unsigned int mask = BIT(channel & 0x1f);
> 
> GENMASK or define a macro instead of a magic number?

So it is better to change the other places first from where I have just
copied this.

> 
>> +		unsigned int sh_er = edma_shadow0_read_array(ecc, SH_ER, j);
>> +		unsigned int sh_eer = edma_shadow0_read_array(ecc, SH_EER, j);
>> +
>> +		/* The channel is no longer active */
>> +		if (!(sh_er & mask) && !(sh_eer & mask))
>> +			ret = DMA_COMPLETE;
>> +	}
>> +
>>  	if (ret == DMA_COMPLETE || !txstate)
>>  		return ret;
>>  
>> -- 
>> Peter
>>
>> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
>> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
> 

- Péter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] dmaengine: ti: edma: Enable support for polled (memcpy) completion
  2019-05-21  6:16   ` Peter Ujfalusi
@ 2019-05-21  7:21     ` Vinod Koul
  0 siblings, 0 replies; 4+ messages in thread
From: Vinod Koul @ 2019-05-21  7:21 UTC (permalink / raw)
  To: Peter Ujfalusi; +Cc: dan.j.williams, dmaengine, linux-arm-kernel, linux-omap

On 21-05-19, 09:16, Peter Ujfalusi wrote:
> On 21/05/2019 8.04, Vinod Koul wrote:
> > On 14-05-19, 11:09, Peter Ujfalusi wrote:

> >>  	return vchan_tx_prep(&echan->vchan, &edesc->vdesc, tx_flags);
> >> @@ -1801,6 +1804,20 @@ static enum dma_status edma_tx_status(struct dma_chan *chan,
> >>  	unsigned long flags;
> >>  
> >>  	ret = dma_cookie_status(chan, cookie, txstate);
> >> +
> >> +	if (ret != DMA_COMPLETE && echan->edesc && !echan->edesc->cyclic) {
> >> +		struct edma_cc *ecc = echan->ecc;
> >> +		int channel = EDMA_CHAN_SLOT(echan->ch_num);
> >> +		int j = (channel >> 5);
> >> +		unsigned int mask = BIT(channel & 0x1f);
> > 
> > GENMASK or define a macro instead of a magic number?
> 
> So it is better to change the other places first from where I have just
> copied this.

That would be nice as well :)

-- 
~Vinod

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2019-05-21  7:21 UTC | newest]

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2019-05-14  8:09 [PATCH] dmaengine: ti: edma: Enable support for polled (memcpy) completion Peter Ujfalusi
2019-05-21  5:04 ` Vinod Koul
2019-05-21  6:16   ` Peter Ujfalusi
2019-05-21  7:21     ` Vinod Koul

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