From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: <vkoul@kernel.org>
Cc: <dan.j.williams@intel.com>, <dmaengine@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-omap@vger.kernel.org>
Subject: [PATCH v2 0/2] dmaengine: ti: edma: Polled completion support
Date: Tue, 21 May 2019 10:59:43 +0300 [thread overview]
Message-ID: <20190521075945.14085-1-peter.ujfalusi@ti.com> (raw)
Hi,
Changes since v1:
- Cleanup patch for the array register handling
- typo fixed in patch2 commit message
The code around the array register access was pretty confusing for the first
look, so clean them up first then use the cleaner way in the polled handling.
When a DMA client driver decides that it is not providing callback for
completion of a transfer (and/or does not set the DMA_PREP_INTERRUPT) but
it will poll the status of the transfer (in case of short memcpy for
example) we will not get interrupt for the completion of the transfer and
will not mark the transaction as done.
Check the event registers (ER and EER) and if the channel is inactive then
return wioth DMA_COMPLETE to let the client know that the transfer is
completed.
Regards,
Peter
---
Peter Ujfalusi (2):
dmaengine: ti: edma: Clean up the 2x32bit array register accesses
dmaengine: ti: edma: Enable support for polled (memcpy) completion
drivers/dma/ti/edma.c | 129 ++++++++++++++++++++++++++----------------
1 file changed, 81 insertions(+), 48 deletions(-)
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next reply other threads:[~2019-05-21 7:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-21 7:59 Peter Ujfalusi [this message]
2019-05-21 7:59 ` [PATCH v2 1/2] dmaengine: ti: edma: Clean up the 2x32bit array register accesses Peter Ujfalusi
2019-05-21 8:01 ` Peter Ujfalusi
2019-05-21 7:59 ` [PATCH v2 2/2] dmaengine: ti: edma: Enable support for polled (memcpy) completion Peter Ujfalusi
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