dmaengine Archive on lore.kernel.org
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From: Michael Olbrich <m.olbrich@pengutronix.de>
To: Sven Van Asbroeck <thesven73@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>,
	Robin Gong <yibin.gong@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>, Vinod <vkoul@kernel.org>,
	Dan Williams <dan.j.williams@intel.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	dmaengine@vger.kernel.org, Sascha Hauer <kernel@pengutronix.de>
Subject: Re: [PATCH v1] dmaengine: imx-sdma: remove BD_INTR for channel0
Date: Fri, 14 Jun 2019 20:09:13 +0200
Message-ID: <20190614180913.d66bbjrnw3gxt663@pengutronix.de> (raw)
In-Reply-To: <CAGngYiUWy5FM-zsT55-yY=kahLObZGYw=zU0F9Tzp9T2S3G6LA@mail.gmail.com>

On Fri, Jun 14, 2019 at 09:25:51AM -0400, Sven Van Asbroeck wrote:
> On Fri, Jun 14, 2019 at 6:49 AM Fabio Estevam <festevam@gmail.com> wrote:
> >
> > According to the original report from Sven the issue started to happen
> > on 5.0, so it would be good to add a Fixes tag and Cc stable so that
> > this fix could be backported to 5.0/5.1 stable trees.
> 
> Good catch !
> 
> However, the issue is highly timing-dependent. It will come and go depending
> on the kernel version, devicetree and defconfig. If it works for me on
> 4.19, that
> doesn't mean the bug is gone on 4.19.
> 
> Looking at the commit history, I think the commit below possibly introduced the
> issue. Until this commit, sdma_run_channel() would wait on the interrupt
> before proceeding. It has been there since 4.8:
> 
> Fixes: 1d069bfa3c78 ("dmaengine: imx-sdma: ack channel 0 IRQ in the
> interrupt handler")

I think this is correct. Starting with this commit, the interrupt status fr
channel 0 is no longer cleared in sdma_run_channel0() and
sdma_int_handler() is always called for channel 0.
During firmware loading the interrupts are enabled again just before the
clocks are disabled. The interrupt is pending at this moment so on a single
core system I think this will always work as expected. If the firmware
loading and the interrupt handler run on different cores then this is racy.
Maybe something else changed to make this more likely?

With this new change sdma_int_handler() is no longer called for channel 0
right, so you should also remove the special handling there.

Michael

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  reply index

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-14  8:39 yibin.gong
2019-06-14 10:49 ` Fabio Estevam
2019-06-14 13:25   ` Sven Van Asbroeck
2019-06-14 18:09     ` Michael Olbrich [this message]
2019-06-17  2:14       ` Robin Gong
2019-06-17 10:15         ` m.olbrich
2019-06-18  6:08           ` Robin Gong
2019-06-17  2:02     ` Robin Gong
2019-06-17 13:27       ` Sven Van Asbroeck
2019-06-18  5:50         ` Robin Gong
2019-06-14 13:35 ` Sven Van Asbroeck
2019-06-17  1:42   ` Robin Gong

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