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* [PATCH] dmaengine: tegra210-adma: Don't program FIFO threshold
@ 2019-06-20  7:54 Jon Hunter
  2019-06-20  8:47 ` Thierry Reding
  2019-07-05  6:31 ` Vinod Koul
  0 siblings, 2 replies; 3+ messages in thread
From: Jon Hunter @ 2019-06-20  7:54 UTC (permalink / raw)
  To: Laxman Dewangan, Vinod Koul, Thierry Reding
  Cc: dmaengine, linux-tegra, Sameer Pujar, Jonathan Hunter

From: Jonathan Hunter <jonathanh@nvidia.com>

The Tegra210 ADMA supports two modes for transferring data to a FIFO
which are ...

1. Transfer data to/from the FIFO as soon as a single burst can be
   transferred.
2. Transfer data to/from the FIFO based upon FIFO thresholds, where
   the FIFO threshold is specified in terms on multiple bursts.

Currently, the ADMA driver programs the FIFO threshold values in the
FIFO_CTRL register, but never enables the transfer mode that uses
these threshold values. Given that these have never been used so far,
simplify the ADMA driver by removing the programming of these threshold
values.

Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
---
 drivers/dma/tegra210-adma.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
index 2805853e963f..d8646a49ba5b 100644
--- a/drivers/dma/tegra210-adma.c
+++ b/drivers/dma/tegra210-adma.c
@@ -42,12 +42,8 @@
 #define ADMA_CH_CONFIG_MAX_BUFS				8
 
 #define ADMA_CH_FIFO_CTRL				0x2c
-#define TEGRA210_ADMA_CH_FIFO_CTRL_OFLWTHRES(val)	(((val) & 0xf) << 24)
-#define TEGRA210_ADMA_CH_FIFO_CTRL_STRVTHRES(val)	(((val) & 0xf) << 16)
 #define TEGRA210_ADMA_CH_FIFO_CTRL_TXSIZE(val)		(((val) & 0xf) << 8)
 #define TEGRA210_ADMA_CH_FIFO_CTRL_RXSIZE(val)		((val) & 0xf)
-#define TEGRA186_ADMA_CH_FIFO_CTRL_OFLWTHRES(val)	(((val) & 0x1f) << 24)
-#define TEGRA186_ADMA_CH_FIFO_CTRL_STRVTHRES(val)	(((val) & 0x1f) << 16)
 #define TEGRA186_ADMA_CH_FIFO_CTRL_TXSIZE(val)		(((val) & 0x1f) << 8)
 #define TEGRA186_ADMA_CH_FIFO_CTRL_RXSIZE(val)		((val) & 0x1f)
 
@@ -64,14 +60,10 @@
 
 #define TEGRA_ADMA_BURST_COMPLETE_TIME			20
 
-#define TEGRA210_FIFO_CTRL_DEFAULT (TEGRA210_ADMA_CH_FIFO_CTRL_OFLWTHRES(1) | \
-				    TEGRA210_ADMA_CH_FIFO_CTRL_STRVTHRES(1) | \
-				    TEGRA210_ADMA_CH_FIFO_CTRL_TXSIZE(3)    | \
+#define TEGRA210_FIFO_CTRL_DEFAULT (TEGRA210_ADMA_CH_FIFO_CTRL_TXSIZE(3) | \
 				    TEGRA210_ADMA_CH_FIFO_CTRL_RXSIZE(3))
 
-#define TEGRA186_FIFO_CTRL_DEFAULT (TEGRA186_ADMA_CH_FIFO_CTRL_OFLWTHRES(1) | \
-				    TEGRA186_ADMA_CH_FIFO_CTRL_STRVTHRES(1) | \
-				    TEGRA186_ADMA_CH_FIFO_CTRL_TXSIZE(3)    | \
+#define TEGRA186_FIFO_CTRL_DEFAULT (TEGRA186_ADMA_CH_FIFO_CTRL_TXSIZE(3) | \
 				    TEGRA186_ADMA_CH_FIFO_CTRL_RXSIZE(3))
 
 #define ADMA_CH_REG_FIELD_VAL(val, mask, shift)	(((val) & mask) << shift)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] dmaengine: tegra210-adma: Don't program FIFO threshold
  2019-06-20  7:54 [PATCH] dmaengine: tegra210-adma: Don't program FIFO threshold Jon Hunter
@ 2019-06-20  8:47 ` Thierry Reding
  2019-07-05  6:31 ` Vinod Koul
  1 sibling, 0 replies; 3+ messages in thread
From: Thierry Reding @ 2019-06-20  8:47 UTC (permalink / raw)
  To: Jon Hunter
  Cc: Laxman Dewangan, Vinod Koul, dmaengine, linux-tegra, Sameer Pujar

[-- Attachment #1: Type: text/plain, Size: 957 bytes --]

On Thu, Jun 20, 2019 at 08:54:24AM +0100, Jon Hunter wrote:
> From: Jonathan Hunter <jonathanh@nvidia.com>
> 
> The Tegra210 ADMA supports two modes for transferring data to a FIFO
> which are ...
> 
> 1. Transfer data to/from the FIFO as soon as a single burst can be
>    transferred.
> 2. Transfer data to/from the FIFO based upon FIFO thresholds, where
>    the FIFO threshold is specified in terms on multiple bursts.
> 
> Currently, the ADMA driver programs the FIFO threshold values in the
> FIFO_CTRL register, but never enables the transfer mode that uses
> these threshold values. Given that these have never been used so far,
> simplify the ADMA driver by removing the programming of these threshold
> values.
> 
> Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com>
> ---
>  drivers/dma/tegra210-adma.c | 12 ++----------
>  1 file changed, 2 insertions(+), 10 deletions(-)

Acked-by: Thierry Reding <treding@nvidia.com>

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] dmaengine: tegra210-adma: Don't program FIFO threshold
  2019-06-20  7:54 [PATCH] dmaengine: tegra210-adma: Don't program FIFO threshold Jon Hunter
  2019-06-20  8:47 ` Thierry Reding
@ 2019-07-05  6:31 ` Vinod Koul
  1 sibling, 0 replies; 3+ messages in thread
From: Vinod Koul @ 2019-07-05  6:31 UTC (permalink / raw)
  To: Jon Hunter
  Cc: Laxman Dewangan, Thierry Reding, dmaengine, linux-tegra, Sameer Pujar

On 20-06-19, 08:54, Jon Hunter wrote:
> From: Jonathan Hunter <jonathanh@nvidia.com>
> 
> The Tegra210 ADMA supports two modes for transferring data to a FIFO
> which are ...
> 
> 1. Transfer data to/from the FIFO as soon as a single burst can be
>    transferred.
> 2. Transfer data to/from the FIFO based upon FIFO thresholds, where
>    the FIFO threshold is specified in terms on multiple bursts.
> 
> Currently, the ADMA driver programs the FIFO threshold values in the
> FIFO_CTRL register, but never enables the transfer mode that uses
> these threshold values. Given that these have never been used so far,
> simplify the ADMA driver by removing the programming of these threshold
> values.

This fails to apply for me, please rebase and send

-- 
~Vinod

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2019-06-20  7:54 [PATCH] dmaengine: tegra210-adma: Don't program FIFO threshold Jon Hunter
2019-06-20  8:47 ` Thierry Reding
2019-07-05  6:31 ` Vinod Koul

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