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* [PATCH v1] dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
@ 2019-06-21 13:19 Andy Shevchenko
  2019-06-24  4:20 ` Viresh Kumar
  2019-06-25  4:33 ` Vinod Koul
  0 siblings, 2 replies; 3+ messages in thread
From: Andy Shevchenko @ 2019-06-21 13:19 UTC (permalink / raw)
  To: Viresh Kumar, dmaengine, Vinod Koul, Dan Williams; +Cc: Andy Shevchenko

Intel Elkhart Lake OSE (Offload Service Engine) provides few DMA controllers
to the host. Enable them in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/dma/dw/pci.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
index c69e80d97220..7a53c6a94957 100644
--- a/drivers/dma/dw/pci.c
+++ b/drivers/dma/dw/pci.c
@@ -143,6 +143,11 @@ static const struct pci_device_id dw_pci_id_table[] = {
 	{ PCI_VDEVICE(INTEL, 0x2286), (kernel_ulong_t)&dw_pci_data },
 	{ PCI_VDEVICE(INTEL, 0x22c0), (kernel_ulong_t)&dw_pci_data },
 
+	/* Elkhart Lake iDMA 32-bit (OSE DMA) */
+	{ PCI_VDEVICE(INTEL, 0x4bb4), (kernel_ulong_t)&idma32_pci_data },
+	{ PCI_VDEVICE(INTEL, 0x4bb5), (kernel_ulong_t)&idma32_pci_data },
+	{ PCI_VDEVICE(INTEL, 0x4bb6), (kernel_ulong_t)&idma32_pci_data },
+
 	/* Haswell */
 	{ PCI_VDEVICE(INTEL, 0x9c60), (kernel_ulong_t)&dw_pci_data },
 
-- 
2.20.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v1] dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
  2019-06-21 13:19 [PATCH v1] dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake Andy Shevchenko
@ 2019-06-24  4:20 ` Viresh Kumar
  2019-06-25  4:33 ` Vinod Koul
  1 sibling, 0 replies; 3+ messages in thread
From: Viresh Kumar @ 2019-06-24  4:20 UTC (permalink / raw)
  To: Andy Shevchenko; +Cc: Viresh Kumar, dmaengine, Vinod Koul, Dan Williams

On 21-06-19, 16:19, Andy Shevchenko wrote:
> Intel Elkhart Lake OSE (Offload Service Engine) provides few DMA controllers
> to the host. Enable them in the driver.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  drivers/dma/dw/pci.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
> index c69e80d97220..7a53c6a94957 100644
> --- a/drivers/dma/dw/pci.c
> +++ b/drivers/dma/dw/pci.c
> @@ -143,6 +143,11 @@ static const struct pci_device_id dw_pci_id_table[] = {
>  	{ PCI_VDEVICE(INTEL, 0x2286), (kernel_ulong_t)&dw_pci_data },
>  	{ PCI_VDEVICE(INTEL, 0x22c0), (kernel_ulong_t)&dw_pci_data },
>  
> +	/* Elkhart Lake iDMA 32-bit (OSE DMA) */
> +	{ PCI_VDEVICE(INTEL, 0x4bb4), (kernel_ulong_t)&idma32_pci_data },
> +	{ PCI_VDEVICE(INTEL, 0x4bb5), (kernel_ulong_t)&idma32_pci_data },
> +	{ PCI_VDEVICE(INTEL, 0x4bb6), (kernel_ulong_t)&idma32_pci_data },
> +
>  	/* Haswell */
>  	{ PCI_VDEVICE(INTEL, 0x9c60), (kernel_ulong_t)&dw_pci_data },
>  

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v1] dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
  2019-06-21 13:19 [PATCH v1] dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake Andy Shevchenko
  2019-06-24  4:20 ` Viresh Kumar
@ 2019-06-25  4:33 ` Vinod Koul
  1 sibling, 0 replies; 3+ messages in thread
From: Vinod Koul @ 2019-06-25  4:33 UTC (permalink / raw)
  To: Andy Shevchenko; +Cc: Viresh Kumar, dmaengine, Dan Williams

On 21-06-19, 16:19, Andy Shevchenko wrote:
> Intel Elkhart Lake OSE (Offload Service Engine) provides few DMA controllers
> to the host. Enable them in the driver.

Applied, thanks

-- 
~Vinod

^ permalink raw reply	[flat|nested] 3+ messages in thread

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Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2019-06-21 13:19 [PATCH v1] dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake Andy Shevchenko
2019-06-24  4:20 ` Viresh Kumar
2019-06-25  4:33 ` Vinod Koul

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