dmaengine Archive on lore.kernel.org
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From: Vinod Koul <vkoul@kernel.org>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: Laxman Dewangan <ldewangan@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	dmaengine@vger.kernel.org, linux-tegra@vger.kernel.org,
	Sameer Pujar <spujar@nvidia.com>
Subject: Re: [PATCH] dmaengine: tegra210-adma: Don't program FIFO threshold
Date: Fri, 5 Jul 2019 12:01:10 +0530
Message-ID: <20190705063110.GX2911@vkoul-mobl> (raw)
In-Reply-To: <20190620075424.14795-1-jonathanh@nvidia.com>

On 20-06-19, 08:54, Jon Hunter wrote:
> From: Jonathan Hunter <jonathanh@nvidia.com>
> 
> The Tegra210 ADMA supports two modes for transferring data to a FIFO
> which are ...
> 
> 1. Transfer data to/from the FIFO as soon as a single burst can be
>    transferred.
> 2. Transfer data to/from the FIFO based upon FIFO thresholds, where
>    the FIFO threshold is specified in terms on multiple bursts.
> 
> Currently, the ADMA driver programs the FIFO threshold values in the
> FIFO_CTRL register, but never enables the transfer mode that uses
> these threshold values. Given that these have never been used so far,
> simplify the ADMA driver by removing the programming of these threshold
> values.

This fails to apply for me, please rebase and send

-- 
~Vinod

      parent reply index

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-20  7:54 Jon Hunter
2019-06-20  8:47 ` Thierry Reding
2019-07-05  6:31 ` Vinod Koul [this message]

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