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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc: dmaengine@vger.kernel.org, Viresh Kumar <vireshk@kernel.org>,
	Vinod Koul <vkoul@kernel.org>
Subject: Re: [PATCH] dmaengine: dw: Update Intel Elkhart Lake Service Engine acronym
Date: Tue, 13 Aug 2019 17:07:29 +0300
Message-ID: <20190813140729.GC30120@smile.fi.intel.com> (raw)
In-Reply-To: <20190813080602.15376-1-jarkko.nikula@linux.intel.com>

On Tue, Aug 13, 2019 at 11:06:02AM +0300, Jarkko Nikula wrote:
> Intel Elkhart Lake Offload Service Engine (OSE) will be called as
> Intel(R) Programmable Services Engine (Intel(R) PSE) in documentation.
> 
> Update the comment here accordingly.

Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

Seems similar we need for UART.

> 
> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> ---
>  drivers/dma/dw/pci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
> index 8de87b15a988..ad6db1cc287e 100644
> --- a/drivers/dma/dw/pci.c
> +++ b/drivers/dma/dw/pci.c
> @@ -143,7 +143,7 @@ static const struct pci_device_id dw_pci_id_table[] = {
>  	{ PCI_VDEVICE(INTEL, 0x2286), (kernel_ulong_t)&dw_pci_data },
>  	{ PCI_VDEVICE(INTEL, 0x22c0), (kernel_ulong_t)&dw_pci_data },
>  
> -	/* Elkhart Lake iDMA 32-bit (OSE DMA) */
> +	/* Elkhart Lake iDMA 32-bit (PSE DMA) */
>  	{ PCI_VDEVICE(INTEL, 0x4bb4), (kernel_ulong_t)&idma32_pci_data },
>  	{ PCI_VDEVICE(INTEL, 0x4bb5), (kernel_ulong_t)&idma32_pci_data },
>  	{ PCI_VDEVICE(INTEL, 0x4bb6), (kernel_ulong_t)&idma32_pci_data },
> -- 
> 2.20.1
> 

-- 
With Best Regards,
Andy Shevchenko



  reply index

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-13  8:06 Jarkko Nikula
2019-08-13 14:07 ` Andy Shevchenko [this message]
2019-08-13 14:17   ` Jarkko Nikula
2019-08-13 14:45     ` Andy Shevchenko
2019-08-19  8:32 ` Viresh Kumar
2019-08-20 11:09 ` Vinod Koul

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