From: Peter Ujfalusi <peter.ujfalusi@ti.com> To: <vkoul@kernel.org>, <robh+dt@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org> Cc: <dan.j.williams@intel.com>, <dmaengine@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <grygorii.strashko@ti.com>, <lokeshvutla@ti.com>, <t-kristo@ti.com>, <tony@atomide.com>, <j-keerthy@ti.com> Subject: [PATCH v6 16/17] firmware: ti_sci: rm: Add support for tx_tdtype parameter for tx channel Date: Thu, 28 Nov 2019 12:59:44 +0200 Message-ID: <20191128105945.13071-17-peter.ujfalusi@ti.com> (raw) In-Reply-To: <20191128105945.13071-1-peter.ujfalusi@ti.com> The system controller's resource manager have support for configuring the TDTYPE of TCHAN_CFG register on j721e. With this parameter the teardown completion can be controlled: TDTYPE == 0: Return without waiting for peer to complete the teardown TDTYPE == 1: Wait for peer to complete the teardown Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> --- drivers/firmware/ti_sci.c | 1 + drivers/firmware/ti_sci.h | 7 +++++++ include/linux/soc/ti/ti_sci_protocol.h | 2 ++ 3 files changed, 10 insertions(+) diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index 4126be9e3216..f13e4a96f3b7 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -2412,6 +2412,7 @@ static int ti_sci_cmd_rm_udmap_tx_ch_cfg(const struct ti_sci_handle *handle, req->fdepth = params->fdepth; req->tx_sched_priority = params->tx_sched_priority; req->tx_burst_size = params->tx_burst_size; + req->tx_tdtype = params->tx_tdtype; ret = ti_sci_do_xfer(info, xfer); if (ret) { diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h index f0d068c03944..255327171dae 100644 --- a/drivers/firmware/ti_sci.h +++ b/drivers/firmware/ti_sci.h @@ -910,6 +910,7 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg { * 12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count * 13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth * 14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size + * 15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype * * @nav_id: SoC device ID of Navigator Subsystem where tx channel is located * @@ -973,6 +974,11 @@ struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg { * * @tx_burst_size: UDMAP transmit channel burst size configuration to be * programmed into the tx_burst_size field of the TCHAN_TCFG register. + * + * @tx_tdtype: UDMAP transmit channel teardown type configuration to be + * programmed into the tdtype field of the TCHAN_TCFG register: + * 0 - Return immediately + * 1 - Wait for completion message from remote peer */ struct ti_sci_msg_rm_udmap_tx_ch_cfg_req { struct ti_sci_msg_hdr hdr; @@ -994,6 +1000,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg_req { u16 fdepth; u8 tx_sched_priority; u8 tx_burst_size; + u8 tx_tdtype; } __packed; /** diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h index 9531ec823298..f3aed0b91564 100644 --- a/include/linux/soc/ti/ti_sci_protocol.h +++ b/include/linux/soc/ti/ti_sci_protocol.h @@ -342,6 +342,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg { #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12) #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13) +#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID BIT(15) u16 nav_id; u16 index; u8 tx_pause_on_err; @@ -359,6 +360,7 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg { u16 fdepth; u8 tx_sched_priority; u8 tx_burst_size; + u8 tx_tdtype; }; /** -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next prev parent reply index Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-28 10:59 [PATCH v6 00/17] dmaengine/soc: Add Texas Instruments UDMA support Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 01/17] bindings: soc: ti: add documentation for k3 ringacc Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 02/17] soc: ti: k3: add navss ringacc driver Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 03/17] dmaengine: doc: Add sections for per descriptor metadata support Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 04/17] dmaengine: Add metadata_ops for dma_async_tx_descriptor Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 05/17] dmaengine: Add support for reporting DMA cached data amount Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 06/17] dmaengine: ti: Add cppi5 header for K3 NAVSS/UDMA Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 07/17] dmaengine: ti: k3 PSI-L remote endpoint configuration Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 08/17] dt-bindings: dma: ti: Add document for K3 UDMA Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 09/17] dmaengine: ti: New driver for K3 UDMA - split#1: defines, structs, io func Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 10/17] dmaengine: ti: New driver for K3 UDMA - split#2: probe/remove, xlate and filter_fn Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 11/17] dmaengine: ti: New driver for K3 UDMA - split#3: alloc/free chan_resources Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 12/17] dmaengine: ti: New driver for K3 UDMA - split#4: dma_device callbacks 1 Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 13/17] dmaengine: ti: New driver for K3 UDMA - split#5: dma_device callbacks 2 Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 14/17] dmaengine: ti: New driver for K3 UDMA - split#6: Kconfig and Makefile Peter Ujfalusi 2019-11-28 10:59 ` [PATCH v6 15/17] dmaengine: ti: k3-udma: Add glue layer for non DMAengine users Peter Ujfalusi 2019-11-28 10:59 ` Peter Ujfalusi [this message] 2019-11-28 10:59 ` [PATCH v6 17/17] dmaengine: ti: k3-udma: Wait for peer teardown completion if supported Peter Ujfalusi
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