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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Vinod Koul <vkoul@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
	Dan Williams <dan.j.williams@intel.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Arnd Bergmann <arnd@arndb.de>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Rob Herring <robh+dt@kernel.org>, <linux-mips@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <dmaengine@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v4 03/11] dmaengine: Introduce min burst length capability
Date: Fri, 29 May 2020 01:23:53 +0300	[thread overview]
Message-ID: <20200528222401.26941-4-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20200528222401.26941-1-Sergey.Semin@baikalelectronics.ru>

Some hardware aside from default 0/1 may have greater minimum burst
transactions length constraints. Here we introduce the DMA device
and slave capability, which if required can be initialized by the DMA
engine driver with the device-specific value.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org

---

Changelog v3:
- This is a new patch created as a result of the discussion with Vinud and
  Andy in the framework of DW DMA burst and LLP capabilities.
---
 drivers/dma/dmaengine.c   | 1 +
 include/linux/dmaengine.h | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index d31076d9ef25..b332ffe52780 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -590,6 +590,7 @@ int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
 	caps->src_addr_widths = device->src_addr_widths;
 	caps->dst_addr_widths = device->dst_addr_widths;
 	caps->directions = device->directions;
+	caps->min_burst = device->min_burst;
 	caps->max_burst = device->max_burst;
 	caps->residue_granularity = device->residue_granularity;
 	caps->descriptor_reuse = device->descriptor_reuse;
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index e1c03339918f..0c7403b27133 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -465,6 +465,7 @@ enum dma_residue_granularity {
  *	Since the enum dma_transfer_direction is not defined as bit flag for
  *	each type, the dma controller should set BIT(<TYPE>) and same
  *	should be checked by controller as well
+ * @min_burst: min burst capability per-transfer
  * @max_burst: max burst capability per-transfer
  * @cmd_pause: true, if pause is supported (i.e. for reading residue or
  *	       for resume later)
@@ -478,6 +479,7 @@ struct dma_slave_caps {
 	u32 src_addr_widths;
 	u32 dst_addr_widths;
 	u32 directions;
+	u32 min_burst;
 	u32 max_burst;
 	bool cmd_pause;
 	bool cmd_resume;
@@ -769,6 +771,7 @@ struct dma_filter {
  *	Since the enum dma_transfer_direction is not defined as bit flag for
  *	each type, the dma controller should set BIT(<TYPE>) and same
  *	should be checked by controller as well
+ * @min_burst: min burst capability per-transfer
  * @max_burst: max burst capability per-transfer
  * @residue_granularity: granularity of the transfer residue reported
  *	by tx_status
@@ -839,6 +842,7 @@ struct dma_device {
 	u32 src_addr_widths;
 	u32 dst_addr_widths;
 	u32 directions;
+	u32 min_burst;
 	u32 max_burst;
 	bool descriptor_reuse;
 	enum dma_residue_granularity residue_granularity;
-- 
2.26.2


  parent reply	other threads:[~2020-05-28 22:28 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-28 22:23 [PATCH v4 00/11] dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account Serge Semin
2020-05-28 22:23 ` [PATCH v4 01/11] dt-bindings: dma: dw: Convert DW DMAC to DT binding Serge Semin
2020-05-28 22:23 ` [PATCH v4 02/11] dt-bindings: dma: dw: Add max burst transaction length property Serge Semin
2020-05-28 22:23 ` Serge Semin [this message]
2020-05-29 12:07   ` [PATCH v4 03/11] dmaengine: Introduce min burst length capability Andy Shevchenko
2020-05-28 22:23 ` [PATCH v4 04/11] dmaengine: Introduce max SG list entries capability Serge Semin
2020-05-28 22:23 ` [PATCH v4 05/11] dmaengine: Introduce DMA-device device_caps callback Serge Semin
2020-05-29 12:12   ` Andy Shevchenko
2020-05-29 14:07     ` Serge Semin
2020-05-28 22:23 ` [PATCH v4 06/11] dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config Serge Semin
2020-05-28 22:23 ` [PATCH v4 07/11] dmaengine: dw: Set DMA device max segment size parameter Serge Semin
2020-05-29 12:18   ` Andy Shevchenko
2020-05-28 22:23 ` [PATCH v4 08/11] dmaengine: dw: Add dummy device_caps callback Serge Semin
2020-05-29 12:19   ` Andy Shevchenko
2020-05-28 22:23 ` [PATCH v4 09/11] dmaengine: dw: Initialize min_burst capability Serge Semin
2020-05-29 10:25   ` Andy Shevchenko
2020-05-29 10:29     ` Andy Shevchenko
2020-05-29 10:41       ` Serge Semin
2020-05-29 10:50         ` Andy Shevchenko
2020-05-29 10:51           ` Serge Semin
2020-05-28 22:24 ` [PATCH v4 10/11] dmaengine: dw: Introduce max burst length hw config Serge Semin
2020-05-29 10:27   ` Andy Shevchenko
2020-05-28 22:24 ` [PATCH v4 11/11] dmaengine: dw: Initialize max_sg_nents capability Serge Semin
2020-05-29 10:27   ` Andy Shevchenko

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