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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: dmaengine@vger.kernel.org, Michal Simek <michal.simek@xilinx.com>,
	Hyun Kwon <hyun.kwon@xilinx.com>,
	Tejas Upadhyay <tejasu@xilinx.com>,
	Satish Kumar Nagireddy <SATISHNA@xilinx.com>,
	Peter Ujfalusi <peter.ujfalusi@ti.com>
Subject: Re: [PATCH v5 4/6] dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver
Date: Fri, 3 Jul 2020 20:43:58 +0300	[thread overview]
Message-ID: <20200703174358.GD14282@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20200703173239.GP273932@vkoul-mobl>

Hi Vinod,

On Fri, Jul 03, 2020 at 11:02:39PM +0530, Vinod Koul wrote:
> On 28-05-20, 05:52, Laurent Pinchart wrote:
> 
> > +++ b/drivers/dma/xilinx/xilinx_dpdma.c
> > @@ -0,0 +1,1554 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Xilinx ZynqMP DPDMA Engine driver
> > + *
> > + * Copyright (C) 2015 - 2019 Xilinx, Inc.
> 
> 2020 please

I was accurate when the first version was submitted ;-) I'll update
this.

> > +static struct xilinx_dpdma_tx_desc *
> > +xilinx_dpdma_chan_alloc_tx_desc(struct xilinx_dpdma_chan *chan)
> > +{
> > +	struct xilinx_dpdma_tx_desc *tx_desc;
> > +
> > +	tx_desc = kzalloc(sizeof(*tx_desc), GFP_KERNEL);
> 
> GFP_NOWAIT please, this is called from a prep call so needs to be atomic
> context

That's an easy change, but it's an annoying one. No user of this driver
will ever prepare descriptors in atomic context. This would thus put
unnecessary burden on the system memory, possibly depriving a real user
of GFP_NOWAIT from precious memory.

> > +static int xilinx_dpdma_config(struct dma_chan *dchan,
> > +			       struct dma_slave_config *config)
> > +{
> > +	struct xilinx_dpdma_chan *chan = to_xilinx_chan(dchan);
> > +	unsigned long flags;
> > +	int ret = 0;
> > +
> > +	if (config->direction != DMA_MEM_TO_DEV)
> > +		return -EINVAL;
> 
> sorry but direction is deprecated and supposed to be remove, can you
> please remove this

Sure.

Removing the direction field through the whole subsystem would be nice
to avoid this mistake in new drivers.

> > +
> > +	/*
> > +	 * The destination address doesn't need to be specified as the DPDMA is
> > +	 * hardwired to the destination (the DP controller). The transfer
> > +	 * width, burst size and port window size are thus meaningless, they're
> > +	 * fixed both on the DPDMA side and on the DP controller side.
> > +	 */
> > +
> > +	spin_lock_irqsave(&chan->lock, flags);
> > +
> > +	/* Can't reconfigure a running channel. */
> > +	if (chan->running) {
> > +		ret = -EBUSY;
> > +		goto unlock;
> > +	}
> 
> why does this part matter? The configuration is passed here and should
> be applied to next descriptor submitted, channel can be busy.

I'll drop it.

> > +
> > +	/*
> > +	 * Abuse the slave_id to indicate that the channel is part of a video
> > +	 * group.
> > +	 */
> 
> Of course, what does video grp mean here? 

When the frame to be displayed is made of multiple planes, multiple DMA
channels have to be used, one per plane. The channels have to be
synchronized and operated together by the driver. The video_group field
is a boolean indicating that the channel is part of such a group.

> > +	if (chan->id >= ZYNQMP_DPDMA_VIDEO0 && chan->id <= ZYNQMP_DPDMA_VIDEO2)
> > +		chan->video_group = config->slave_id != 0;
> 
> so only thing we care here is slave_id? What about dma burst parameters?

The hardware hardware doesn't have any burst parameter that can be
configured. It's a DMA engine dedicated to the display device, most
parameters are thus hardcoded at the hardware level, as explained by the
comment above.

-- 
Regards,

Laurent Pinchart

  reply	other threads:[~2020-07-03 17:44 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-28  2:52 [PATCH v5 0/6] dma: Add Xilinx ZynqMP DPDMA driver Laurent Pinchart
2020-05-28  2:52 ` [PATCH v5 1/6] dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA Laurent Pinchart
2020-05-28  2:52 ` [PATCH v5 2/6] dmaengine: virt-dma: Use lockdep to check locking requirements Laurent Pinchart
2020-05-28  2:52 ` [PATCH v5 3/6] dmaengine: Add support for repeating transactions Laurent Pinchart
2020-07-03 17:10   ` Vinod Koul
2020-07-03 17:22     ` Laurent Pinchart
2020-07-03 17:37       ` Vinod Koul
2020-07-03 17:47         ` Laurent Pinchart
2020-07-03 17:54           ` Vinod Koul
2020-07-08 20:19             ` Laurent Pinchart
2020-05-28  2:52 ` [PATCH v5 4/6] dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver Laurent Pinchart
2020-07-03 17:32   ` Vinod Koul
2020-07-03 17:43     ` Laurent Pinchart [this message]
2020-05-28  2:52 ` [PATCH v5 5/6] dmaengine: xilinx: dpdma: Add debugfs support Laurent Pinchart
2020-05-28  2:52 ` [PATCH v5 6/6] arm64: dts: zynqmp: Add DPDMA node Laurent Pinchart
2020-06-29  9:30 ` [PATCH v5 0/6] dma: Add Xilinx ZynqMP DPDMA driver Laurent Pinchart
2020-06-29  9:56   ` Vinod Koul
2020-06-29 23:39     ` Laurent Pinchart

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