From: Vinod Koul <vkoul@kernel.org>
To: Dave Jiang <dave.jiang@intel.com>
Cc: bp@alien8.de, dan.j.williams@intel.com, tony.luck@intel.com,
ashok.raj@intel.com, kevin.tian@intel.com, fenghua.yu@intel.com,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 0/5] Add shared workqueue support for idxd driver
Date: Wed, 7 Oct 2020 12:31:32 +0530 [thread overview]
Message-ID: <20201007070132.GT2968@vkoul-mobl> (raw)
In-Reply-To: <20201005151126.657029-1-dave.jiang@intel.com>
On 05-10-20, 08:11, Dave Jiang wrote:
> == Background ==
> A typical DMA device requires the driver to translate application buffers to hardware addresses,
> and a kernel-user transition to notify the hardware of new work. Shared Virtual Addressing (SVA)
> allows the processor and device to use the same virtual addresses without requiring software to
> translate between the address spaces. ENQCMD is a new instruction on Intel Platforms that allows
> user applications to directly notify hardware of new work, much like how doorbells are used in
> some hardware, but it carries a payload along with it. ENQCMDS is the supervisor version (ring0)
> of ENQCMD.
>
> == ENQCMDS ==
> Introduce enqcmds(), a helper funciton that copies an input payload to a 64B aligned
> destination and confirms whether the payload was accepted by the device or not.
> enqcmds() wraps the new ENQCMDS CPU instruction. The ENQCMDS is a ring 0 CPU instruction that
> performs similar to the ENQCMD instruction. Descriptor submission must use ENQCMD(S) for shared
> workqueues (swq) on an Intel DSA device.
>
> == Shared WQ support ==
> Introduce shared workqueue (swq) support for the idxd driver. The current idxd driver contains
> dedicated workqueue (dwq) support only. A dwq accepts descriptors from a MOVDIR64B instruction.
> MOVDIR64B is a posted instruction on the PCIe bus, it does not wait for any response from the
> device. If the wq is full, submitted descriptors are dropped. A swq utilizes the ENQCMDS in
> ring 0, which is a non-posted instruction. The zero flag would be set to 1 if the device rejects
> the descriptor or if the wq is full. A swq can be shared between multiple users
> (kernel or userspace) due to not having to keep track of the wq full condition for submission.
> A swq requires PASID and can only run with SVA support.
>
> == IDXD SVA support ==
> Add utilization of PASID to support Shared Virtual Addressing (SVA). With PASID support,
> the descriptors can be programmed with host virtual address (HVA) rather than IOVA.
> The hardware will work with the IOMMU in fulfilling page requests. With SVA support,
> a user app using the char device interface can now submit descriptors without having to pin the
> virtual memory range it wants to DMA in its own address space.
>
> The series does not add SVA support for the dmaengine subsystem. That support is coming at a
> later time.
Applied, thanks
--
~Vinod
next prev parent reply other threads:[~2020-10-07 7:01 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-05 15:11 [PATCH v7 0/5] Add shared workqueue support for idxd driver Dave Jiang
2020-10-05 15:11 ` [PATCH v7 1/5] x86/asm: Carve out a generic movdir64b() helper for general usage Dave Jiang
2020-10-05 15:11 ` [PATCH v7 2/5] x86/asm: Add an enqcmds() wrapper for the ENQCMDS instruction Dave Jiang
2020-10-05 15:11 ` [PATCH v7 3/5] dmaengine: idxd: Add shared workqueue support Dave Jiang
2020-10-05 15:11 ` [PATCH v7 4/5] dmaengine: idxd: Clean up descriptors with fault error Dave Jiang
2020-10-05 15:11 ` [PATCH v7 5/5] dmaengine: idxd: Add ABI documentation for shared wq Dave Jiang
2020-10-07 7:01 ` Vinod Koul [this message]
2020-10-07 8:48 ` [PATCH v7 0/5] Add shared workqueue support for idxd driver Borislav Petkov
2020-10-07 9:53 ` Vinod Koul
2020-10-07 10:04 ` Borislav Petkov
2020-10-07 14:57 ` Vinod Koul
2020-10-07 16:16 ` Borislav Petkov
2020-10-07 16:50 ` Dave Jiang
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