From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46B6EC433DF for ; Tue, 13 Oct 2020 07:02:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E85FC206BE for ; Tue, 13 Oct 2020 07:02:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602572562; bh=CdGLyzoceA7IR6xBCuhHfMXfwiqH0FI40eWrZh6vN8E=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=EBMYzeip7+T5KI4JZEo7SyEFYl4Tw3HAaDPmMpzXeovOnaNZ2pPI5HpLsEM9VPqVf GBo78s3YqekWRbGmFGTa6R0ETdrfYt2UzF9psA2cD0UEnhlWEiHQ/zs1VuGKVAb7N3 Dl+14GcGd0eY5wDCLafplERm/VHIiXsjDqyJWq6s= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389837AbgJMHCg (ORCPT ); Tue, 13 Oct 2020 03:02:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:46274 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389813AbgJMHCe (ORCPT ); Tue, 13 Oct 2020 03:02:34 -0400 Received: from localhost (unknown [122.171.192.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7CEB820678; Tue, 13 Oct 2020 07:02:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602572553; bh=CdGLyzoceA7IR6xBCuhHfMXfwiqH0FI40eWrZh6vN8E=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=obJm+8kbS5+6mrjArdd0VtzEKE8xfL48hSr7fFvT+NcCRiOiH/Hs9Gi9IkPPEgy6Z 1XOMSHY/FCCDe/IWN5YV3RrwC+tbkvh6Xkme9VrtZiGUcjb70KxFhB5ypKifn3ZhRn m5Tic5NStQOSnhQ46AMBmdR9Gi2yyIvVCbxUjpFg= Date: Tue, 13 Oct 2020 12:32:26 +0530 From: Vinod Koul To: Rob Herring Cc: dmaengine@vger.kernel.org, Bjorn Andersson , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Ujfalusi Subject: Re: [PATCH v4 1/3] dt-bindings: dmaengine: Document qcom,gpi dma binding Message-ID: <20201013070226.GO2968@vkoul-mobl> References: <20201008123151.764238-1-vkoul@kernel.org> <20201008123151.764238-2-vkoul@kernel.org> <20201012185737.GA1905980@bogus> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201012185737.GA1905980@bogus> Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On 12-10-20, 13:57, Rob Herring wrote: > On Thu, Oct 08, 2020 at 06:01:49PM +0530, Vinod Koul wrote: > > Add devicetree binding documentation for GPI DMA controller > > implemented on Qualcomm SoCs > > > > Signed-off-by: Vinod Koul > > --- > > .../devicetree/bindings/dma/qcom,gpi.yaml | 86 +++++++++++++++++++ > > include/dt-bindings/dma/qcom-gpi.h | 11 +++ > > 2 files changed, 97 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/dma/qcom,gpi.yaml > > create mode 100644 include/dt-bindings/dma/qcom-gpi.h > > > > diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml > > new file mode 100644 > > index 000000000000..4470c1b2fd6c > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml > > @@ -0,0 +1,86 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm Technologies Inc GPI DMA controller > > + > > +maintainers: > > + - Vinod Koul > > + > > +description: | > > + QCOM GPI DMA controller provides DMA capabilities for > > + peripheral buses such as I2C, UART, and SPI. > > + > > +allOf: > > + - $ref: "dma-controller.yaml#" > > + > > +properties: > > + compatible: > > + enum: > > + - qcom,sdm845-gpi-dma > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + description: > > + Interrupt lines for each GPI instance > > + maxItems: 13 > > + > > + "#dma-cells": > > + const: 3 > > + description: > > > + DMA clients must use the format described in dma.txt, giving a phandle > > + to the DMA controller plus the following 3 integer cells: > > + - channel: if set to 0xffffffff, any available channel will be allocated > > + for the client. Otherwise, the exact channel specified will be used. > > + - seid: serial id of the client as defined in the SoC documentation. > > + - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h > > + > > + iommus: > > + maxItems: 1 > > + > > + dma-channels: > > + maximum: 31 > > + > > + dma-channel-mask: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - "#dma-cells" > > + - iommus > > + - dma-channels > > + - dma-channel-mask > > additionalProperties: false > > With that, > > Reviewed-by: Rob Herring Thanks will update while applying ... after merge window -- ~Vinod