From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: <vkoul@kernel.org>
Cc: <dan.j.williams@intel.com>, <linux-kernel@vger.kernel.org>,
<dmaengine@vger.kernel.org>, <vigneshr@ti.com>,
<grygorii.strashko@ti.com>, <kishon@ti.com>
Subject: [PATCH 1/2] dmaengine: Extend the dmaengine_alignment for 128 and 256 bytes
Date: Mon, 14 Dec 2020 10:13:09 +0200 [thread overview]
Message-ID: <20201214081310.10746-2-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <20201214081310.10746-1-peter.ujfalusi@ti.com>
Some DMA device can benefit with higher order of alignment than the maximum
of 64 bytes currently defined.
Define 128 and 256 bytes alignment for these devices.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
include/linux/dmaengine.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 68130f5f599e..004736b6a9c8 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -745,6 +745,8 @@ enum dmaengine_alignment {
DMAENGINE_ALIGN_16_BYTES = 4,
DMAENGINE_ALIGN_32_BYTES = 5,
DMAENGINE_ALIGN_64_BYTES = 6,
+ DMAENGINE_ALIGN_128_BYTES = 7,
+ DMAENGINE_ALIGN_256_BYTES = 8,
};
/**
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next prev parent reply other threads:[~2020-12-14 8:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-14 8:13 [PATCH 0/2] dmaengine: ti: k3-udma: memcpy throughput improvement Peter Ujfalusi
2020-12-14 8:13 ` Peter Ujfalusi [this message]
2020-12-14 8:13 ` [PATCH 2/2] dmaengine: ti: k3-udma: Add support for burst_size configuration for mem2mem Peter Ujfalusi
2021-01-12 10:16 ` Vinod Koul
2021-01-13 7:39 ` Péter Ujfalusi
2021-01-13 10:43 ` Vinod Koul
2021-01-12 3:37 ` [PATCH 0/2] dmaengine: ti: k3-udma: memcpy throughput improvement Kishon Vijay Abraham I
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