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* [PATCH 0/3] STM32 MDMA IRQ handler code cleaning
@ 2022-05-04 15:53 Amelie Delaunay
  2022-05-04 15:53 ` [PATCH 1/3] dmaengine: stm32-mdma: remove GISR1 register Amelie Delaunay
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Amelie Delaunay @ 2022-05-04 15:53 UTC (permalink / raw)
  To: Vinod Koul, Maxime Coquelin, Alexandre Torgue
  Cc: dmaengine, linux-stm32, linux-arm-kernel, linux-kernel, Amelie Delaunay

This patchset cleans stm32-mdma interrupt handler:
- GISR1 register is not used on any STM32 SoC with MDMA
- Remove chan wrong initialization
- Lower the log level to debug instead of warn in case of spurious it
  on stopped channel

Amelie Delaunay (3):
  dmaengine: stm32-mdma: remove GISR1 register
  dmaengine: stm32-mdma: fix chan initialization in
    stm32_mdma_irq_handler()
  dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it

 drivers/dma/stm32-mdma.c | 32 ++++++++++++--------------------
 1 file changed, 12 insertions(+), 20 deletions(-)

-- 
2.25.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/3] dmaengine: stm32-mdma: remove GISR1 register
  2022-05-04 15:53 [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Amelie Delaunay
@ 2022-05-04 15:53 ` Amelie Delaunay
  2022-05-04 15:53 ` [PATCH 2/3] dmaengine: stm32-mdma: fix chan initialization in stm32_mdma_irq_handler() Amelie Delaunay
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Amelie Delaunay @ 2022-05-04 15:53 UTC (permalink / raw)
  To: Vinod Koul, Maxime Coquelin, Alexandre Torgue
  Cc: dmaengine, linux-stm32, linux-arm-kernel, linux-kernel, Amelie Delaunay

GISR1 was described in a not up-to-date documentation when the stm32-mdma
driver has been developed. This register has not been added in reference
manual of STM32 SoC with MDMA, which have only 32 MDMA channels.
So remove it from stm32-mdma driver.

Fixes: a4ffb13c8946 ("dmaengine: Add STM32 MDMA driver")
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
 drivers/dma/stm32-mdma.c | 21 +++++----------------
 1 file changed, 5 insertions(+), 16 deletions(-)

diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index 95e5831e490a..57f0eb8a18fc 100644
--- a/drivers/dma/stm32-mdma.c
+++ b/drivers/dma/stm32-mdma.c
@@ -34,7 +34,6 @@
 #include "virt-dma.h"
 
 #define STM32_MDMA_GISR0		0x0000 /* MDMA Int Status Reg 1 */
-#define STM32_MDMA_GISR1		0x0004 /* MDMA Int Status Reg 2 */
 
 /* MDMA Channel x interrupt/status register */
 #define STM32_MDMA_CISR(x)		(0x40 + 0x40 * (x)) /* x = 0..62 */
@@ -169,7 +168,7 @@
 
 #define STM32_MDMA_MAX_BUF_LEN		128
 #define STM32_MDMA_MAX_BLOCK_LEN	65536
-#define STM32_MDMA_MAX_CHANNELS		63
+#define STM32_MDMA_MAX_CHANNELS		32
 #define STM32_MDMA_MAX_REQUESTS		256
 #define STM32_MDMA_MAX_BURST		128
 #define STM32_MDMA_VERY_HIGH_PRIORITY	0x3
@@ -1324,21 +1323,11 @@ static irqreturn_t stm32_mdma_irq_handler(int irq, void *devid)
 
 	/* Find out which channel generates the interrupt */
 	status = readl_relaxed(dmadev->base + STM32_MDMA_GISR0);
-	if (status) {
-		id = __ffs(status);
-	} else {
-		status = readl_relaxed(dmadev->base + STM32_MDMA_GISR1);
-		if (!status) {
-			dev_dbg(mdma2dev(dmadev), "spurious it\n");
-			return IRQ_NONE;
-		}
-		id = __ffs(status);
-		/*
-		 * As GISR0 provides status for channel id from 0 to 31,
-		 * so GISR1 provides status for channel id from 32 to 62
-		 */
-		id += 32;
+	if (!status) {
+		dev_dbg(mdma2dev(dmadev), "spurious it\n");
+		return IRQ_NONE;
 	}
+	id = __ffs(status);
 
 	chan = &dmadev->chan[id];
 	if (!chan) {
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/3] dmaengine: stm32-mdma: fix chan initialization in stm32_mdma_irq_handler()
  2022-05-04 15:53 [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Amelie Delaunay
  2022-05-04 15:53 ` [PATCH 1/3] dmaengine: stm32-mdma: remove GISR1 register Amelie Delaunay
@ 2022-05-04 15:53 ` Amelie Delaunay
  2022-05-04 15:53 ` [PATCH 3/3] dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it Amelie Delaunay
  2022-05-19 17:51 ` [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Vinod Koul
  3 siblings, 0 replies; 5+ messages in thread
From: Amelie Delaunay @ 2022-05-04 15:53 UTC (permalink / raw)
  To: Vinod Koul, Maxime Coquelin, Alexandre Torgue
  Cc: dmaengine, linux-stm32, linux-arm-kernel, linux-kernel, Amelie Delaunay

The parameter to pass back to the handler function when irq has been
requested is a struct stm32_mdma_device pointer, not a struct
stm32_mdma_chan pointer.
Even if chan is reinit later in the function, remove this wrong
initialization.

Fixes: a4ffb13c8946 ("dmaengine: Add STM32 MDMA driver")
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
 drivers/dma/stm32-mdma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index 57f0eb8a18fc..a5cbfbbb93d1 100644
--- a/drivers/dma/stm32-mdma.c
+++ b/drivers/dma/stm32-mdma.c
@@ -1318,7 +1318,7 @@ static void stm32_mdma_xfer_end(struct stm32_mdma_chan *chan)
 static irqreturn_t stm32_mdma_irq_handler(int irq, void *devid)
 {
 	struct stm32_mdma_device *dmadev = devid;
-	struct stm32_mdma_chan *chan = devid;
+	struct stm32_mdma_chan *chan;
 	u32 reg, id, ccr, ien, status;
 
 	/* Find out which channel generates the interrupt */
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 3/3] dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it
  2022-05-04 15:53 [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Amelie Delaunay
  2022-05-04 15:53 ` [PATCH 1/3] dmaengine: stm32-mdma: remove GISR1 register Amelie Delaunay
  2022-05-04 15:53 ` [PATCH 2/3] dmaengine: stm32-mdma: fix chan initialization in stm32_mdma_irq_handler() Amelie Delaunay
@ 2022-05-04 15:53 ` Amelie Delaunay
  2022-05-19 17:51 ` [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Vinod Koul
  3 siblings, 0 replies; 5+ messages in thread
From: Amelie Delaunay @ 2022-05-04 15:53 UTC (permalink / raw)
  To: Vinod Koul, Maxime Coquelin, Alexandre Torgue
  Cc: dmaengine, linux-stm32, linux-arm-kernel, linux-kernel, Amelie Delaunay

If interrupt occurs while !chan->busy, it means channel has been disabled
between the raise of the interruption and the read of status and ien, so,
spurious interrupt can be silently discarded.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
---
 drivers/dma/stm32-mdma.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c
index a5cbfbbb93d1..caf0cce8f528 100644
--- a/drivers/dma/stm32-mdma.c
+++ b/drivers/dma/stm32-mdma.c
@@ -1345,9 +1345,12 @@ static irqreturn_t stm32_mdma_irq_handler(int irq, void *devid)
 
 	if (!(status & ien)) {
 		spin_unlock(&chan->vchan.lock);
-		dev_warn(chan2dev(chan),
-			 "spurious it (status=0x%04x, ien=0x%04x)\n",
-			 status, ien);
+		if (chan->busy)
+			dev_warn(chan2dev(chan),
+				 "spurious it (status=0x%04x, ien=0x%04x)\n", status, ien);
+		else
+			dev_dbg(chan2dev(chan),
+				"spurious it (status=0x%04x, ien=0x%04x)\n", status, ien);
 		return IRQ_NONE;
 	}
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 0/3] STM32 MDMA IRQ handler code cleaning
  2022-05-04 15:53 [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Amelie Delaunay
                   ` (2 preceding siblings ...)
  2022-05-04 15:53 ` [PATCH 3/3] dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it Amelie Delaunay
@ 2022-05-19 17:51 ` Vinod Koul
  3 siblings, 0 replies; 5+ messages in thread
From: Vinod Koul @ 2022-05-19 17:51 UTC (permalink / raw)
  To: Amelie Delaunay
  Cc: Maxime Coquelin, Alexandre Torgue, dmaengine, linux-stm32,
	linux-arm-kernel, linux-kernel

On 04-05-22, 17:53, Amelie Delaunay wrote:
> This patchset cleans stm32-mdma interrupt handler:
> - GISR1 register is not used on any STM32 SoC with MDMA
> - Remove chan wrong initialization
> - Lower the log level to debug instead of warn in case of spurious it
>   on stopped channel

Applied, thanks

-- 
~Vinod

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2022-05-19 17:53 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-04 15:53 [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Amelie Delaunay
2022-05-04 15:53 ` [PATCH 1/3] dmaengine: stm32-mdma: remove GISR1 register Amelie Delaunay
2022-05-04 15:53 ` [PATCH 2/3] dmaengine: stm32-mdma: fix chan initialization in stm32_mdma_irq_handler() Amelie Delaunay
2022-05-04 15:53 ` [PATCH 3/3] dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it Amelie Delaunay
2022-05-19 17:51 ` [PATCH 0/3] STM32 MDMA IRQ handler code cleaning Vinod Koul

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