From: Lizhi Hou <lizhi.hou@amd.com>
To: "Martin Tůma" <tumic@gpxsee.org>
Cc: <dmaengine@vger.kernel.org>, <linux-i2c@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-media@vger.kernel.org>,
<martin.tuma@digiteqautomotive.com>, <mchehab@kernel.org>,
<michal.simek@xilinx.com>, <vkoul@kernel.org>
Subject: Re: [PATCH v2 2/3] Added Xilinx XDMA IP core driver
Date: Wed, 21 Sep 2022 08:15:07 -0700 [thread overview]
Message-ID: <921a1da6-e378-2632-7b68-ac59e3c24f68@amd.com> (raw)
In-Reply-To: <e084352e-a784-accd-f267-9e0c30c7a92b@gpxsee.org>
On 9/21/22 02:25, Martin Tůma wrote:
> > Currently, the V3 patch series does not support register user logic
> > interrupt yet.
>
> This is a showstopper for almost every XDMA based PCIe card. As the
> driver "consumes" the whole register space (including the user IRQs
> enable/disable registers), there is AFAIK no way how to enable the
> user IRQs when this driver is loaded.
>
> > Could you convert your driver to use this?
>
> Not without the user IRQs.
I provided the patch link for user logic IRQ support in previous reply.
You may pull it and patch it on top of the V3 patch series.
Lizhi
>
> M.
next prev parent reply other threads:[~2022-09-21 15:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-19 18:55 [PATCH v2 0/3] Digiteq Automotive MGB4 driver tumic
2022-09-19 18:55 ` [PATCH v2 1/3] Added platform module alias for the xiic I2C driver tumic
2022-09-20 14:30 ` Michal Simek
2022-09-19 18:55 ` [PATCH v2 2/3] Added Xilinx XDMA IP core driver tumic
2022-09-20 2:12 ` kernel test robot
2022-09-21 6:24 ` Lizhi Hou
2022-09-21 9:25 ` Martin Tůma
2022-09-21 15:15 ` Lizhi Hou [this message]
2022-09-21 15:35 ` Martin Tůma
2022-09-19 18:55 ` [PATCH v2 3/3] Added Digiteq Automotive MGB4 driver tumic
2022-10-03 5:19 ` kernel test robot
2022-09-21 5:32 ` [PATCH v2 0/3] " Sonal Santan
2022-09-21 9:44 ` Martin Tůma
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