dmaengine Archive on lore.kernel.org
 help / color / Atom feed
From: Amit Tomer <amittomer25@gmail.com>
To: "André Przywara" <andre.przywara@arm.com>
Cc: "Vinod Koul" <vkoul@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	dan.j.williams@intel.com, cristian.ciocaltea@gmail.com,
	dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-actions@lists.infradead.org
Subject: Re: [PATCH v4 02/10] dmaengine: Actions: Add support for S700 DMA engine
Date: Mon, 29 Jun 2020 13:58:31 +0530
Message-ID: <CABHD4K-uFzzHLcH8SXGYkn_ZburG-g0f-ECrefU2V61Fp+z3fQ@mail.gmail.com> (raw)
In-Reply-To: <75d154d0-2962-99e6-a7c7-bf0928ec8b2a@arm.com>

Hi,

On Wed, Jun 24, 2020 at 3:06 PM André Przywara <andre.przywara@arm.com> wrote:
>
> On 24/06/2020 07:15, Vinod Koul wrote:
>
> Hi,
>
> > On 09-06-20, 15:47, Amit Singh Tomar wrote:
> >
> >> @@ -372,6 +383,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
> >>                                struct dma_slave_config *sconfig,
> >>                                bool is_cyclic)
> >>  {
> >> +    struct owl_dma *od = to_owl_dma(vchan->vc.chan.device);
> >>      u32 mode, ctrlb;
> >>
> >>      mode = OWL_DMA_MODE_PW(0);
> >> @@ -427,14 +439,26 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan,
> >>      lli->hw[OWL_DMADESC_DADDR] = dst;
> >>      lli->hw[OWL_DMADESC_SRC_STRIDE] = 0;
> >>      lli->hw[OWL_DMADESC_DST_STRIDE] = 0;
> >> -    /*
> >> -     * Word starts from offset 0xC is shared between frame length
> >> -     * (max frame length is 1MB) and frame count, where first 20
> >> -     * bits are for frame length and rest of 12 bits are for frame
> >> -     * count.
> >> -     */
> >> -    lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20;
> >> -    lli->hw[OWL_DMADESC_CTRLB] = ctrlb;
> >> +
> >> +    if (od->devid == S700_DMA) {
> >> +            /* Max frame length is 1MB */
> >> +            lli->hw[OWL_DMADESC_FLEN] = len;
> >> +            /*
> >> +             * On S700, word starts from offset 0x1C is shared between
> >> +             * frame count and ctrlb, where first 12 bits are for frame
> >> +             * count and rest of 20 bits are for ctrlb.
> >> +             */
> >> +            lli->hw[OWL_DMADESC_CTRLB] = FCNT_VAL | ctrlb;
> >> +    } else {
> >> +            /*
> >> +             * On S900, word starts from offset 0xC is shared between
> >> +             * frame length (max frame length is 1MB) and frame count,
> >> +             * where first 20 bits are for frame length and rest of
> >> +             * 12 bits are for frame count.
> >> +             */
> >> +            lli->hw[OWL_DMADESC_FLEN] = len | FCNT_VAL << 20;
> >> +            lli->hw[OWL_DMADESC_CTRLB] = ctrlb;
> >
> > Unfortunately this wont scale, we will keep adding new conditions for
> > newer SoC's! So rather than this why not encode max frame length in
> > driver_data rather than S900_DMA/S700_DMA.. In future one can add values
> > for newer SoC and not code above logic again.
>
> What newer SoCs? I don't think we should try to guess the future here.
> We can always introduce further abstractions later, once we actually
> *know* what we are looking at.
>
Apart from it , we have *one* more SoC from Actions .i.e. S500 where
the DMA controller is
identical to S900, and requires *no* additional code to work properly.

So, I think we are safe to have the changes proposed in this patch.

Thanks

-Amit

  reply index

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1591697830-16311-1-git-send-email-amittomer25@gmail.com>
2020-06-09 10:17 ` [PATCH v4 01/10] dmaengine: Actions: get rid of bit fields from dma descriptor Amit Singh Tomar
2020-06-09 10:17 ` [PATCH v4 02/10] dmaengine: Actions: Add support for S700 DMA engine Amit Singh Tomar
2020-06-24  6:15   ` Vinod Koul
2020-06-24  9:35     ` André Przywara
2020-06-29  8:28       ` Amit Tomer [this message]
2020-06-29  9:54       ` Vinod Koul
2020-06-29 11:19         ` André Przywara
2020-06-29 13:21           ` Vinod Koul
2020-06-29  8:19     ` Amit Tomer
2020-06-29  9:52       ` Vinod Koul
2020-06-30  9:47         ` Amit Tomer
2020-06-30 14:24           ` Vinod Koul
2020-06-30 18:14             ` Amit Tomer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CABHD4K-uFzzHLcH8SXGYkn_ZburG-g0f-ECrefU2V61Fp+z3fQ@mail.gmail.com \
    --to=amittomer25@gmail.com \
    --cc=afaerber@suse.de \
    --cc=andre.przywara@arm.com \
    --cc=cristian.ciocaltea@gmail.com \
    --cc=dan.j.williams@intel.com \
    --cc=dmaengine@vger.kernel.org \
    --cc=linux-actions@lists.infradead.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

dmaengine Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/dmaengine/0 dmaengine/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 dmaengine dmaengine/ https://lore.kernel.org/dmaengine \
		dmaengine@vger.kernel.org
	public-inbox-index dmaengine

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.kernel.vger.dmaengine


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git