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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Hi, On Wed, Jun 24, 2020 at 3:06 PM Andr=C3=A9 Przywara wrote: > > On 24/06/2020 07:15, Vinod Koul wrote: > > Hi, > > > On 09-06-20, 15:47, Amit Singh Tomar wrote: > > > >> @@ -372,6 +383,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_v= chan *vchan, > >> struct dma_slave_config *sconfig, > >> bool is_cyclic) > >> { > >> + struct owl_dma *od =3D to_owl_dma(vchan->vc.chan.device); > >> u32 mode, ctrlb; > >> > >> mode =3D OWL_DMA_MODE_PW(0); > >> @@ -427,14 +439,26 @@ static inline int owl_dma_cfg_lli(struct owl_dma= _vchan *vchan, > >> lli->hw[OWL_DMADESC_DADDR] =3D dst; > >> lli->hw[OWL_DMADESC_SRC_STRIDE] =3D 0; > >> lli->hw[OWL_DMADESC_DST_STRIDE] =3D 0; > >> - /* > >> - * Word starts from offset 0xC is shared between frame length > >> - * (max frame length is 1MB) and frame count, where first 20 > >> - * bits are for frame length and rest of 12 bits are for frame > >> - * count. > >> - */ > >> - lli->hw[OWL_DMADESC_FLEN] =3D len | FCNT_VAL << 20; > >> - lli->hw[OWL_DMADESC_CTRLB] =3D ctrlb; > >> + > >> + if (od->devid =3D=3D S700_DMA) { > >> + /* Max frame length is 1MB */ > >> + lli->hw[OWL_DMADESC_FLEN] =3D len; > >> + /* > >> + * On S700, word starts from offset 0x1C is shared betwee= n > >> + * frame count and ctrlb, where first 12 bits are for fra= me > >> + * count and rest of 20 bits are for ctrlb. > >> + */ > >> + lli->hw[OWL_DMADESC_CTRLB] =3D FCNT_VAL | ctrlb; > >> + } else { > >> + /* > >> + * On S900, word starts from offset 0xC is shared between > >> + * frame length (max frame length is 1MB) and frame count= , > >> + * where first 20 bits are for frame length and rest of > >> + * 12 bits are for frame count. > >> + */ > >> + lli->hw[OWL_DMADESC_FLEN] =3D len | FCNT_VAL << 20; > >> + lli->hw[OWL_DMADESC_CTRLB] =3D ctrlb; > > > > Unfortunately this wont scale, we will keep adding new conditions for > > newer SoC's! So rather than this why not encode max frame length in > > driver_data rather than S900_DMA/S700_DMA.. In future one can add value= s > > for newer SoC and not code above logic again. > > What newer SoCs? I don't think we should try to guess the future here. > We can always introduce further abstractions later, once we actually > *know* what we are looking at. > Apart from it , we have *one* more SoC from Actions .i.e. S500 where the DMA controller is identical to S900, and requires *no* additional code to work properly. So, I think we are safe to have the changes proposed in this patch. Thanks -Amit