* [PATCH 00/10] Remove support for TX49xx
@ 2021-01-05 14:02 Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 01/10] MIPS: TX49xx: Drop support Thomas Bogendoerfer
` (13 more replies)
0 siblings, 14 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
I couldn't find any buyable product other than reference boards using
TX49xx CPUs. And since nobody showed interest in keeping support for
it, it's time to remove it.
I've split up the removal into seperate parts for different maintainers.
So if the patch fits your needs, please take it via your tree or
give me an ack so I can apply them the mips-next tree.
Thomas Bogendoerfer (10):
MIPS: TX49xx: Drop support
net: tc35815: Drop support for TX49XX boards
net: 8390: Drop support for TX49XX boards
spi: txx9: Remove driver
dma: tx49 removal
mtd: Remove drivers used by TX49xx
char: hw_random: Remove tx4939 driver
rtc: tx4939: Remove driver
ide: tx4938ide: Remove driver
ASoC: txx9: Remove driver
arch/mips/Kbuild.platforms | 1 -
arch/mips/Kconfig | 23 -
arch/mips/Makefile | 1 -
arch/mips/configs/rbtx49xx_defconfig | 98 ---
arch/mips/include/asm/cpu-type.h | 4 -
arch/mips/include/asm/cpu.h | 2 +-
.../asm/mach-tx49xx/cpu-feature-overrides.h | 26 -
arch/mips/include/asm/mach-tx49xx/ioremap.h | 30 -
arch/mips/include/asm/mach-tx49xx/kmalloc.h | 7 -
.../include/asm/mach-tx49xx/mangle-port.h | 27 -
arch/mips/include/asm/mach-tx49xx/spaces.h | 17 -
arch/mips/include/asm/mipsregs.h | 6 -
arch/mips/include/asm/txx9/boards.h | 10 -
arch/mips/include/asm/txx9/generic.h | 9 -
arch/mips/include/asm/txx9/rbtx4927.h | 92 ---
arch/mips/include/asm/txx9/rbtx4938.h | 145 ----
arch/mips/include/asm/txx9/rbtx4939.h | 142 ----
arch/mips/include/asm/txx9/tx4927.h | 273 --------
arch/mips/include/asm/txx9/tx4927pcic.h | 203 ------
arch/mips/include/asm/txx9/tx4938.h | 312 ---------
arch/mips/include/asm/txx9/tx4939.h | 524 ---------------
arch/mips/include/asm/vermagic.h | 2 -
arch/mips/kernel/cpu-probe.c | 10 -
arch/mips/kernel/idle.c | 3 -
arch/mips/mm/c-r4k.c | 77 ---
arch/mips/mm/page.c | 1 -
arch/mips/mm/tlbex.c | 1 -
arch/mips/pci/Makefile | 6 -
arch/mips/pci/fixup-rbtx4927.c | 73 --
arch/mips/pci/fixup-rbtx4938.c | 53 --
arch/mips/pci/ops-tx4927.c | 524 ---------------
arch/mips/pci/pci-tx4927.c | 91 ---
arch/mips/pci/pci-tx4938.c | 142 ----
arch/mips/pci/pci-tx4939.c | 107 ---
arch/mips/txx9/Kconfig | 89 ---
arch/mips/txx9/Makefile | 8 -
arch/mips/txx9/Platform | 3 -
arch/mips/txx9/generic/7segled.c | 123 ----
arch/mips/txx9/generic/Makefile | 4 -
arch/mips/txx9/generic/irq_tx4927.c | 49 --
arch/mips/txx9/generic/irq_tx4938.c | 37 --
arch/mips/txx9/generic/irq_tx4939.c | 216 ------
arch/mips/txx9/generic/mem_tx4927.c | 75 ---
arch/mips/txx9/generic/setup.c | 158 +----
arch/mips/txx9/generic/setup_tx4927.c | 337 ----------
arch/mips/txx9/generic/setup_tx4938.c | 485 --------------
arch/mips/txx9/generic/setup_tx4939.c | 568 ----------------
arch/mips/txx9/rbtx4927/Makefile | 2 -
arch/mips/txx9/rbtx4927/irq.c | 198 ------
arch/mips/txx9/rbtx4927/prom.c | 42 --
arch/mips/txx9/rbtx4927/setup.c | 380 -----------
arch/mips/txx9/rbtx4938/Makefile | 2 -
arch/mips/txx9/rbtx4938/irq.c | 157 -----
arch/mips/txx9/rbtx4938/prom.c | 22 -
arch/mips/txx9/rbtx4938/setup.c | 372 -----------
arch/mips/txx9/rbtx4939/Makefile | 2 -
arch/mips/txx9/rbtx4939/irq.c | 95 ---
arch/mips/txx9/rbtx4939/prom.c | 29 -
arch/mips/txx9/rbtx4939/setup.c | 554 ---------------
drivers/char/hw_random/Kconfig | 13 -
drivers/char/hw_random/Makefile | 1 -
drivers/char/hw_random/tx4939-rng.c | 157 -----
drivers/dma/Kconfig | 2 +-
drivers/dma/txx9dmac.h | 10 -
drivers/ide/Kconfig | 10 -
drivers/ide/Makefile | 3 -
drivers/ide/tx4938ide.c | 209 ------
drivers/ide/tx4939ide.c | 628 ------------------
drivers/mtd/maps/Kconfig | 6 -
drivers/mtd/maps/Makefile | 1 -
drivers/mtd/maps/rbtx4939-flash.c | 133 ----
drivers/mtd/nand/raw/Kconfig | 7 -
drivers/mtd/nand/raw/Makefile | 1 -
drivers/mtd/nand/raw/txx9ndfmc.c | 423 ------------
drivers/net/ethernet/8390/Kconfig | 2 +-
drivers/net/ethernet/8390/ne.c | 7 +-
drivers/net/ethernet/toshiba/tc35815.c | 29 -
drivers/rtc/Kconfig | 7 -
drivers/rtc/Makefile | 1 -
drivers/rtc/rtc-tx4939.c | 303 ---------
drivers/spi/Kconfig | 6 -
drivers/spi/Makefile | 1 -
drivers/spi/spi-txx9.c | 477 -------------
drivers/watchdog/Kconfig | 2 +-
include/linux/platform_data/txx9/ndfmc.h | 28 -
sound/soc/Kconfig | 1 -
sound/soc/Makefile | 1 -
sound/soc/txx9/Kconfig | 30 -
sound/soc/txx9/Makefile | 12 -
sound/soc/txx9/txx9aclc-ac97.c | 230 -------
sound/soc/txx9/txx9aclc-generic.c | 88 ---
sound/soc/txx9/txx9aclc.c | 422 ------------
sound/soc/txx9/txx9aclc.h | 71 --
93 files changed, 6 insertions(+), 10365 deletions(-)
delete mode 100644 arch/mips/configs/rbtx49xx_defconfig
delete mode 100644 arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/ioremap.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/kmalloc.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/mangle-port.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/spaces.h
delete mode 100644 arch/mips/include/asm/txx9/rbtx4927.h
delete mode 100644 arch/mips/include/asm/txx9/rbtx4938.h
delete mode 100644 arch/mips/include/asm/txx9/rbtx4939.h
delete mode 100644 arch/mips/include/asm/txx9/tx4927.h
delete mode 100644 arch/mips/include/asm/txx9/tx4927pcic.h
delete mode 100644 arch/mips/include/asm/txx9/tx4938.h
delete mode 100644 arch/mips/include/asm/txx9/tx4939.h
delete mode 100644 arch/mips/pci/fixup-rbtx4927.c
delete mode 100644 arch/mips/pci/fixup-rbtx4938.c
delete mode 100644 arch/mips/pci/ops-tx4927.c
delete mode 100644 arch/mips/pci/pci-tx4927.c
delete mode 100644 arch/mips/pci/pci-tx4938.c
delete mode 100644 arch/mips/pci/pci-tx4939.c
delete mode 100644 arch/mips/txx9/generic/7segled.c
delete mode 100644 arch/mips/txx9/generic/irq_tx4927.c
delete mode 100644 arch/mips/txx9/generic/irq_tx4938.c
delete mode 100644 arch/mips/txx9/generic/irq_tx4939.c
delete mode 100644 arch/mips/txx9/generic/mem_tx4927.c
delete mode 100644 arch/mips/txx9/generic/setup_tx4927.c
delete mode 100644 arch/mips/txx9/generic/setup_tx4938.c
delete mode 100644 arch/mips/txx9/generic/setup_tx4939.c
delete mode 100644 arch/mips/txx9/rbtx4927/Makefile
delete mode 100644 arch/mips/txx9/rbtx4927/irq.c
delete mode 100644 arch/mips/txx9/rbtx4927/prom.c
delete mode 100644 arch/mips/txx9/rbtx4927/setup.c
delete mode 100644 arch/mips/txx9/rbtx4938/Makefile
delete mode 100644 arch/mips/txx9/rbtx4938/irq.c
delete mode 100644 arch/mips/txx9/rbtx4938/prom.c
delete mode 100644 arch/mips/txx9/rbtx4938/setup.c
delete mode 100644 arch/mips/txx9/rbtx4939/Makefile
delete mode 100644 arch/mips/txx9/rbtx4939/irq.c
delete mode 100644 arch/mips/txx9/rbtx4939/prom.c
delete mode 100644 arch/mips/txx9/rbtx4939/setup.c
delete mode 100644 drivers/char/hw_random/tx4939-rng.c
delete mode 100644 drivers/ide/tx4938ide.c
delete mode 100644 drivers/ide/tx4939ide.c
delete mode 100644 drivers/mtd/maps/rbtx4939-flash.c
delete mode 100644 drivers/mtd/nand/raw/txx9ndfmc.c
delete mode 100644 drivers/rtc/rtc-tx4939.c
delete mode 100644 drivers/spi/spi-txx9.c
delete mode 100644 include/linux/platform_data/txx9/ndfmc.h
delete mode 100644 sound/soc/txx9/Kconfig
delete mode 100644 sound/soc/txx9/Makefile
delete mode 100644 sound/soc/txx9/txx9aclc-ac97.c
delete mode 100644 sound/soc/txx9/txx9aclc-generic.c
delete mode 100644 sound/soc/txx9/txx9aclc.c
delete mode 100644 sound/soc/txx9/txx9aclc.h
--
2.29.2
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 01/10] MIPS: TX49xx: Drop support
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:59 ` Guenter Roeck
2021-01-05 14:02 ` [PATCH 02/10] net: tc35815: Drop support for TX49XX boards Thomas Bogendoerfer
` (12 subsequent siblings)
13 siblings, 1 reply; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
Looks like there are no boards with TX49xx CPUS other than reference
boards available. So it's time to drop Linux support for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/Kbuild.platforms | 1 -
arch/mips/Kconfig | 23 -
arch/mips/Makefile | 1 -
arch/mips/configs/rbtx49xx_defconfig | 98 ---
arch/mips/include/asm/cpu-type.h | 4 -
arch/mips/include/asm/cpu.h | 2 +-
.../asm/mach-tx49xx/cpu-feature-overrides.h | 26 -
arch/mips/include/asm/mach-tx49xx/ioremap.h | 30 -
arch/mips/include/asm/mach-tx49xx/kmalloc.h | 7 -
.../include/asm/mach-tx49xx/mangle-port.h | 27 -
arch/mips/include/asm/mach-tx49xx/spaces.h | 17 -
arch/mips/include/asm/mipsregs.h | 6 -
arch/mips/include/asm/txx9/boards.h | 10 -
arch/mips/include/asm/txx9/generic.h | 9 -
arch/mips/include/asm/txx9/rbtx4927.h | 92 ---
arch/mips/include/asm/txx9/rbtx4938.h | 145 -----
arch/mips/include/asm/txx9/rbtx4939.h | 142 -----
arch/mips/include/asm/txx9/tx4927.h | 273 ---------
arch/mips/include/asm/txx9/tx4927pcic.h | 203 -------
arch/mips/include/asm/txx9/tx4938.h | 312 ----------
arch/mips/include/asm/txx9/tx4939.h | 524 ----------------
arch/mips/include/asm/vermagic.h | 2 -
arch/mips/kernel/cpu-probe.c | 10 -
arch/mips/kernel/idle.c | 3 -
arch/mips/mm/c-r4k.c | 77 ---
arch/mips/mm/page.c | 1 -
arch/mips/mm/tlbex.c | 1 -
arch/mips/pci/Makefile | 6 -
arch/mips/pci/fixup-rbtx4927.c | 73 ---
arch/mips/pci/fixup-rbtx4938.c | 53 --
arch/mips/pci/ops-tx4927.c | 524 ----------------
arch/mips/pci/pci-tx4927.c | 91 ---
arch/mips/pci/pci-tx4938.c | 142 -----
arch/mips/pci/pci-tx4939.c | 107 ----
arch/mips/txx9/Kconfig | 89 ---
arch/mips/txx9/Makefile | 8 -
arch/mips/txx9/Platform | 3 -
arch/mips/txx9/generic/7segled.c | 123 ----
arch/mips/txx9/generic/Makefile | 4 -
arch/mips/txx9/generic/irq_tx4927.c | 49 --
arch/mips/txx9/generic/irq_tx4938.c | 37 --
arch/mips/txx9/generic/irq_tx4939.c | 216 -------
arch/mips/txx9/generic/mem_tx4927.c | 75 ---
arch/mips/txx9/generic/setup.c | 158 +----
arch/mips/txx9/generic/setup_tx4927.c | 337 -----------
arch/mips/txx9/generic/setup_tx4938.c | 485 ---------------
arch/mips/txx9/generic/setup_tx4939.c | 568 ------------------
arch/mips/txx9/rbtx4927/Makefile | 2 -
arch/mips/txx9/rbtx4927/irq.c | 198 ------
arch/mips/txx9/rbtx4927/prom.c | 42 --
arch/mips/txx9/rbtx4927/setup.c | 380 ------------
arch/mips/txx9/rbtx4938/Makefile | 2 -
arch/mips/txx9/rbtx4938/irq.c | 157 -----
arch/mips/txx9/rbtx4938/prom.c | 22 -
arch/mips/txx9/rbtx4938/setup.c | 372 ------------
arch/mips/txx9/rbtx4939/Makefile | 2 -
arch/mips/txx9/rbtx4939/irq.c | 95 ---
arch/mips/txx9/rbtx4939/prom.c | 29 -
arch/mips/txx9/rbtx4939/setup.c | 554 -----------------
drivers/watchdog/Kconfig | 2 +-
60 files changed, 3 insertions(+), 7048 deletions(-)
delete mode 100644 arch/mips/configs/rbtx49xx_defconfig
delete mode 100644 arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/ioremap.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/kmalloc.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/mangle-port.h
delete mode 100644 arch/mips/include/asm/mach-tx49xx/spaces.h
delete mode 100644 arch/mips/include/asm/txx9/rbtx4927.h
delete mode 100644 arch/mips/include/asm/txx9/rbtx4938.h
delete mode 100644 arch/mips/include/asm/txx9/rbtx4939.h
delete mode 100644 arch/mips/include/asm/txx9/tx4927.h
delete mode 100644 arch/mips/include/asm/txx9/tx4927pcic.h
delete mode 100644 arch/mips/include/asm/txx9/tx4938.h
delete mode 100644 arch/mips/include/asm/txx9/tx4939.h
delete mode 100644 arch/mips/pci/fixup-rbtx4927.c
delete mode 100644 arch/mips/pci/fixup-rbtx4938.c
delete mode 100644 arch/mips/pci/ops-tx4927.c
delete mode 100644 arch/mips/pci/pci-tx4927.c
delete mode 100644 arch/mips/pci/pci-tx4938.c
delete mode 100644 arch/mips/pci/pci-tx4939.c
delete mode 100644 arch/mips/txx9/generic/7segled.c
delete mode 100644 arch/mips/txx9/generic/irq_tx4927.c
delete mode 100644 arch/mips/txx9/generic/irq_tx4938.c
delete mode 100644 arch/mips/txx9/generic/irq_tx4939.c
delete mode 100644 arch/mips/txx9/generic/mem_tx4927.c
delete mode 100644 arch/mips/txx9/generic/setup_tx4927.c
delete mode 100644 arch/mips/txx9/generic/setup_tx4938.c
delete mode 100644 arch/mips/txx9/generic/setup_tx4939.c
delete mode 100644 arch/mips/txx9/rbtx4927/Makefile
delete mode 100644 arch/mips/txx9/rbtx4927/irq.c
delete mode 100644 arch/mips/txx9/rbtx4927/prom.c
delete mode 100644 arch/mips/txx9/rbtx4927/setup.c
delete mode 100644 arch/mips/txx9/rbtx4938/Makefile
delete mode 100644 arch/mips/txx9/rbtx4938/irq.c
delete mode 100644 arch/mips/txx9/rbtx4938/prom.c
delete mode 100644 arch/mips/txx9/rbtx4938/setup.c
delete mode 100644 arch/mips/txx9/rbtx4939/Makefile
delete mode 100644 arch/mips/txx9/rbtx4939/irq.c
delete mode 100644 arch/mips/txx9/rbtx4939/prom.c
delete mode 100644 arch/mips/txx9/rbtx4939/setup.c
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index 5483e38b5dc7..06be5c8b623c 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -34,7 +34,6 @@ platform-$(CONFIG_SIBYTE_BCM1x55) += sibyte/
platform-$(CONFIG_SIBYTE_BCM1x80) += sibyte/
platform-$(CONFIG_SNI_RM) += sni/
platform-$(CONFIG_MACH_TX39XX) += txx9/
-platform-$(CONFIG_MACH_TX49XX) += txx9/
platform-$(CONFIG_MACH_VR41XX) += vr41xx/
# include the platform specific files
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index d68df1febd25..a092573c7ada 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -911,10 +911,6 @@ config SNI_RM
config MACH_TX39XX
bool "Toshiba TX39 series based machines"
-config MACH_TX49XX
- bool "Toshiba TX49 series based machines"
- select WAR_TX49XX_ICACHE_INDEX_INV
-
config MIKROTIK_RB532
bool "Mikrotik RB532 boards"
select CEVT_R4K
@@ -1669,14 +1665,6 @@ config CPU_R4X00
MIPS Technologies R4000-series processors other than 4300, including
the R4000, R4400, R4600, and 4700.
-config CPU_TX49XX
- bool "R49XX"
- depends on SYS_HAS_CPU_TX49XX
- select CPU_HAS_PREFETCH
- select CPU_SUPPORTS_32BIT_KERNEL
- select CPU_SUPPORTS_64BIT_KERNEL
- select CPU_SUPPORTS_HUGEPAGES
-
config CPU_R5000
bool "R5000"
depends on SYS_HAS_CPU_R5000
@@ -1996,9 +1984,6 @@ config SYS_HAS_CPU_VR41XX
config SYS_HAS_CPU_R4X00
bool
-config SYS_HAS_CPU_TX49XX
- bool
-
config SYS_HAS_CPU_R5000
bool
@@ -2678,14 +2663,6 @@ config WAR_R4600_V1_HIT_CACHEOP
config WAR_R4600_V2_HIT_CACHEOP
bool
-# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
-# the line which this instruction itself exists, the following
-# operation is not guaranteed."
-#
-# Workaround: do two phase flushing for Index_Invalidate_I
-config WAR_TX49XX_ICACHE_INDEX_INV
- bool
-
# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
# opposes it being called that) where invalid instructions in the same
# I-cache line worth of instructions being fetched may case spurious
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index cd4343edeb11..c6e271e04ae8 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -143,7 +143,6 @@ cflags-$(CONFIG_CPU_R3000) += -march=r3000
cflags-$(CONFIG_CPU_TX39XX) += -march=r3900
cflags-$(CONFIG_CPU_VR41XX) += -march=r4100 -Wa,--trap
cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap
-cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -Wa,--trap
cflags-$(CONFIG_CPU_MIPS32_R5) += -march=mips32r5 -Wa,--trap -modd-spreg
diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig
deleted file mode 100644
index 5e389db35fa7..000000000000
--- a/arch/mips/configs/rbtx49xx_defconfig
+++ /dev/null
@@ -1,98 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MACH_TX49XX=y
-CONFIG_TOSHIBA_RBTX4927=y
-CONFIG_TOSHIBA_RBTX4938=y
-CONFIG_TOSHIBA_RBTX4939=y
-CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP=y
-# CONFIG_SECCOMP is not set
-CONFIG_PCI=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=m
-CONFIG_MTD_BLOCK_RO=m
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_RBTX4939=y
-CONFIG_MTD_RAW_NAND=m
-CONFIG_MTD_NAND_TXX9NDFMC=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE_TX4938=y
-CONFIG_BLK_DEV_IDE_TX4939=y
-CONFIG_NETDEVICES=y
-CONFIG_NE2000=y
-CONFIG_SMC91X=y
-CONFIG_TC35815=y
-# CONFIG_WLAN is not set
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_TXX9_CONSOLE=y
-CONFIG_SERIAL_TXX9_STDSERIAL=y
-CONFIG_SPI=y
-CONFIG_SPI_TXX9=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_TXX9_WDT=m
-# CONFIG_VGA_ARB is not set
-CONFIG_SOUND=m
-CONFIG_SND=m
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_PCI is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_MIPS is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_SOC_TXX9ACLC=m
-CONFIG_SND_SOC_TXX9ACLC_GENERIC=m
-# CONFIG_USB_SUPPORT is not set
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_DISK=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-CONFIG_RTC_DRV_RS5C348=y
-CONFIG_RTC_DRV_DS1742=y
-CONFIG_RTC_DRV_TX4939=y
-CONFIG_DMADEVICES=y
-CONFIG_TXX9_DMAC=m
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_JFFS2_FS=m
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 3288cef4b168..0b7006890fe5 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -136,10 +136,6 @@ static inline int __pure __get_cpu_type(const int cpu_type)
case CPU_R4650:
#endif
-#ifdef CONFIG_SYS_HAS_CPU_TX49XX
- case CPU_TX49XX:
-#endif
-
#ifdef CONFIG_SYS_HAS_CPU_R5000
case CPU_R5000:
#endif
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index c9222cc2244f..82e317f7565c 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -307,7 +307,7 @@ enum cpu_type_enum {
CPU_R4700, CPU_R5000, CPU_R5500, CPU_NEVADA, CPU_R10000,
CPU_R12000, CPU_R14000, CPU_R16000, CPU_VR41XX, CPU_VR4111, CPU_VR4121,
CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000,
- CPU_SR71000, CPU_TX49XX,
+ CPU_SR71000,
/*
* TX3900 class processors
diff --git a/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
deleted file mode 100644
index 04e4247255da..000000000000
--- a/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
-
-#define cpu_has_llsc 1
-#define cpu_has_64bits 1
-#define cpu_has_inclusive_pcaches 0
-
-#define cpu_has_mips16 0
-#define cpu_has_mips16e2 0
-#define cpu_has_mdmx 0
-#define cpu_has_mips3d 0
-#define cpu_has_smartmips 0
-#define cpu_has_vtag_icache 0
-#define cpu_has_ic_fills_f_dc 0
-#define cpu_has_dsp 0
-#define cpu_has_dsp2 0
-#define cpu_has_mipsmt 0
-#define cpu_has_userlocal 0
-
-#define cpu_has_mips32r1 0
-#define cpu_has_mips32r2 0
-#define cpu_has_mips64r1 0
-#define cpu_has_mips64r2 0
-
-#endif /* __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/ioremap.h b/arch/mips/include/asm/mach-tx49xx/ioremap.h
deleted file mode 100644
index b1f3710acf8e..000000000000
--- a/arch/mips/include/asm/mach-tx49xx/ioremap.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * include/asm-mips/mach-tx49xx/ioremap.h
- */
-#ifndef __ASM_MACH_TX49XX_IOREMAP_H
-#define __ASM_MACH_TX49XX_IOREMAP_H
-
-#include <linux/types.h>
-
-static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size,
- unsigned long flags)
-{
-#ifdef CONFIG_64BIT
-#define TXX9_DIRECTMAP_BASE 0xfff000000ul
-#else
-#define TXX9_DIRECTMAP_BASE 0xff000000ul
-#endif
- if (offset >= TXX9_DIRECTMAP_BASE &&
- offset < TXX9_DIRECTMAP_BASE + 0x400000)
- return (void __iomem *)(unsigned long)(int)offset;
- return NULL;
-}
-
-static inline int plat_iounmap(const volatile void __iomem *addr)
-{
- return (unsigned long)addr >=
- (unsigned long)(int)(TXX9_DIRECTMAP_BASE & 0xffffffff);
-}
-
-#endif /* __ASM_MACH_TX49XX_IOREMAP_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/kmalloc.h b/arch/mips/include/asm/mach-tx49xx/kmalloc.h
deleted file mode 100644
index c2a0a6fa483f..000000000000
--- a/arch/mips/include/asm/mach-tx49xx/kmalloc.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_TX49XX_KMALLOC_H
-#define __ASM_MACH_TX49XX_KMALLOC_H
-
-#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
-
-#endif /* __ASM_MACH_TX49XX_KMALLOC_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/mangle-port.h b/arch/mips/include/asm/mach-tx49xx/mangle-port.h
deleted file mode 100644
index 98c7abf4484a..000000000000
--- a/arch/mips/include/asm/mach-tx49xx/mangle-port.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_MACH_TX49XX_MANGLE_PORT_H
-#define __ASM_MACH_TX49XX_MANGLE_PORT_H
-
-#define __swizzle_addr_b(port) (port)
-#define __swizzle_addr_w(port) (port)
-#define __swizzle_addr_l(port) (port)
-#define __swizzle_addr_q(port) (port)
-
-#define ioswabb(a, x) (x)
-#define __mem_ioswabb(a, x) (x)
-#if defined(CONFIG_TOSHIBA_RBTX4939) && \
- IS_ENABLED(CONFIG_SMC91X) && \
- defined(__BIG_ENDIAN)
-#define NEEDS_TXX9_IOSWABW
-extern u16 (*ioswabw)(volatile u16 *a, u16 x);
-extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x);
-#else
-#define ioswabw(a, x) le16_to_cpu((__force __le16)(x))
-#define __mem_ioswabw(a, x) (x)
-#endif
-#define ioswabl(a, x) le32_to_cpu((__force __le32)(x))
-#define __mem_ioswabl(a, x) (x)
-#define ioswabq(a, x) le64_to_cpu((__force __le64)(x))
-#define __mem_ioswabq(a, x) (x)
-
-#endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */
diff --git a/arch/mips/include/asm/mach-tx49xx/spaces.h b/arch/mips/include/asm/mach-tx49xx/spaces.h
deleted file mode 100644
index 0cb10a6f489e..000000000000
--- a/arch/mips/include/asm/mach-tx49xx/spaces.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
- * Copyright (C) 2000, 2002 Maciej W. Rozycki
- * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_TX49XX_SPACES_H
-#define _ASM_TX49XX_SPACES_H
-
-#define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000)
-
-#include <asm/mach-generic/spaces.h>
-
-#endif /* __ASM_TX49XX_SPACES_H */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a0e8ae5497b6..d421bf8787fb 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -562,12 +562,6 @@
#define R30XX_CONF_SB (_ULCAST_(1) << 30)
#define R30XX_CONF_LOCK (_ULCAST_(1) << 31)
-/* Bits specific to the TX49. */
-#define TX49_CONF_DC (_ULCAST_(1) << 16)
-#define TX49_CONF_IC (_ULCAST_(1) << 17) /* conflict with CONF_SC */
-#define TX49_CONF_HALT (_ULCAST_(1) << 18)
-#define TX49_CONF_CWFON (_ULCAST_(1) << 27)
-
/* Bits specific to the MIPS32/64 PRA. */
#define MIPS_CONF_VI (_ULCAST_(1) << 3)
#define MIPS_CONF_MT (_ULCAST_(7) << 7)
diff --git a/arch/mips/include/asm/txx9/boards.h b/arch/mips/include/asm/txx9/boards.h
index d45237befd3e..a9ac7aae3962 100644
--- a/arch/mips/include/asm/txx9/boards.h
+++ b/arch/mips/include/asm/txx9/boards.h
@@ -2,13 +2,3 @@
#ifdef CONFIG_TOSHIBA_JMR3927
BOARD_VEC(jmr3927_vec)
#endif
-#ifdef CONFIG_TOSHIBA_RBTX4927
-BOARD_VEC(rbtx4927_vec)
-BOARD_VEC(rbtx4937_vec)
-#endif
-#ifdef CONFIG_TOSHIBA_RBTX4938
-BOARD_VEC(rbtx4938_vec)
-#endif
-#ifdef CONFIG_TOSHIBA_RBTX4939
-BOARD_VEC(rbtx4939_vec)
-#endif
diff --git a/arch/mips/include/asm/txx9/generic.h b/arch/mips/include/asm/txx9/generic.h
index 9a2c47bf3c40..243e59f427cb 100644
--- a/arch/mips/include/asm/txx9/generic.h
+++ b/arch/mips/include/asm/txx9/generic.h
@@ -84,15 +84,6 @@ void txx9_iocled_init(unsigned long baseaddr,
int basenum, unsigned int num, int lowactive,
const char *color, char **deftriggers);
-/* 7SEG LED */
-void txx9_7segled_init(unsigned int num,
- void (*putc)(unsigned int pos, unsigned char val));
-int txx9_7segled_putc(unsigned int pos, char c);
-
-void __init txx9_aclc_init(unsigned long baseaddr, int irq,
- unsigned int dmac_id,
- unsigned int dma_chan_out,
- unsigned int dma_chan_in);
void __init txx9_sramc_init(struct resource *r);
#endif /* __ASM_TXX9_GENERIC_H */
diff --git a/arch/mips/include/asm/txx9/rbtx4927.h b/arch/mips/include/asm/txx9/rbtx4927.h
deleted file mode 100644
index 4060ad26ca99..000000000000
--- a/arch/mips/include/asm/txx9/rbtx4927.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_TXX9_RBTX4927_H
-#define __ASM_TXX9_RBTX4927_H
-
-#include <asm/txx9/tx4927.h>
-
-#define RBTX4927_PCIMEM 0x08000000
-#define RBTX4927_PCIMEM_SIZE 0x08000000
-#define RBTX4927_PCIIO 0x16000000
-#define RBTX4927_PCIIO_SIZE 0x01000000
-
-#define RBTX4927_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000)
-#define RBTX4927_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000)
-#define RBTX4927_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006)
-#define RBTX4927_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000)
-#define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000)
-#define RBTX4927_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f002)
-#define RBTX4927_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f006)
-#define RBTX4927_BRAMRTC_BASE (IO_BASE + TXX9_CE(2) + 0x00010000)
-#define RBTX4927_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000)
-
-/* Ethernet port address */
-#define RBTX4927_ETHER_ADDR (RBTX4927_ETHER_BASE + 0x280)
-
-#define rbtx4927_imask_addr ((__u8 __iomem *)RBTX4927_IMASK_ADDR)
-#define rbtx4927_imstat_addr ((__u8 __iomem *)RBTX4927_IMSTAT_ADDR)
-#define rbtx4927_softint_addr ((__u8 __iomem *)RBTX4927_SOFTINT_ADDR)
-#define rbtx4927_softreset_addr ((__u8 __iomem *)RBTX4927_SOFTRESET_ADDR)
-#define rbtx4927_softresetlock_addr \
- ((__u8 __iomem *)RBTX4927_SOFTRESETLOCK_ADDR)
-#define rbtx4927_pcireset_addr ((__u8 __iomem *)RBTX4927_PCIRESET_ADDR)
-
-/* bits for ISTAT/IMASK/IMSTAT */
-#define RBTX4927_INTB_PCID 0
-#define RBTX4927_INTB_PCIC 1
-#define RBTX4927_INTB_PCIB 2
-#define RBTX4927_INTB_PCIA 3
-#define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID)
-#define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC)
-#define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
-#define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
-
-#define RBTX4927_NR_IRQ_IOC 8 /* IOC */
-
-#define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
-#define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
-#define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
-#define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
-#define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
-
-#define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
-
-#ifdef CONFIG_PCI
-#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
-#else
-#define RBTX4927_ISA_IO_OFFSET 0
-#endif
-
-#define RBTX4927_RTL_8019_BASE (RBTX4927_ETHER_ADDR - mips_io_port_base)
-#define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
-
-void rbtx4927_prom_init(void);
-void rbtx4927_irq_setup(void);
-struct pci_dev;
-int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-
-#endif /* __ASM_TXX9_RBTX4927_H */
diff --git a/arch/mips/include/asm/txx9/rbtx4938.h b/arch/mips/include/asm/txx9/rbtx4938.h
deleted file mode 100644
index 9c969dd3c6eb..000000000000
--- a/arch/mips/include/asm/txx9/rbtx4938.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * Definitions for TX4937/TX4938
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#ifndef __ASM_TXX9_RBTX4938_H
-#define __ASM_TXX9_RBTX4938_H
-
-#include <asm/addrspace.h>
-#include <asm/txx9irq.h>
-#include <asm/txx9/tx4938.h>
-
-/* Address map */
-#define RBTX4938_FPGA_REG_ADDR (IO_BASE + TXX9_CE(2) + 0x00000000)
-#define RBTX4938_FPGA_REV_ADDR (IO_BASE + TXX9_CE(2) + 0x00000002)
-#define RBTX4938_CONFIG1_ADDR (IO_BASE + TXX9_CE(2) + 0x00000004)
-#define RBTX4938_CONFIG2_ADDR (IO_BASE + TXX9_CE(2) + 0x00000006)
-#define RBTX4938_CONFIG3_ADDR (IO_BASE + TXX9_CE(2) + 0x00000008)
-#define RBTX4938_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000)
-#define RBTX4938_DIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001002)
-#define RBTX4938_BDIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001004)
-#define RBTX4938_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000)
-#define RBTX4938_IMASK2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002002)
-#define RBTX4938_INTPOL_ADDR (IO_BASE + TXX9_CE(2) + 0x00002004)
-#define RBTX4938_ISTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006)
-#define RBTX4938_ISTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002008)
-#define RBTX4938_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200a)
-#define RBTX4938_IMSTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200c)
-#define RBTX4938_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000)
-#define RBTX4938_PIOSEL_ADDR (IO_BASE + TXX9_CE(2) + 0x00005000)
-#define RBTX4938_SPICS_ADDR (IO_BASE + TXX9_CE(2) + 0x00005002)
-#define RBTX4938_SFPWR_ADDR (IO_BASE + TXX9_CE(2) + 0x00005008)
-#define RBTX4938_SFVOL_ADDR (IO_BASE + TXX9_CE(2) + 0x0000500a)
-#define RBTX4938_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007000)
-#define RBTX4938_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x00007002)
-#define RBTX4938_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007004)
-#define RBTX4938_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000)
-
-/* Ethernet port address (Jumperless Mode (W12:Open)) */
-#define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280)
-
-/* bits for ISTAT/IMASK/IMSTAT */
-#define RBTX4938_INTB_PCID 0
-#define RBTX4938_INTB_PCIC 1
-#define RBTX4938_INTB_PCIB 2
-#define RBTX4938_INTB_PCIA 3
-#define RBTX4938_INTB_RTC 4
-#define RBTX4938_INTB_ATA 5
-#define RBTX4938_INTB_MODEM 6
-#define RBTX4938_INTB_SWINT 7
-#define RBTX4938_INTF_PCID (1 << RBTX4938_INTB_PCID)
-#define RBTX4938_INTF_PCIC (1 << RBTX4938_INTB_PCIC)
-#define RBTX4938_INTF_PCIB (1 << RBTX4938_INTB_PCIB)
-#define RBTX4938_INTF_PCIA (1 << RBTX4938_INTB_PCIA)
-#define RBTX4938_INTF_RTC (1 << RBTX4938_INTB_RTC)
-#define RBTX4938_INTF_ATA (1 << RBTX4938_INTB_ATA)
-#define RBTX4938_INTF_MODEM (1 << RBTX4938_INTB_MODEM)
-#define RBTX4938_INTF_SWINT (1 << RBTX4938_INTB_SWINT)
-
-#define rbtx4938_fpga_rev_addr ((__u8 __iomem *)RBTX4938_FPGA_REV_ADDR)
-#define rbtx4938_led_addr ((__u8 __iomem *)RBTX4938_LED_ADDR)
-#define rbtx4938_dipsw_addr ((__u8 __iomem *)RBTX4938_DIPSW_ADDR)
-#define rbtx4938_bdipsw_addr ((__u8 __iomem *)RBTX4938_BDIPSW_ADDR)
-#define rbtx4938_imask_addr ((__u8 __iomem *)RBTX4938_IMASK_ADDR)
-#define rbtx4938_imask2_addr ((__u8 __iomem *)RBTX4938_IMASK2_ADDR)
-#define rbtx4938_intpol_addr ((__u8 __iomem *)RBTX4938_INTPOL_ADDR)
-#define rbtx4938_istat_addr ((__u8 __iomem *)RBTX4938_ISTAT_ADDR)
-#define rbtx4938_istat2_addr ((__u8 __iomem *)RBTX4938_ISTAT2_ADDR)
-#define rbtx4938_imstat_addr ((__u8 __iomem *)RBTX4938_IMSTAT_ADDR)
-#define rbtx4938_imstat2_addr ((__u8 __iomem *)RBTX4938_IMSTAT2_ADDR)
-#define rbtx4938_softint_addr ((__u8 __iomem *)RBTX4938_SOFTINT_ADDR)
-#define rbtx4938_piosel_addr ((__u8 __iomem *)RBTX4938_PIOSEL_ADDR)
-#define rbtx4938_spics_addr ((__u8 __iomem *)RBTX4938_SPICS_ADDR)
-#define rbtx4938_sfpwr_addr ((__u8 __iomem *)RBTX4938_SFPWR_ADDR)
-#define rbtx4938_sfvol_addr ((__u8 __iomem *)RBTX4938_SFVOL_ADDR)
-#define rbtx4938_softreset_addr ((__u8 __iomem *)RBTX4938_SOFTRESET_ADDR)
-#define rbtx4938_softresetlock_addr \
- ((__u8 __iomem *)RBTX4938_SOFTRESETLOCK_ADDR)
-#define rbtx4938_pcireset_addr ((__u8 __iomem *)RBTX4938_PCIRESET_ADDR)
-
-/*
- * IRQ mappings
- */
-
-#define RBTX4938_SOFT_INT0 0 /* not used */
-#define RBTX4938_SOFT_INT1 1 /* not used */
-#define RBTX4938_IRC_INT 2
-#define RBTX4938_TIMER_INT 7
-
-/* These are the virtual IRQ numbers, we divide all IRQ's into
- * 'spaces', the 'space' determines where and how to enable/disable
- * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
- * IRQ hardware is supported.
- */
-#define RBTX4938_NR_IRQ_IOC 8
-
-#define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
-#define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
-#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
-
-#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
-#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
-#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
-#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
-#define RBTX4938_IRQ_IRC_DMA(ch, n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch, n))
-#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO)
-#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
-#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
-#define RBTX4938_IRQ_IRC_TMR(n) (RBTX4938_IRQ_IRC + TX4938_IR_TMR(n))
-#define RBTX4938_IRQ_IRC_NDFMC (RBTX4938_IRQ_IRC + TX4938_IR_NDFMC)
-#define RBTX4938_IRQ_IRC_PCIERR (RBTX4938_IRQ_IRC + TX4938_IR_PCIERR)
-#define RBTX4938_IRQ_IRC_PCIPME (RBTX4938_IRQ_IRC + TX4938_IR_PCIPME)
-#define RBTX4938_IRQ_IRC_ACLC (RBTX4938_IRQ_IRC + TX4938_IR_ACLC)
-#define RBTX4938_IRQ_IRC_ACLCPME (RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME)
-#define RBTX4938_IRQ_IRC_PCIC1 (RBTX4938_IRQ_IRC + TX4938_IR_PCIC1)
-#define RBTX4938_IRQ_IRC_SPI (RBTX4938_IRQ_IRC + TX4938_IR_SPI)
-#define RBTX4938_IRQ_IOC_PCID (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID)
-#define RBTX4938_IRQ_IOC_PCIC (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC)
-#define RBTX4938_IRQ_IOC_PCIB (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB)
-#define RBTX4938_IRQ_IOC_PCIA (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA)
-#define RBTX4938_IRQ_IOC_RTC (RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC)
-#define RBTX4938_IRQ_IOC_ATA (RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA)
-#define RBTX4938_IRQ_IOC_MODEM (RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM)
-#define RBTX4938_IRQ_IOC_SWINT (RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT)
-
-
-/* IOC (PCI, etc) */
-#define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
-/* Onboard 10M Ether */
-#define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
-
-#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
-#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
-
-void rbtx4938_prom_init(void);
-void rbtx4938_irq_setup(void);
-struct pci_dev;
-int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-
-#endif /* __ASM_TXX9_RBTX4938_H */
diff --git a/arch/mips/include/asm/txx9/rbtx4939.h b/arch/mips/include/asm/txx9/rbtx4939.h
deleted file mode 100644
index 6157bfd90848..000000000000
--- a/arch/mips/include/asm/txx9/rbtx4939.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Definitions for RBTX4939
- *
- * (C) Copyright TOSHIBA CORPORATION 2005-2006
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_TXX9_RBTX4939_H
-#define __ASM_TXX9_RBTX4939_H
-
-#include <asm/addrspace.h>
-#include <asm/txx9irq.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/tx4939.h>
-
-/* Address map */
-#define RBTX4939_IOC_REG_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000)
-#define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000)
-#define RBTX4939_IOC_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000002)
-#define RBTX4939_CONFIG1_ADDR (IO_BASE + TXX9_CE(1) + 0x00000004)
-#define RBTX4939_CONFIG2_ADDR (IO_BASE + TXX9_CE(1) + 0x00000006)
-#define RBTX4939_CONFIG3_ADDR (IO_BASE + TXX9_CE(1) + 0x00000008)
-#define RBTX4939_CONFIG4_ADDR (IO_BASE + TXX9_CE(1) + 0x0000000a)
-#define RBTX4939_USTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00001000)
-#define RBTX4939_UDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001002)
-#define RBTX4939_BDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001004)
-#define RBTX4939_IEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00002000)
-#define RBTX4939_IPOL_ADDR (IO_BASE + TXX9_CE(1) + 0x00002002)
-#define RBTX4939_IFAC1_ADDR (IO_BASE + TXX9_CE(1) + 0x00002004)
-#define RBTX4939_IFAC2_ADDR (IO_BASE + TXX9_CE(1) + 0x00002006)
-#define RBTX4939_SOFTINT_ADDR (IO_BASE + TXX9_CE(1) + 0x00003000)
-#define RBTX4939_ISASTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004000)
-#define RBTX4939_PCISTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004002)
-#define RBTX4939_ROME_ADDR (IO_BASE + TXX9_CE(1) + 0x00004004)
-#define RBTX4939_SPICS_ADDR (IO_BASE + TXX9_CE(1) + 0x00004006)
-#define RBTX4939_AUDI_ADDR (IO_BASE + TXX9_CE(1) + 0x00004008)
-#define RBTX4939_ISAGPIO_ADDR (IO_BASE + TXX9_CE(1) + 0x0000400a)
-#define RBTX4939_PE1_ADDR (IO_BASE + TXX9_CE(1) + 0x00005000)
-#define RBTX4939_PE2_ADDR (IO_BASE + TXX9_CE(1) + 0x00005002)
-#define RBTX4939_PE3_ADDR (IO_BASE + TXX9_CE(1) + 0x00005004)
-#define RBTX4939_VP_ADDR (IO_BASE + TXX9_CE(1) + 0x00005006)
-#define RBTX4939_VPRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00005008)
-#define RBTX4939_VPSOUT_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500a)
-#define RBTX4939_VPSIN_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500c)
-#define RBTX4939_7SEG_ADDR(s, ch) \
- (IO_BASE + TXX9_CE(1) + 0x00006000 + (s) * 16 + ((ch) & 3) * 2)
-#define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000)
-#define RBTX4939_RESETEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00007002)
-#define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004)
-#define RBTX4939_ETHER_BASE (IO_BASE + TXX9_CE(1) + 0x00020000)
-
-/* Ethernet port address */
-#define RBTX4939_ETHER_ADDR (RBTX4939_ETHER_BASE + 0x300)
-
-/* bits for IEN/IPOL/IFAC */
-#define RBTX4938_INTB_ISA0 0
-#define RBTX4938_INTB_ISA11 1
-#define RBTX4938_INTB_ISA12 2
-#define RBTX4938_INTB_ISA15 3
-#define RBTX4938_INTB_I2S 4
-#define RBTX4938_INTB_SW 5
-#define RBTX4938_INTF_ISA0 (1 << RBTX4938_INTB_ISA0)
-#define RBTX4938_INTF_ISA11 (1 << RBTX4938_INTB_ISA11)
-#define RBTX4938_INTF_ISA12 (1 << RBTX4938_INTB_ISA12)
-#define RBTX4938_INTF_ISA15 (1 << RBTX4938_INTB_ISA15)
-#define RBTX4938_INTF_I2S (1 << RBTX4938_INTB_I2S)
-#define RBTX4938_INTF_SW (1 << RBTX4938_INTB_SW)
-
-/* bits for PE1,PE2,PE3 */
-#define RBTX4939_PE1_ATA(ch) (0x01 << (ch))
-#define RBTX4939_PE1_RMII(ch) (0x04 << (ch))
-#define RBTX4939_PE2_SIO0 0x01
-#define RBTX4939_PE2_SIO2 0x02
-#define RBTX4939_PE2_SIO3 0x04
-#define RBTX4939_PE2_CIR 0x08
-#define RBTX4939_PE2_SPI 0x10
-#define RBTX4939_PE2_GPIO 0x20
-#define RBTX4939_PE3_VP 0x01
-#define RBTX4939_PE3_VP_P 0x02
-#define RBTX4939_PE3_VP_S 0x04
-
-#define rbtx4939_board_rev_addr ((u8 __iomem *)RBTX4939_BOARD_REV_ADDR)
-#define rbtx4939_ioc_rev_addr ((u8 __iomem *)RBTX4939_IOC_REV_ADDR)
-#define rbtx4939_config1_addr ((u8 __iomem *)RBTX4939_CONFIG1_ADDR)
-#define rbtx4939_config2_addr ((u8 __iomem *)RBTX4939_CONFIG2_ADDR)
-#define rbtx4939_config3_addr ((u8 __iomem *)RBTX4939_CONFIG3_ADDR)
-#define rbtx4939_config4_addr ((u8 __iomem *)RBTX4939_CONFIG4_ADDR)
-#define rbtx4939_ustat_addr ((u8 __iomem *)RBTX4939_USTAT_ADDR)
-#define rbtx4939_udipsw_addr ((u8 __iomem *)RBTX4939_UDIPSW_ADDR)
-#define rbtx4939_bdipsw_addr ((u8 __iomem *)RBTX4939_BDIPSW_ADDR)
-#define rbtx4939_ien_addr ((u8 __iomem *)RBTX4939_IEN_ADDR)
-#define rbtx4939_ipol_addr ((u8 __iomem *)RBTX4939_IPOL_ADDR)
-#define rbtx4939_ifac1_addr ((u8 __iomem *)RBTX4939_IFAC1_ADDR)
-#define rbtx4939_ifac2_addr ((u8 __iomem *)RBTX4939_IFAC2_ADDR)
-#define rbtx4939_softint_addr ((u8 __iomem *)RBTX4939_SOFTINT_ADDR)
-#define rbtx4939_isastat_addr ((u8 __iomem *)RBTX4939_ISASTAT_ADDR)
-#define rbtx4939_pcistat_addr ((u8 __iomem *)RBTX4939_PCISTAT_ADDR)
-#define rbtx4939_rome_addr ((u8 __iomem *)RBTX4939_ROME_ADDR)
-#define rbtx4939_spics_addr ((u8 __iomem *)RBTX4939_SPICS_ADDR)
-#define rbtx4939_audi_addr ((u8 __iomem *)RBTX4939_AUDI_ADDR)
-#define rbtx4939_isagpio_addr ((u8 __iomem *)RBTX4939_ISAGPIO_ADDR)
-#define rbtx4939_pe1_addr ((u8 __iomem *)RBTX4939_PE1_ADDR)
-#define rbtx4939_pe2_addr ((u8 __iomem *)RBTX4939_PE2_ADDR)
-#define rbtx4939_pe3_addr ((u8 __iomem *)RBTX4939_PE3_ADDR)
-#define rbtx4939_vp_addr ((u8 __iomem *)RBTX4939_VP_ADDR)
-#define rbtx4939_vpreset_addr ((u8 __iomem *)RBTX4939_VPRESET_ADDR)
-#define rbtx4939_vpsout_addr ((u8 __iomem *)RBTX4939_VPSOUT_ADDR)
-#define rbtx4939_vpsin_addr ((u8 __iomem *)RBTX4939_VPSIN_ADDR)
-#define rbtx4939_7seg_addr(s, ch) \
- ((u8 __iomem *)RBTX4939_7SEG_ADDR(s, ch))
-#define rbtx4939_softreset_addr ((u8 __iomem *)RBTX4939_SOFTRESET_ADDR)
-#define rbtx4939_reseten_addr ((u8 __iomem *)RBTX4939_RESETEN_ADDR)
-#define rbtx4939_resetstat_addr ((u8 __iomem *)RBTX4939_RESETSTAT_ADDR)
-
-/*
- * IRQ mappings
- */
-#define RBTX4939_NR_IRQ_IOC 8
-
-#define RBTX4939_IRQ_IOC (TXX9_IRQ_BASE + TX4939_NUM_IR)
-#define RBTX4939_IRQ_END (RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC)
-
-/* IOC (ISA, etc) */
-#define RBTX4939_IRQ_IOCINT (TXX9_IRQ_BASE + TX4939_IR_INT(0))
-/* Onboard 10M Ether */
-#define RBTX4939_IRQ_ETHER (TXX9_IRQ_BASE + TX4939_IR_INT(1))
-
-void rbtx4939_prom_init(void);
-void rbtx4939_irq_setup(void);
-
-struct mtd_partition;
-struct map_info;
-struct rbtx4939_flash_data {
- unsigned int width;
- unsigned int nr_parts;
- struct mtd_partition *parts;
- void (*map_init)(struct map_info *map);
-};
-
-#endif /* __ASM_TXX9_RBTX4939_H */
diff --git a/arch/mips/include/asm/txx9/tx4927.h b/arch/mips/include/asm/txx9/tx4927.h
deleted file mode 100644
index 284eea752d55..000000000000
--- a/arch/mips/include/asm/txx9/tx4927.h
+++ /dev/null
@@ -1,273 +0,0 @@
-/*
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2006 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_TXX9_TX4927_H
-#define __ASM_TXX9_TX4927_H
-
-#include <linux/types.h>
-#include <linux/io.h>
-#include <asm/txx9irq.h>
-#include <asm/txx9/tx4927pcic.h>
-
-#ifdef CONFIG_64BIT
-#define TX4927_REG_BASE 0xffffffffff1f0000UL
-#else
-#define TX4927_REG_BASE 0xff1f0000UL
-#endif
-#define TX4927_REG_SIZE 0x00010000
-
-#define TX4927_SDRAMC_REG (TX4927_REG_BASE + 0x8000)
-#define TX4927_EBUSC_REG (TX4927_REG_BASE + 0x9000)
-#define TX4927_DMA_REG (TX4927_REG_BASE + 0xb000)
-#define TX4927_PCIC_REG (TX4927_REG_BASE + 0xd000)
-#define TX4927_CCFG_REG (TX4927_REG_BASE + 0xe000)
-#define TX4927_IRC_REG (TX4927_REG_BASE + 0xf600)
-#define TX4927_NR_TMR 3
-#define TX4927_TMR_REG(ch) (TX4927_REG_BASE + 0xf000 + (ch) * 0x100)
-#define TX4927_NR_SIO 2
-#define TX4927_SIO_REG(ch) (TX4927_REG_BASE + 0xf300 + (ch) * 0x100)
-#define TX4927_PIO_REG (TX4927_REG_BASE + 0xf500)
-#define TX4927_ACLC_REG (TX4927_REG_BASE + 0xf700)
-
-#define TX4927_IR_ECCERR 0
-#define TX4927_IR_WTOERR 1
-#define TX4927_NUM_IR_INT 6
-#define TX4927_IR_INT(n) (2 + (n))
-#define TX4927_NUM_IR_SIO 2
-#define TX4927_IR_SIO(n) (8 + (n))
-#define TX4927_NUM_IR_DMA 4
-#define TX4927_IR_DMA(n) (10 + (n))
-#define TX4927_IR_PIO 14
-#define TX4927_IR_PDMAC 15
-#define TX4927_IR_PCIC 16
-#define TX4927_NUM_IR_TMR 3
-#define TX4927_IR_TMR(n) (17 + (n))
-#define TX4927_IR_PCIERR 22
-#define TX4927_IR_PCIPME 23
-#define TX4927_IR_ACLC 24
-#define TX4927_IR_ACLCPME 25
-#define TX4927_NUM_IR 32
-
-#define TX4927_IRC_INT 2 /* IP[2] in Status register */
-
-#define TX4927_NUM_PIO 16
-
-struct tx4927_sdramc_reg {
- u64 cr[4];
- u64 unused0[4];
- u64 tr;
- u64 unused1[2];
- u64 cmd;
-};
-
-struct tx4927_ebusc_reg {
- u64 cr[8];
-};
-
-struct tx4927_ccfg_reg {
- u64 ccfg;
- u64 crir;
- u64 pcfg;
- u64 toea;
- u64 clkctr;
- u64 unused0;
- u64 garbc;
- u64 unused1;
- u64 unused2;
- u64 ramp;
-};
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX4927_CCFG_WDRST 0x0000020000000000ULL
-#define TX4927_CCFG_WDREXEN 0x0000010000000000ULL
-#define TX4927_CCFG_BCFG_MASK 0x000000ff00000000ULL
-#define TX4927_CCFG_TINTDIS 0x01000000
-#define TX4927_CCFG_PCI66 0x00800000
-#define TX4927_CCFG_PCIMODE 0x00400000
-#define TX4927_CCFG_DIVMODE_MASK 0x000e0000
-#define TX4927_CCFG_DIVMODE_8 (0x0 << 17)
-#define TX4927_CCFG_DIVMODE_12 (0x1 << 17)
-#define TX4927_CCFG_DIVMODE_16 (0x2 << 17)
-#define TX4927_CCFG_DIVMODE_10 (0x3 << 17)
-#define TX4927_CCFG_DIVMODE_2 (0x4 << 17)
-#define TX4927_CCFG_DIVMODE_3 (0x5 << 17)
-#define TX4927_CCFG_DIVMODE_4 (0x6 << 17)
-#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17)
-#define TX4927_CCFG_BEOW 0x00010000
-#define TX4927_CCFG_WR 0x00008000
-#define TX4927_CCFG_TOE 0x00004000
-#define TX4927_CCFG_PCIARB 0x00002000
-#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
-#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
-#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
-#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
-#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
-#define TX4927_CCFG_SYSSP_MASK 0x000000c0
-#define TX4927_CCFG_ENDIAN 0x00000004
-#define TX4927_CCFG_HALT 0x00000002
-#define TX4927_CCFG_ACEHOLD 0x00000001
-#define TX4927_CCFG_W1CBITS (TX4927_CCFG_WDRST | TX4927_CCFG_BEOW)
-
-/* PCFG : Pin Configuration */
-#define TX4927_PCFG_SDCLKDLY_MASK 0x30000000
-#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28)
-#define TX4927_PCFG_SYSCLKEN 0x08000000
-#define TX4927_PCFG_SDCLKEN_ALL 0x07800000
-#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
-#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
-#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
-#define TX4927_PCFG_SEL2 0x00000200
-#define TX4927_PCFG_SEL1 0x00000100
-#define TX4927_PCFG_DMASEL_ALL 0x000000ff
-#define TX4927_PCFG_DMASEL0_MASK 0x00000003
-#define TX4927_PCFG_DMASEL1_MASK 0x0000000c
-#define TX4927_PCFG_DMASEL2_MASK 0x00000030
-#define TX4927_PCFG_DMASEL3_MASK 0x000000c0
-#define TX4927_PCFG_DMASEL0_DRQ0 0x00000000
-#define TX4927_PCFG_DMASEL0_SIO1 0x00000001
-#define TX4927_PCFG_DMASEL0_ACL0 0x00000002
-#define TX4927_PCFG_DMASEL0_ACL2 0x00000003
-#define TX4927_PCFG_DMASEL1_DRQ1 0x00000000
-#define TX4927_PCFG_DMASEL1_SIO1 0x00000004
-#define TX4927_PCFG_DMASEL1_ACL1 0x00000008
-#define TX4927_PCFG_DMASEL1_ACL3 0x0000000c
-#define TX4927_PCFG_DMASEL2_DRQ2 0x00000000 /* SEL2=0 */
-#define TX4927_PCFG_DMASEL2_SIO0 0x00000010 /* SEL2=0 */
-#define TX4927_PCFG_DMASEL2_ACL1 0x00000000 /* SEL2=1 */
-#define TX4927_PCFG_DMASEL2_ACL2 0x00000020 /* SEL2=1 */
-#define TX4927_PCFG_DMASEL2_ACL0 0x00000030 /* SEL2=1 */
-#define TX4927_PCFG_DMASEL3_DRQ3 0x00000000
-#define TX4927_PCFG_DMASEL3_SIO0 0x00000040
-#define TX4927_PCFG_DMASEL3_ACL3 0x00000080
-#define TX4927_PCFG_DMASEL3_ACL1 0x000000c0
-
-/* CLKCTR : Clock Control */
-#define TX4927_CLKCTR_ACLCKD 0x02000000
-#define TX4927_CLKCTR_PIOCKD 0x01000000
-#define TX4927_CLKCTR_DMACKD 0x00800000
-#define TX4927_CLKCTR_PCICKD 0x00400000
-#define TX4927_CLKCTR_TM0CKD 0x00100000
-#define TX4927_CLKCTR_TM1CKD 0x00080000
-#define TX4927_CLKCTR_TM2CKD 0x00040000
-#define TX4927_CLKCTR_SIO0CKD 0x00020000
-#define TX4927_CLKCTR_SIO1CKD 0x00010000
-#define TX4927_CLKCTR_ACLRST 0x00000200
-#define TX4927_CLKCTR_PIORST 0x00000100
-#define TX4927_CLKCTR_DMARST 0x00000080
-#define TX4927_CLKCTR_PCIRST 0x00000040
-#define TX4927_CLKCTR_TM0RST 0x00000010
-#define TX4927_CLKCTR_TM1RST 0x00000008
-#define TX4927_CLKCTR_TM2RST 0x00000004
-#define TX4927_CLKCTR_SIO0RST 0x00000002
-#define TX4927_CLKCTR_SIO1RST 0x00000001
-
-#define tx4927_sdramcptr \
- ((struct tx4927_sdramc_reg __iomem *)TX4927_SDRAMC_REG)
-#define tx4927_pcicptr \
- ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
-#define tx4927_ccfgptr \
- ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
-#define tx4927_ebuscptr \
- ((struct tx4927_ebusc_reg __iomem *)TX4927_EBUSC_REG)
-#define tx4927_pioptr ((struct txx9_pio_reg __iomem *)TX4927_PIO_REG)
-
-#define TX4927_REV_PCODE() \
- ((__u32)__raw_readq(&tx4927_ccfgptr->crir) >> 16)
-
-#define TX4927_SDRAMC_CR(ch) __raw_readq(&tx4927_sdramcptr->cr[(ch)])
-#define TX4927_SDRAMC_BA(ch) ((TX4927_SDRAMC_CR(ch) >> 49) << 21)
-#define TX4927_SDRAMC_SIZE(ch) \
- ((((TX4927_SDRAMC_CR(ch) >> 33) & 0x7fff) + 1) << 21)
-
-#define TX4927_EBUSC_CR(ch) __raw_readq(&tx4927_ebuscptr->cr[(ch)])
-#define TX4927_EBUSC_BA(ch) ((TX4927_EBUSC_CR(ch) >> 48) << 20)
-#define TX4927_EBUSC_SIZE(ch) \
- (0x00100000 << ((unsigned long)(TX4927_EBUSC_CR(ch) >> 8) & 0xf))
-#define TX4927_EBUSC_WIDTH(ch) \
- (64 >> ((__u32)(TX4927_EBUSC_CR(ch) >> 20) & 0x3))
-
-/* utilities */
-static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
-{
-#ifdef CONFIG_32BIT
- unsigned long flags;
- local_irq_save(flags);
-#endif
- ____raw_writeq(____raw_readq(adr) & ~bits, adr);
-#ifdef CONFIG_32BIT
- local_irq_restore(flags);
-#endif
-}
-static inline void txx9_set64(__u64 __iomem *adr, __u64 bits)
-{
-#ifdef CONFIG_32BIT
- unsigned long flags;
- local_irq_save(flags);
-#endif
- ____raw_writeq(____raw_readq(adr) | bits, adr);
-#ifdef CONFIG_32BIT
- local_irq_restore(flags);
-#endif
-}
-
-/* These functions are not interrupt safe. */
-static inline void tx4927_ccfg_clear(__u64 bits)
-{
- ____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg)
- & ~(TX4927_CCFG_W1CBITS | bits),
- &tx4927_ccfgptr->ccfg);
-}
-static inline void tx4927_ccfg_set(__u64 bits)
-{
- ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
- & ~TX4927_CCFG_W1CBITS) | bits,
- &tx4927_ccfgptr->ccfg);
-}
-static inline void tx4927_ccfg_change(__u64 change, __u64 new)
-{
- ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
- & ~(TX4927_CCFG_W1CBITS | change)) |
- new,
- &tx4927_ccfgptr->ccfg);
-}
-
-unsigned int tx4927_get_mem_size(void);
-void tx4927_wdt_init(void);
-void tx4927_setup(void);
-void tx4927_time_init(unsigned int tmrnr);
-void tx4927_sio_init(unsigned int sclk, unsigned int cts_mask);
-int tx4927_report_pciclk(void);
-int tx4927_pciclk66_setup(void);
-void tx4927_setup_pcierr_irq(void);
-void tx4927_irq_init(void);
-void tx4927_mtd_init(int ch);
-void tx4927_dmac_init(int memcpy_chan);
-void tx4927_aclc_init(unsigned int dma_chan_out, unsigned int dma_chan_in);
-
-#endif /* __ASM_TXX9_TX4927_H */
diff --git a/arch/mips/include/asm/txx9/tx4927pcic.h b/arch/mips/include/asm/txx9/tx4927pcic.h
deleted file mode 100644
index 9eab2698caec..000000000000
--- a/arch/mips/include/asm/txx9/tx4927pcic.h
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * include/asm-mips/txx9/tx4927pcic.h
- * TX4927 PCI controller definitions.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_TXX9_TX4927PCIC_H
-#define __ASM_TXX9_TX4927PCIC_H
-
-#include <linux/pci.h>
-#include <linux/irqreturn.h>
-
-struct tx4927_pcic_reg {
- u32 pciid;
- u32 pcistatus;
- u32 pciccrev;
- u32 pcicfg1;
- u32 p2gm0plbase; /* +10 */
- u32 p2gm0pubase;
- u32 p2gm1plbase;
- u32 p2gm1pubase;
- u32 p2gm2pbase; /* +20 */
- u32 p2giopbase;
- u32 unused0;
- u32 pcisid;
- u32 unused1; /* +30 */
- u32 pcicapptr;
- u32 unused2;
- u32 pcicfg2;
- u32 g2ptocnt; /* +40 */
- u32 unused3[15];
- u32 g2pstatus; /* +80 */
- u32 g2pmask;
- u32 pcisstatus;
- u32 pcimask;
- u32 p2gcfg; /* +90 */
- u32 p2gstatus;
- u32 p2gmask;
- u32 p2gccmd;
- u32 unused4[24]; /* +a0 */
- u32 pbareqport; /* +100 */
- u32 pbacfg;
- u32 pbastatus;
- u32 pbamask;
- u32 pbabm; /* +110 */
- u32 pbacreq;
- u32 pbacgnt;
- u32 pbacstate;
- u64 g2pmgbase[3]; /* +120 */
- u64 g2piogbase;
- u32 g2pmmask[3]; /* +140 */
- u32 g2piomask;
- u64 g2pmpbase[3]; /* +150 */
- u64 g2piopbase;
- u32 pciccfg; /* +170 */
- u32 pcicstatus;
- u32 pcicmask;
- u32 unused5;
- u64 p2gmgbase[3]; /* +180 */
- u64 p2giogbase;
- u32 g2pcfgadrs; /* +1a0 */
- u32 g2pcfgdata;
- u32 unused6[8];
- u32 g2pintack;
- u32 g2pspc;
- u32 unused7[12]; /* +1d0 */
- u64 pdmca; /* +200 */
- u64 pdmga;
- u64 pdmpa;
- u64 pdmctr;
- u64 pdmcfg; /* +220 */
- u64 pdmsts;
-};
-
-/* bits for PCICMD */
-/* see PCI_COMMAND_XXX in linux/pci_regs.h */
-
-/* bits for PCISTAT */
-/* see PCI_STATUS_XXX in linux/pci_regs.h */
-
-/* bits for IOBA/MBA */
-/* see PCI_BASE_ADDRESS_XXX in linux/pci_regs.h */
-
-/* bits for G2PSTATUS/G2PMASK */
-#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
-#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
-#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
-
-/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci_regs.h */
-#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
-
-/* bits for PBACFG */
-#define TX4927_PCIC_PBACFG_FIXPA 0x00000008
-#define TX4927_PCIC_PBACFG_RPBA 0x00000004
-#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
-#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
-
-/* bits for PBASTATUS/PBAMASK */
-#define TX4927_PCIC_PBASTATUS_ALL 0x00000001
-#define TX4927_PCIC_PBASTATUS_BM 0x00000001
-
-/* bits for G2PMnGBASE */
-#define TX4927_PCIC_G2PMnGBASE_BSDIS 0x0000002000000000ULL
-#define TX4927_PCIC_G2PMnGBASE_ECHG 0x0000001000000000ULL
-
-/* bits for G2PIOGBASE */
-#define TX4927_PCIC_G2PIOGBASE_BSDIS 0x0000002000000000ULL
-#define TX4927_PCIC_G2PIOGBASE_ECHG 0x0000001000000000ULL
-
-/* bits for PCICSTATUS/PCICMASK */
-#define TX4927_PCIC_PCICSTATUS_ALL 0x000007b8
-#define TX4927_PCIC_PCICSTATUS_PME 0x00000400
-#define TX4927_PCIC_PCICSTATUS_TLB 0x00000200
-#define TX4927_PCIC_PCICSTATUS_NIB 0x00000100
-#define TX4927_PCIC_PCICSTATUS_ZIB 0x00000080
-#define TX4927_PCIC_PCICSTATUS_PERR 0x00000020
-#define TX4927_PCIC_PCICSTATUS_SERR 0x00000010
-#define TX4927_PCIC_PCICSTATUS_GBE 0x00000008
-#define TX4927_PCIC_PCICSTATUS_IWB 0x00000002
-#define TX4927_PCIC_PCICSTATUS_E2PDONE 0x00000001
-
-/* bits for PCICCFG */
-#define TX4927_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
-#define TX4927_PCIC_PCICCFG_HRST 0x00000800
-#define TX4927_PCIC_PCICCFG_SRST 0x00000400
-#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
-#define TX4927_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
-#define TX4927_PCIC_PCICCFG_G2PM0EN 0x00000100
-#define TX4927_PCIC_PCICCFG_G2PM1EN 0x00000080
-#define TX4927_PCIC_PCICCFG_G2PM2EN 0x00000040
-#define TX4927_PCIC_PCICCFG_G2PIOEN 0x00000020
-#define TX4927_PCIC_PCICCFG_TCAR 0x00000010
-#define TX4927_PCIC_PCICCFG_ICAEN 0x00000008
-
-/* bits for P2GMnGBASE */
-#define TX4927_PCIC_P2GMnGBASE_TMEMEN 0x0000004000000000ULL
-#define TX4927_PCIC_P2GMnGBASE_TBSDIS 0x0000002000000000ULL
-#define TX4927_PCIC_P2GMnGBASE_TECHG 0x0000001000000000ULL
-
-/* bits for P2GIOGBASE */
-#define TX4927_PCIC_P2GIOGBASE_TIOEN 0x0000004000000000ULL
-#define TX4927_PCIC_P2GIOGBASE_TBSDIS 0x0000002000000000ULL
-#define TX4927_PCIC_P2GIOGBASE_TECHG 0x0000001000000000ULL
-
-#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
-#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
-
-/* bits for PDMCFG */
-#define TX4927_PCIC_PDMCFG_RSTFIFO 0x00200000
-#define TX4927_PCIC_PDMCFG_EXFER 0x00100000
-#define TX4927_PCIC_PDMCFG_REQDLY_MASK 0x00003800
-#define TX4927_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
-#define TX4927_PCIC_PDMCFG_REQDLY_16 (1 << 11)
-#define TX4927_PCIC_PDMCFG_REQDLY_32 (2 << 11)
-#define TX4927_PCIC_PDMCFG_REQDLY_64 (3 << 11)
-#define TX4927_PCIC_PDMCFG_REQDLY_128 (4 << 11)
-#define TX4927_PCIC_PDMCFG_REQDLY_256 (5 << 11)
-#define TX4927_PCIC_PDMCFG_REQDLY_512 (6 << 11)
-#define TX4927_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
-#define TX4927_PCIC_PDMCFG_ERRIE 0x00000400
-#define TX4927_PCIC_PDMCFG_NCCMPIE 0x00000200
-#define TX4927_PCIC_PDMCFG_NTCMPIE 0x00000100
-#define TX4927_PCIC_PDMCFG_CHNEN 0x00000080
-#define TX4927_PCIC_PDMCFG_XFRACT 0x00000040
-#define TX4927_PCIC_PDMCFG_BSWAP 0x00000020
-#define TX4927_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
-#define TX4927_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
-#define TX4927_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
-#define TX4927_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
-#define TX4927_PCIC_PDMCFG_XFRDIRC 0x00000002
-#define TX4927_PCIC_PDMCFG_CHRST 0x00000001
-
-/* bits for PDMSTS */
-#define TX4927_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
-#define TX4927_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
-#define TX4927_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
-#define TX4927_PCIC_PDMSTS_FIFORP_MASK 0x00030000
-#define TX4927_PCIC_PDMSTS_ERRINT 0x00000800
-#define TX4927_PCIC_PDMSTS_DONEINT 0x00000400
-#define TX4927_PCIC_PDMSTS_CHNEN 0x00000200
-#define TX4927_PCIC_PDMSTS_XFRACT 0x00000100
-#define TX4927_PCIC_PDMSTS_ACCMP 0x00000080
-#define TX4927_PCIC_PDMSTS_NCCMP 0x00000040
-#define TX4927_PCIC_PDMSTS_NTCMP 0x00000020
-#define TX4927_PCIC_PDMSTS_CFGERR 0x00000008
-#define TX4927_PCIC_PDMSTS_PCIERR 0x00000004
-#define TX4927_PCIC_PDMSTS_CHNERR 0x00000002
-#define TX4927_PCIC_PDMSTS_DATAERR 0x00000001
-#define TX4927_PCIC_PDMSTS_ALL_CMP 0x000000e0
-#define TX4927_PCIC_PDMSTS_ALL_ERR 0x0000000f
-
-struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
- struct pci_controller *channel);
-void tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
- struct pci_controller *channel, int extarb);
-void tx4927_report_pcic_status(void);
-char *tx4927_pcibios_setup(char *str);
-void tx4927_dump_pcic_settings(void);
-irqreturn_t tx4927_pcierr_interrupt(int irq, void *dev_id);
-
-#endif /* __ASM_TXX9_TX4927PCIC_H */
diff --git a/arch/mips/include/asm/txx9/tx4938.h b/arch/mips/include/asm/txx9/tx4938.h
deleted file mode 100644
index 6ca767ee6467..000000000000
--- a/arch/mips/include/asm/txx9/tx4938.h
+++ /dev/null
@@ -1,312 +0,0 @@
-/*
- * Definitions for TX4937/TX4938
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#ifndef __ASM_TXX9_TX4938_H
-#define __ASM_TXX9_TX4938_H
-
-/* some controllers are compatible with 4927 */
-#include <asm/txx9/tx4927.h>
-
-#ifdef CONFIG_64BIT
-#define TX4938_REG_BASE 0xffffffffff1f0000UL /* == TX4937_REG_BASE */
-#else
-#define TX4938_REG_BASE 0xff1f0000UL /* == TX4937_REG_BASE */
-#endif
-#define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */
-
-/* NDFMC, SRAMC, PCIC1, SPIC: TX4938 only */
-#define TX4938_NDFMC_REG (TX4938_REG_BASE + 0x5000)
-#define TX4938_SRAMC_REG (TX4938_REG_BASE + 0x6000)
-#define TX4938_PCIC1_REG (TX4938_REG_BASE + 0x7000)
-#define TX4938_SDRAMC_REG (TX4938_REG_BASE + 0x8000)
-#define TX4938_EBUSC_REG (TX4938_REG_BASE + 0x9000)
-#define TX4938_DMA_REG(ch) (TX4938_REG_BASE + 0xb000 + (ch) * 0x800)
-#define TX4938_PCIC_REG (TX4938_REG_BASE + 0xd000)
-#define TX4938_CCFG_REG (TX4938_REG_BASE + 0xe000)
-#define TX4938_NR_TMR 3
-#define TX4938_TMR_REG(ch) ((TX4938_REG_BASE + 0xf000) + (ch) * 0x100)
-#define TX4938_NR_SIO 2
-#define TX4938_SIO_REG(ch) ((TX4938_REG_BASE + 0xf300) + (ch) * 0x100)
-#define TX4938_PIO_REG (TX4938_REG_BASE + 0xf500)
-#define TX4938_IRC_REG (TX4938_REG_BASE + 0xf600)
-#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
-#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
-
-struct tx4938_sramc_reg {
- u64 cr;
-};
-
-struct tx4938_ccfg_reg {
- u64 ccfg;
- u64 crir;
- u64 pcfg;
- u64 toea;
- u64 clkctr;
- u64 unused0;
- u64 garbc;
- u64 unused1;
- u64 unused2;
- u64 ramp;
- u64 unused3;
- u64 jmpadr;
-};
-
-/*
- * IRC
- */
-
-#define TX4938_IR_ECCERR 0
-#define TX4938_IR_WTOERR 1
-#define TX4938_NUM_IR_INT 6
-#define TX4938_IR_INT(n) (2 + (n))
-#define TX4938_NUM_IR_SIO 2
-#define TX4938_IR_SIO(n) (8 + (n))
-#define TX4938_NUM_IR_DMA 4
-#define TX4938_IR_DMA(ch, n) ((ch ? 27 : 10) + (n)) /* 10-13, 27-30 */
-#define TX4938_IR_PIO 14
-#define TX4938_IR_PDMAC 15
-#define TX4938_IR_PCIC 16
-#define TX4938_NUM_IR_TMR 3
-#define TX4938_IR_TMR(n) (17 + (n))
-#define TX4938_IR_NDFMC 21
-#define TX4938_IR_PCIERR 22
-#define TX4938_IR_PCIPME 23
-#define TX4938_IR_ACLC 24
-#define TX4938_IR_ACLCPME 25
-#define TX4938_IR_PCIC1 26
-#define TX4938_IR_SPI 31
-#define TX4938_NUM_IR 32
-/* multiplex */
-#define TX4938_IR_ETH0 TX4938_IR_INT(4)
-#define TX4938_IR_ETH1 TX4938_IR_INT(3)
-
-#define TX4938_IRC_INT 2 /* IP[2] in Status register */
-
-#define TX4938_NUM_PIO 16
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX4938_CCFG_WDRST 0x0000020000000000ULL
-#define TX4938_CCFG_WDREXEN 0x0000010000000000ULL
-#define TX4938_CCFG_BCFG_MASK 0x000000ff00000000ULL
-#define TX4938_CCFG_TINTDIS 0x01000000
-#define TX4938_CCFG_PCI66 0x00800000
-#define TX4938_CCFG_PCIMODE 0x00400000
-#define TX4938_CCFG_PCI1_66 0x00200000
-#define TX4938_CCFG_DIVMODE_MASK 0x001e0000
-#define TX4938_CCFG_DIVMODE_2 (0x4 << 17)
-#define TX4938_CCFG_DIVMODE_2_5 (0xf << 17)
-#define TX4938_CCFG_DIVMODE_3 (0x5 << 17)
-#define TX4938_CCFG_DIVMODE_4 (0x6 << 17)
-#define TX4938_CCFG_DIVMODE_4_5 (0xd << 17)
-#define TX4938_CCFG_DIVMODE_8 (0x0 << 17)
-#define TX4938_CCFG_DIVMODE_10 (0xb << 17)
-#define TX4938_CCFG_DIVMODE_12 (0x1 << 17)
-#define TX4938_CCFG_DIVMODE_16 (0x2 << 17)
-#define TX4938_CCFG_DIVMODE_18 (0x9 << 17)
-#define TX4938_CCFG_BEOW 0x00010000
-#define TX4938_CCFG_WR 0x00008000
-#define TX4938_CCFG_TOE 0x00004000
-#define TX4938_CCFG_PCIARB 0x00002000
-#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
-#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
-#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
-#define TX4938_CCFG_PCIDIVMODE_5 (0x5 << 10)
-#define TX4938_CCFG_PCIDIVMODE_5_5 (0x7 << 10)
-#define TX4938_CCFG_PCIDIVMODE_8 (0x0 << 10)
-#define TX4938_CCFG_PCIDIVMODE_9 (0x2 << 10)
-#define TX4938_CCFG_PCIDIVMODE_10 (0x4 << 10)
-#define TX4938_CCFG_PCIDIVMODE_11 (0x6 << 10)
-#define TX4938_CCFG_PCI1DMD 0x00000100
-#define TX4938_CCFG_SYSSP_MASK 0x000000c0
-#define TX4938_CCFG_ENDIAN 0x00000004
-#define TX4938_CCFG_HALT 0x00000002
-#define TX4938_CCFG_ACEHOLD 0x00000001
-
-/* PCFG : Pin Configuration */
-#define TX4938_PCFG_ETH0_SEL 0x8000000000000000ULL
-#define TX4938_PCFG_ETH1_SEL 0x4000000000000000ULL
-#define TX4938_PCFG_ATA_SEL 0x2000000000000000ULL
-#define TX4938_PCFG_ISA_SEL 0x1000000000000000ULL
-#define TX4938_PCFG_SPI_SEL 0x0800000000000000ULL
-#define TX4938_PCFG_NDF_SEL 0x0400000000000000ULL
-#define TX4938_PCFG_SDCLKDLY_MASK 0x30000000
-#define TX4938_PCFG_SDCLKDLY(d) ((d)<<28)
-#define TX4938_PCFG_SYSCLKEN 0x08000000
-#define TX4938_PCFG_SDCLKEN_ALL 0x07800000
-#define TX4938_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
-#define TX4938_PCFG_PCICLKEN_ALL 0x003f0000
-#define TX4938_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
-#define TX4938_PCFG_SEL2 0x00000200
-#define TX4938_PCFG_SEL1 0x00000100
-#define TX4938_PCFG_DMASEL_ALL 0x0000000f
-#define TX4938_PCFG_DMASEL0_DRQ0 0x00000000
-#define TX4938_PCFG_DMASEL0_SIO1 0x00000001
-#define TX4938_PCFG_DMASEL1_DRQ1 0x00000000
-#define TX4938_PCFG_DMASEL1_SIO1 0x00000002
-#define TX4938_PCFG_DMASEL2_DRQ2 0x00000000
-#define TX4938_PCFG_DMASEL2_SIO0 0x00000004
-#define TX4938_PCFG_DMASEL3_DRQ3 0x00000000
-#define TX4938_PCFG_DMASEL3_SIO0 0x00000008
-
-/* CLKCTR : Clock Control */
-#define TX4938_CLKCTR_NDFCKD 0x0001000000000000ULL
-#define TX4938_CLKCTR_NDFRST 0x0000000100000000ULL
-#define TX4938_CLKCTR_ETH1CKD 0x80000000
-#define TX4938_CLKCTR_ETH0CKD 0x40000000
-#define TX4938_CLKCTR_SPICKD 0x20000000
-#define TX4938_CLKCTR_SRAMCKD 0x10000000
-#define TX4938_CLKCTR_PCIC1CKD 0x08000000
-#define TX4938_CLKCTR_DMA1CKD 0x04000000
-#define TX4938_CLKCTR_ACLCKD 0x02000000
-#define TX4938_CLKCTR_PIOCKD 0x01000000
-#define TX4938_CLKCTR_DMACKD 0x00800000
-#define TX4938_CLKCTR_PCICKD 0x00400000
-#define TX4938_CLKCTR_TM0CKD 0x00100000
-#define TX4938_CLKCTR_TM1CKD 0x00080000
-#define TX4938_CLKCTR_TM2CKD 0x00040000
-#define TX4938_CLKCTR_SIO0CKD 0x00020000
-#define TX4938_CLKCTR_SIO1CKD 0x00010000
-#define TX4938_CLKCTR_ETH1RST 0x00008000
-#define TX4938_CLKCTR_ETH0RST 0x00004000
-#define TX4938_CLKCTR_SPIRST 0x00002000
-#define TX4938_CLKCTR_SRAMRST 0x00001000
-#define TX4938_CLKCTR_PCIC1RST 0x00000800
-#define TX4938_CLKCTR_DMA1RST 0x00000400
-#define TX4938_CLKCTR_ACLRST 0x00000200
-#define TX4938_CLKCTR_PIORST 0x00000100
-#define TX4938_CLKCTR_DMARST 0x00000080
-#define TX4938_CLKCTR_PCIRST 0x00000040
-#define TX4938_CLKCTR_TM0RST 0x00000010
-#define TX4938_CLKCTR_TM1RST 0x00000008
-#define TX4938_CLKCTR_TM2RST 0x00000004
-#define TX4938_CLKCTR_SIO0RST 0x00000002
-#define TX4938_CLKCTR_SIO1RST 0x00000001
-
-/*
- * DMA
- */
-/* bits for MCR */
-#define TX4938_DMA_MCR_EIS(ch) (0x10000000<<(ch))
-#define TX4938_DMA_MCR_DIS(ch) (0x01000000<<(ch))
-#define TX4938_DMA_MCR_RSFIF 0x00000080
-#define TX4938_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
-#define TX4938_DMA_MCR_RPRT 0x00000002
-#define TX4938_DMA_MCR_MSTEN 0x00000001
-
-/* bits for CCRn */
-#define TX4938_DMA_CCR_IMMCHN 0x20000000
-#define TX4938_DMA_CCR_USEXFSZ 0x10000000
-#define TX4938_DMA_CCR_LE 0x08000000
-#define TX4938_DMA_CCR_DBINH 0x04000000
-#define TX4938_DMA_CCR_SBINH 0x02000000
-#define TX4938_DMA_CCR_CHRST 0x01000000
-#define TX4938_DMA_CCR_RVBYTE 0x00800000
-#define TX4938_DMA_CCR_ACKPOL 0x00400000
-#define TX4938_DMA_CCR_REQPL 0x00200000
-#define TX4938_DMA_CCR_EGREQ 0x00100000
-#define TX4938_DMA_CCR_CHDN 0x00080000
-#define TX4938_DMA_CCR_DNCTL 0x00060000
-#define TX4938_DMA_CCR_EXTRQ 0x00010000
-#define TX4938_DMA_CCR_INTRQD 0x0000e000
-#define TX4938_DMA_CCR_INTENE 0x00001000
-#define TX4938_DMA_CCR_INTENC 0x00000800
-#define TX4938_DMA_CCR_INTENT 0x00000400
-#define TX4938_DMA_CCR_CHNEN 0x00000200
-#define TX4938_DMA_CCR_XFACT 0x00000100
-#define TX4938_DMA_CCR_SMPCHN 0x00000020
-#define TX4938_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
-#define TX4938_DMA_CCR_XFSZ_1W TX4938_DMA_CCR_XFSZ(2)
-#define TX4938_DMA_CCR_XFSZ_2W TX4938_DMA_CCR_XFSZ(3)
-#define TX4938_DMA_CCR_XFSZ_4W TX4938_DMA_CCR_XFSZ(4)
-#define TX4938_DMA_CCR_XFSZ_8W TX4938_DMA_CCR_XFSZ(5)
-#define TX4938_DMA_CCR_XFSZ_16W TX4938_DMA_CCR_XFSZ(6)
-#define TX4938_DMA_CCR_XFSZ_32W TX4938_DMA_CCR_XFSZ(7)
-#define TX4938_DMA_CCR_MEMIO 0x00000002
-#define TX4938_DMA_CCR_SNGAD 0x00000001
-
-/* bits for CSRn */
-#define TX4938_DMA_CSR_CHNEN 0x00000400
-#define TX4938_DMA_CSR_STLXFER 0x00000200
-#define TX4938_DMA_CSR_CHNACT 0x00000100
-#define TX4938_DMA_CSR_ABCHC 0x00000080
-#define TX4938_DMA_CSR_NCHNC 0x00000040
-#define TX4938_DMA_CSR_NTRNFC 0x00000020
-#define TX4938_DMA_CSR_EXTDN 0x00000010
-#define TX4938_DMA_CSR_CFERR 0x00000008
-#define TX4938_DMA_CSR_CHERR 0x00000004
-#define TX4938_DMA_CSR_DESERR 0x00000002
-#define TX4938_DMA_CSR_SORERR 0x00000001
-
-#define tx4938_sdramcptr tx4927_sdramcptr
-#define tx4938_ebuscptr tx4927_ebuscptr
-#define tx4938_pcicptr tx4927_pcicptr
-#define tx4938_pcic1ptr \
- ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
-#define tx4938_ccfgptr \
- ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
-#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
-#define tx4938_sramcptr \
- ((struct tx4938_sramc_reg __iomem *)TX4938_SRAMC_REG)
-
-
-#define TX4938_REV_PCODE() \
- ((__u32)__raw_readq(&tx4938_ccfgptr->crir) >> 16)
-
-#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
-#define tx4938_ccfg_set(bits) tx4927_ccfg_set(bits)
-#define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
-
-#define TX4938_SDRAMC_CR(ch) TX4927_SDRAMC_CR(ch)
-#define TX4938_SDRAMC_BA(ch) TX4927_SDRAMC_BA(ch)
-#define TX4938_SDRAMC_SIZE(ch) TX4927_SDRAMC_SIZE(ch)
-
-#define TX4938_EBUSC_CR(ch) TX4927_EBUSC_CR(ch)
-#define TX4938_EBUSC_BA(ch) TX4927_EBUSC_BA(ch)
-#define TX4938_EBUSC_SIZE(ch) TX4927_EBUSC_SIZE(ch)
-#define TX4938_EBUSC_WIDTH(ch) TX4927_EBUSC_WIDTH(ch)
-
-#define tx4938_get_mem_size() tx4927_get_mem_size()
-void tx4938_wdt_init(void);
-void tx4938_setup(void);
-void tx4938_time_init(unsigned int tmrnr);
-void tx4938_sio_init(unsigned int sclk, unsigned int cts_mask);
-void tx4938_spi_init(int busid);
-void tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1);
-int tx4938_report_pciclk(void);
-void tx4938_report_pci1clk(void);
-int tx4938_pciclk66_setup(void);
-struct pci_dev;
-int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
-void tx4938_setup_pcierr_irq(void);
-void tx4938_irq_init(void);
-void tx4938_mtd_init(int ch);
-void tx4938_ndfmc_init(unsigned int hold, unsigned int spw);
-
-struct tx4938ide_platform_info {
- /*
- * I/O port shift, for platforms with ports that are
- * constantly spaced and need larger than the 1-byte
- * spacing used by ata_std_ports().
- */
- unsigned int ioport_shift;
- unsigned int gbus_clock; /* 0 means no PIO mode tuning. */
- unsigned int ebus_ch;
-};
-
-void tx4938_ata_init(unsigned int irq, unsigned int shift, int tune);
-void tx4938_dmac_init(int memcpy_chan0, int memcpy_chan1);
-void tx4938_aclc_init(void);
-void tx4938_sramc_init(void);
-
-#endif
diff --git a/arch/mips/include/asm/txx9/tx4939.h b/arch/mips/include/asm/txx9/tx4939.h
deleted file mode 100644
index abf980af9ef4..000000000000
--- a/arch/mips/include/asm/txx9/tx4939.h
+++ /dev/null
@@ -1,524 +0,0 @@
-/*
- * Definitions for TX4939
- *
- * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_TXX9_TX4939_H
-#define __ASM_TXX9_TX4939_H
-
-/* some controllers are compatible with 4927/4938 */
-#include <asm/txx9/tx4938.h>
-
-#ifdef CONFIG_64BIT
-#define TX4939_REG_BASE 0xffffffffff1f0000UL /* == TX4938_REG_BASE */
-#else
-#define TX4939_REG_BASE 0xff1f0000UL /* == TX4938_REG_BASE */
-#endif
-#define TX4939_REG_SIZE 0x00010000 /* == TX4938_REG_SIZE */
-
-#define TX4939_ATA_REG(ch) (TX4939_REG_BASE + 0x3000 + (ch) * 0x1000)
-#define TX4939_NDFMC_REG (TX4939_REG_BASE + 0x5000)
-#define TX4939_SRAMC_REG (TX4939_REG_BASE + 0x6000)
-#define TX4939_CRYPTO_REG (TX4939_REG_BASE + 0x6800)
-#define TX4939_PCIC1_REG (TX4939_REG_BASE + 0x7000)
-#define TX4939_DDRC_REG (TX4939_REG_BASE + 0x8000)
-#define TX4939_EBUSC_REG (TX4939_REG_BASE + 0x9000)
-#define TX4939_VPC_REG (TX4939_REG_BASE + 0xa000)
-#define TX4939_DMA_REG(ch) (TX4939_REG_BASE + 0xb000 + (ch) * 0x800)
-#define TX4939_PCIC_REG (TX4939_REG_BASE + 0xd000)
-#define TX4939_CCFG_REG (TX4939_REG_BASE + 0xe000)
-#define TX4939_IRC_REG (TX4939_REG_BASE + 0xe800)
-#define TX4939_NR_TMR 6 /* 0xf000,0xf100,0xf200,0xfd00,0xfe00,0xff00 */
-#define TX4939_TMR_REG(ch) \
- (TX4939_REG_BASE + 0xf000 + ((ch) + ((ch) >= 3) * 10) * 0x100)
-#define TX4939_NR_SIO 4 /* 0xf300, 0xf400, 0xf380, 0xf480 */
-#define TX4939_SIO_REG(ch) \
- (TX4939_REG_BASE + 0xf300 + (((ch) & 1) << 8) + (((ch) & 2) << 6))
-#define TX4939_ACLC_REG (TX4939_REG_BASE + 0xf700)
-#define TX4939_SPI_REG (TX4939_REG_BASE + 0xf800)
-#define TX4939_I2C_REG (TX4939_REG_BASE + 0xf900)
-#define TX4939_I2S_REG (TX4939_REG_BASE + 0xfa00)
-#define TX4939_RTC_REG (TX4939_REG_BASE + 0xfb00)
-#define TX4939_CIR_REG (TX4939_REG_BASE + 0xfc00)
-
-#define TX4939_RNG_REG (TX4939_CRYPTO_REG + 0xb0)
-
-struct tx4939_le_reg {
- __u32 r;
- __u32 unused;
-};
-
-struct tx4939_ddrc_reg {
- struct tx4939_le_reg ctl[47];
- __u64 unused0[17];
- __u64 winen;
- __u64 win[4];
-};
-
-struct tx4939_ccfg_reg {
- __u64 ccfg;
- __u64 crir;
- __u64 pcfg;
- __u64 toea;
- __u64 clkctr;
- __u64 unused0;
- __u64 garbc;
- __u64 unused1[2];
- __u64 ramp;
- __u64 unused2[2];
- __u64 dskwctrl;
- __u64 mclkosc;
- __u64 mclkctl;
- __u64 unused3[17];
- struct {
- __u64 mr;
- __u64 dr;
- } gpio[2];
-};
-
-struct tx4939_irc_reg {
- struct tx4939_le_reg den;
- struct tx4939_le_reg scipb;
- struct tx4939_le_reg dm[2];
- struct tx4939_le_reg lvl[16];
- struct tx4939_le_reg msk;
- struct tx4939_le_reg edc;
- struct tx4939_le_reg pnd0;
- struct tx4939_le_reg cs;
- struct tx4939_le_reg pnd1;
- struct tx4939_le_reg dm2[2];
- struct tx4939_le_reg dbr[2];
- struct tx4939_le_reg dben;
- struct tx4939_le_reg unused0[2];
- struct tx4939_le_reg flag[2];
- struct tx4939_le_reg pol;
- struct tx4939_le_reg cnt;
- struct tx4939_le_reg maskint;
- struct tx4939_le_reg maskext;
-};
-
-struct tx4939_crypto_reg {
- struct tx4939_le_reg csr;
- struct tx4939_le_reg idesptr;
- struct tx4939_le_reg cdesptr;
- struct tx4939_le_reg buserr;
- struct tx4939_le_reg cip_tout;
- struct tx4939_le_reg cir;
- union {
- struct {
- struct tx4939_le_reg data[8];
- struct tx4939_le_reg ctrl;
- } gen;
- struct {
- struct {
- struct tx4939_le_reg l;
- struct tx4939_le_reg u;
- } key[3], ini;
- struct tx4939_le_reg ctrl;
- } des;
- struct {
- struct tx4939_le_reg key[4];
- struct tx4939_le_reg ini[4];
- struct tx4939_le_reg ctrl;
- } aes;
- struct {
- struct {
- struct tx4939_le_reg l;
- struct tx4939_le_reg u;
- } cnt;
- struct tx4939_le_reg ini[5];
- struct tx4939_le_reg unused;
- struct tx4939_le_reg ctrl;
- } hash;
- } cdr;
- struct tx4939_le_reg unused0[7];
- struct tx4939_le_reg rcsr;
- struct tx4939_le_reg rpr;
- __u64 rdr;
- __u64 ror[3];
- struct tx4939_le_reg unused1[2];
- struct tx4939_le_reg xorslr;
- struct tx4939_le_reg xorsur;
-};
-
-struct tx4939_crypto_desc {
- __u32 src;
- __u32 dst;
- __u32 next;
- __u32 ctrl;
- __u32 index;
- __u32 xor;
-};
-
-struct tx4939_vpc_reg {
- struct tx4939_le_reg csr;
- struct {
- struct tx4939_le_reg ctrlA;
- struct tx4939_le_reg ctrlB;
- struct tx4939_le_reg idesptr;
- struct tx4939_le_reg cdesptr;
- } port[3];
- struct tx4939_le_reg buserr;
-};
-
-struct tx4939_vpc_desc {
- __u32 src;
- __u32 next;
- __u32 ctrl1;
- __u32 ctrl2;
-};
-
-/*
- * IRC
- */
-#define TX4939_IR_NONE 0
-#define TX4939_IR_DDR 1
-#define TX4939_IR_WTOERR 2
-#define TX4939_NUM_IR_INT 3
-#define TX4939_IR_INT(n) (3 + (n))
-#define TX4939_NUM_IR_ETH 2
-#define TX4939_IR_ETH(n) ((n) ? 43 : 6)
-#define TX4939_IR_VIDEO 7
-#define TX4939_IR_CIR 8
-#define TX4939_NUM_IR_SIO 4
-#define TX4939_IR_SIO(n) ((n) ? 43 + (n) : 9) /* 9,44-46 */
-#define TX4939_NUM_IR_DMA 4
-#define TX4939_IR_DMA(ch, n) (((ch) ? 22 : 10) + (n)) /* 10-13,22-25 */
-#define TX4939_IR_IRC 14
-#define TX4939_IR_PDMAC 15
-#define TX4939_NUM_IR_TMR 6
-#define TX4939_IR_TMR(n) (((n) >= 3 ? 45 : 16) + (n)) /* 16-18,48-50 */
-#define TX4939_NUM_IR_ATA 2
-#define TX4939_IR_ATA(n) (19 + (n))
-#define TX4939_IR_ACLC 21
-#define TX4939_IR_CIPHER 26
-#define TX4939_IR_INTA 27
-#define TX4939_IR_INTB 28
-#define TX4939_IR_INTC 29
-#define TX4939_IR_INTD 30
-#define TX4939_IR_I2C 33
-#define TX4939_IR_SPI 34
-#define TX4939_IR_PCIC 35
-#define TX4939_IR_PCIC1 36
-#define TX4939_IR_PCIERR 37
-#define TX4939_IR_PCIPME 38
-#define TX4939_IR_NDFMC 39
-#define TX4939_IR_ACLCPME 40
-#define TX4939_IR_RTC 41
-#define TX4939_IR_RND 42
-#define TX4939_IR_I2S 47
-#define TX4939_NUM_IR 64
-
-#define TX4939_IRC_INT 2 /* IP[2] in Status register */
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX4939_CCFG_PCIBOOT 0x0000040000000000ULL
-#define TX4939_CCFG_WDRST 0x0000020000000000ULL
-#define TX4939_CCFG_WDREXEN 0x0000010000000000ULL
-#define TX4939_CCFG_BCFG_MASK 0x000000ff00000000ULL
-#define TX4939_CCFG_GTOT_MASK 0x06000000
-#define TX4939_CCFG_GTOT_4096 0x06000000
-#define TX4939_CCFG_GTOT_2048 0x04000000
-#define TX4939_CCFG_GTOT_1024 0x02000000
-#define TX4939_CCFG_GTOT_512 0x00000000
-#define TX4939_CCFG_TINTDIS 0x01000000
-#define TX4939_CCFG_PCI66 0x00800000
-#define TX4939_CCFG_PCIMODE 0x00400000
-#define TX4939_CCFG_SSCG 0x00100000
-#define TX4939_CCFG_MULCLK_MASK 0x000e0000
-#define TX4939_CCFG_MULCLK_8 (0x7 << 17)
-#define TX4939_CCFG_MULCLK_9 (0x0 << 17)
-#define TX4939_CCFG_MULCLK_10 (0x1 << 17)
-#define TX4939_CCFG_MULCLK_11 (0x2 << 17)
-#define TX4939_CCFG_MULCLK_12 (0x3 << 17)
-#define TX4939_CCFG_MULCLK_13 (0x4 << 17)
-#define TX4939_CCFG_MULCLK_14 (0x5 << 17)
-#define TX4939_CCFG_MULCLK_15 (0x6 << 17)
-#define TX4939_CCFG_BEOW 0x00010000
-#define TX4939_CCFG_WR 0x00008000
-#define TX4939_CCFG_TOE 0x00004000
-#define TX4939_CCFG_PCIARB 0x00002000
-#define TX4939_CCFG_YDIVMODE_MASK 0x00001c00
-#define TX4939_CCFG_YDIVMODE_2 (0x0 << 10)
-#define TX4939_CCFG_YDIVMODE_3 (0x1 << 10)
-#define TX4939_CCFG_YDIVMODE_5 (0x6 << 10)
-#define TX4939_CCFG_YDIVMODE_6 (0x7 << 10)
-#define TX4939_CCFG_PTSEL 0x00000200
-#define TX4939_CCFG_BESEL 0x00000100
-#define TX4939_CCFG_SYSSP_MASK 0x000000c0
-#define TX4939_CCFG_ACKSEL 0x00000020
-#define TX4939_CCFG_ROMW 0x00000010
-#define TX4939_CCFG_ENDIAN 0x00000004
-#define TX4939_CCFG_ARMODE 0x00000002
-#define TX4939_CCFG_ACEHOLD 0x00000001
-
-/* PCFG : Pin Configuration */
-#define TX4939_PCFG_SIO2MODE_MASK 0xc000000000000000ULL
-#define TX4939_PCFG_SIO2MODE_GPIO 0x8000000000000000ULL
-#define TX4939_PCFG_SIO2MODE_SIO2 0x4000000000000000ULL
-#define TX4939_PCFG_SIO2MODE_SIO0 0x0000000000000000ULL
-#define TX4939_PCFG_SPIMODE 0x2000000000000000ULL
-#define TX4939_PCFG_I2CMODE 0x1000000000000000ULL
-#define TX4939_PCFG_I2SMODE_MASK 0x0c00000000000000ULL
-#define TX4939_PCFG_I2SMODE_GPIO 0x0c00000000000000ULL
-#define TX4939_PCFG_I2SMODE_I2S 0x0800000000000000ULL
-#define TX4939_PCFG_I2SMODE_I2S_ALT 0x0400000000000000ULL
-#define TX4939_PCFG_I2SMODE_ACLC 0x0000000000000000ULL
-#define TX4939_PCFG_SIO3MODE 0x0200000000000000ULL
-#define TX4939_PCFG_DMASEL3 0x0004000000000000ULL
-#define TX4939_PCFG_DMASEL3_SIO0 0x0004000000000000ULL
-#define TX4939_PCFG_DMASEL3_NDFC 0x0000000000000000ULL
-#define TX4939_PCFG_VSSMODE 0x0000200000000000ULL
-#define TX4939_PCFG_VPSMODE 0x0000100000000000ULL
-#define TX4939_PCFG_ET1MODE 0x0000080000000000ULL
-#define TX4939_PCFG_ET0MODE 0x0000040000000000ULL
-#define TX4939_PCFG_ATA1MODE 0x0000020000000000ULL
-#define TX4939_PCFG_ATA0MODE 0x0000010000000000ULL
-#define TX4939_PCFG_BP_PLL 0x0000000100000000ULL
-
-#define TX4939_PCFG_SYSCLKEN 0x08000000
-#define TX4939_PCFG_PCICLKEN_ALL 0x000f0000
-#define TX4939_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
-#define TX4939_PCFG_SPEED1 0x00002000
-#define TX4939_PCFG_SPEED0 0x00001000
-#define TX4939_PCFG_ITMODE 0x00000300
-#define TX4939_PCFG_DMASEL_ALL (0x00000007 | TX4939_PCFG_DMASEL3)
-#define TX4939_PCFG_DMASEL2 0x00000004
-#define TX4939_PCFG_DMASEL2_DRQ2 0x00000000
-#define TX4939_PCFG_DMASEL2_SIO0 0x00000004
-#define TX4939_PCFG_DMASEL1 0x00000002
-#define TX4939_PCFG_DMASEL1_DRQ1 0x00000000
-#define TX4939_PCFG_DMASEL0 0x00000001
-#define TX4939_PCFG_DMASEL0_DRQ0 0x00000000
-
-/* CLKCTR : Clock Control */
-#define TX4939_CLKCTR_IOSCKD 0x8000000000000000ULL
-#define TX4939_CLKCTR_SYSCKD 0x4000000000000000ULL
-#define TX4939_CLKCTR_TM5CKD 0x2000000000000000ULL
-#define TX4939_CLKCTR_TM4CKD 0x1000000000000000ULL
-#define TX4939_CLKCTR_TM3CKD 0x0800000000000000ULL
-#define TX4939_CLKCTR_CIRCKD 0x0400000000000000ULL
-#define TX4939_CLKCTR_SIO3CKD 0x0200000000000000ULL
-#define TX4939_CLKCTR_SIO2CKD 0x0100000000000000ULL
-#define TX4939_CLKCTR_SIO1CKD 0x0080000000000000ULL
-#define TX4939_CLKCTR_VPCCKD 0x0040000000000000ULL
-#define TX4939_CLKCTR_EPCICKD 0x0020000000000000ULL
-#define TX4939_CLKCTR_ETH1CKD 0x0008000000000000ULL
-#define TX4939_CLKCTR_ATA1CKD 0x0004000000000000ULL
-#define TX4939_CLKCTR_BROMCKD 0x0002000000000000ULL
-#define TX4939_CLKCTR_NDCCKD 0x0001000000000000ULL
-#define TX4939_CLKCTR_I2CCKD 0x0000800000000000ULL
-#define TX4939_CLKCTR_ETH0CKD 0x0000400000000000ULL
-#define TX4939_CLKCTR_SPICKD 0x0000200000000000ULL
-#define TX4939_CLKCTR_SRAMCKD 0x0000100000000000ULL
-#define TX4939_CLKCTR_PCI1CKD 0x0000080000000000ULL
-#define TX4939_CLKCTR_DMA1CKD 0x0000040000000000ULL
-#define TX4939_CLKCTR_ACLCKD 0x0000020000000000ULL
-#define TX4939_CLKCTR_ATA0CKD 0x0000010000000000ULL
-#define TX4939_CLKCTR_DMA0CKD 0x0000008000000000ULL
-#define TX4939_CLKCTR_PCICCKD 0x0000004000000000ULL
-#define TX4939_CLKCTR_I2SCKD 0x0000002000000000ULL
-#define TX4939_CLKCTR_TM0CKD 0x0000001000000000ULL
-#define TX4939_CLKCTR_TM1CKD 0x0000000800000000ULL
-#define TX4939_CLKCTR_TM2CKD 0x0000000400000000ULL
-#define TX4939_CLKCTR_SIO0CKD 0x0000000200000000ULL
-#define TX4939_CLKCTR_CYPCKD 0x0000000100000000ULL
-#define TX4939_CLKCTR_IOSRST 0x80000000
-#define TX4939_CLKCTR_SYSRST 0x40000000
-#define TX4939_CLKCTR_TM5RST 0x20000000
-#define TX4939_CLKCTR_TM4RST 0x10000000
-#define TX4939_CLKCTR_TM3RST 0x08000000
-#define TX4939_CLKCTR_CIRRST 0x04000000
-#define TX4939_CLKCTR_SIO3RST 0x02000000
-#define TX4939_CLKCTR_SIO2RST 0x01000000
-#define TX4939_CLKCTR_SIO1RST 0x00800000
-#define TX4939_CLKCTR_VPCRST 0x00400000
-#define TX4939_CLKCTR_EPCIRST 0x00200000
-#define TX4939_CLKCTR_ETH1RST 0x00080000
-#define TX4939_CLKCTR_ATA1RST 0x00040000
-#define TX4939_CLKCTR_BROMRST 0x00020000
-#define TX4939_CLKCTR_NDCRST 0x00010000
-#define TX4939_CLKCTR_I2CRST 0x00008000
-#define TX4939_CLKCTR_ETH0RST 0x00004000
-#define TX4939_CLKCTR_SPIRST 0x00002000
-#define TX4939_CLKCTR_SRAMRST 0x00001000
-#define TX4939_CLKCTR_PCI1RST 0x00000800
-#define TX4939_CLKCTR_DMA1RST 0x00000400
-#define TX4939_CLKCTR_ACLRST 0x00000200
-#define TX4939_CLKCTR_ATA0RST 0x00000100
-#define TX4939_CLKCTR_DMA0RST 0x00000080
-#define TX4939_CLKCTR_PCICRST 0x00000040
-#define TX4939_CLKCTR_I2SRST 0x00000020
-#define TX4939_CLKCTR_TM0RST 0x00000010
-#define TX4939_CLKCTR_TM1RST 0x00000008
-#define TX4939_CLKCTR_TM2RST 0x00000004
-#define TX4939_CLKCTR_SIO0RST 0x00000002
-#define TX4939_CLKCTR_CYPRST 0x00000001
-
-/*
- * CRYPTO
- */
-#define TX4939_CRYPTO_CSR_SAESO 0x08000000
-#define TX4939_CRYPTO_CSR_SAESI 0x04000000
-#define TX4939_CRYPTO_CSR_SDESO 0x02000000
-#define TX4939_CRYPTO_CSR_SDESI 0x01000000
-#define TX4939_CRYPTO_CSR_INDXBST_MASK 0x00700000
-#define TX4939_CRYPTO_CSR_INDXBST(n) ((n) << 20)
-#define TX4939_CRYPTO_CSR_TOINT 0x00080000
-#define TX4939_CRYPTO_CSR_DCINT 0x00040000
-#define TX4939_CRYPTO_CSR_GBINT 0x00010000
-#define TX4939_CRYPTO_CSR_INDXAST_MASK 0x0000e000
-#define TX4939_CRYPTO_CSR_INDXAST(n) ((n) << 13)
-#define TX4939_CRYPTO_CSR_CSWAP_MASK 0x00001800
-#define TX4939_CRYPTO_CSR_CSWAP_NONE 0x00000000
-#define TX4939_CRYPTO_CSR_CSWAP_IN 0x00000800
-#define TX4939_CRYPTO_CSR_CSWAP_OUT 0x00001000
-#define TX4939_CRYPTO_CSR_CSWAP_BOTH 0x00001800
-#define TX4939_CRYPTO_CSR_CDIV_MASK 0x00000600
-#define TX4939_CRYPTO_CSR_CDIV_DIV2 0x00000000
-#define TX4939_CRYPTO_CSR_CDIV_DIV1 0x00000200
-#define TX4939_CRYPTO_CSR_CDIV_DIV2ALT 0x00000400
-#define TX4939_CRYPTO_CSR_CDIV_DIV1ALT 0x00000600
-#define TX4939_CRYPTO_CSR_PDINT_MASK 0x000000c0
-#define TX4939_CRYPTO_CSR_PDINT_ALL 0x00000000
-#define TX4939_CRYPTO_CSR_PDINT_END 0x00000040
-#define TX4939_CRYPTO_CSR_PDINT_NEXT 0x00000080
-#define TX4939_CRYPTO_CSR_PDINT_NONE 0x000000c0
-#define TX4939_CRYPTO_CSR_GINTE 0x00000008
-#define TX4939_CRYPTO_CSR_RSTD 0x00000004
-#define TX4939_CRYPTO_CSR_RSTC 0x00000002
-#define TX4939_CRYPTO_CSR_ENCR 0x00000001
-
-/* bits for tx4939_crypto_reg.cdr.gen.ctrl */
-#define TX4939_CRYPTO_CTX_ENGINE_MASK 0x00000003
-#define TX4939_CRYPTO_CTX_ENGINE_DES 0x00000000
-#define TX4939_CRYPTO_CTX_ENGINE_AES 0x00000001
-#define TX4939_CRYPTO_CTX_ENGINE_MD5 0x00000002
-#define TX4939_CRYPTO_CTX_ENGINE_SHA1 0x00000003
-#define TX4939_CRYPTO_CTX_TDMS 0x00000010
-#define TX4939_CRYPTO_CTX_CMS 0x00000020
-#define TX4939_CRYPTO_CTX_DMS 0x00000040
-#define TX4939_CRYPTO_CTX_UPDATE 0x00000080
-
-/* bits for tx4939_crypto_desc.ctrl */
-#define TX4939_CRYPTO_DESC_OB_CNT_MASK 0xffe00000
-#define TX4939_CRYPTO_DESC_OB_CNT(cnt) ((cnt) << 21)
-#define TX4939_CRYPTO_DESC_IB_CNT_MASK 0x001ffc00
-#define TX4939_CRYPTO_DESC_IB_CNT(cnt) ((cnt) << 10)
-#define TX4939_CRYPTO_DESC_START 0x00000200
-#define TX4939_CRYPTO_DESC_END 0x00000100
-#define TX4939_CRYPTO_DESC_XOR 0x00000010
-#define TX4939_CRYPTO_DESC_LAST 0x00000008
-#define TX4939_CRYPTO_DESC_ERR_MASK 0x00000006
-#define TX4939_CRYPTO_DESC_ERR_NONE 0x00000000
-#define TX4939_CRYPTO_DESC_ERR_TOUT 0x00000002
-#define TX4939_CRYPTO_DESC_ERR_DIGEST 0x00000004
-#define TX4939_CRYPTO_DESC_OWN 0x00000001
-
-/* bits for tx4939_crypto_desc.index */
-#define TX4939_CRYPTO_DESC_HASH_IDX_MASK 0x00000070
-#define TX4939_CRYPTO_DESC_HASH_IDX(idx) ((idx) << 4)
-#define TX4939_CRYPTO_DESC_ENCRYPT_IDX_MASK 0x00000007
-#define TX4939_CRYPTO_DESC_ENCRYPT_IDX(idx) ((idx) << 0)
-
-#define TX4939_CRYPTO_NR_SET 6
-
-#define TX4939_CRYPTO_RCSR_INTE 0x00000008
-#define TX4939_CRYPTO_RCSR_RST 0x00000004
-#define TX4939_CRYPTO_RCSR_FIN 0x00000002
-#define TX4939_CRYPTO_RCSR_ST 0x00000001
-
-/*
- * VPC
- */
-#define TX4939_VPC_CSR_GBINT 0x00010000
-#define TX4939_VPC_CSR_SWAPO 0x00000020
-#define TX4939_VPC_CSR_SWAPI 0x00000010
-#define TX4939_VPC_CSR_GINTE 0x00000008
-#define TX4939_VPC_CSR_RSTD 0x00000004
-#define TX4939_VPC_CSR_RSTVPC 0x00000002
-
-#define TX4939_VPC_CTRLA_VDPSN 0x00000200
-#define TX4939_VPC_CTRLA_PBUSY 0x00000100
-#define TX4939_VPC_CTRLA_DCINT 0x00000080
-#define TX4939_VPC_CTRLA_UOINT 0x00000040
-#define TX4939_VPC_CTRLA_PDINT_MASK 0x00000030
-#define TX4939_VPC_CTRLA_PDINT_ALL 0x00000000
-#define TX4939_VPC_CTRLA_PDINT_NEXT 0x00000010
-#define TX4939_VPC_CTRLA_PDINT_NONE 0x00000030
-#define TX4939_VPC_CTRLA_VDVLDP 0x00000008
-#define TX4939_VPC_CTRLA_VDMODE 0x00000004
-#define TX4939_VPC_CTRLA_VDFOR 0x00000002
-#define TX4939_VPC_CTRLA_ENVPC 0x00000001
-
-/* bits for tx4939_vpc_desc.ctrl1 */
-#define TX4939_VPC_DESC_CTRL1_ERR_MASK 0x00000006
-#define TX4939_VPC_DESC_CTRL1_OWN 0x00000001
-
-#define tx4939_ddrcptr ((struct tx4939_ddrc_reg __iomem *)TX4939_DDRC_REG)
-#define tx4939_ebuscptr tx4938_ebuscptr
-#define tx4939_ircptr \
- ((struct tx4939_irc_reg __iomem *)TX4939_IRC_REG)
-#define tx4939_pcicptr tx4938_pcicptr
-#define tx4939_pcic1ptr tx4938_pcic1ptr
-#define tx4939_ccfgptr \
- ((struct tx4939_ccfg_reg __iomem *)TX4939_CCFG_REG)
-#define tx4939_sramcptr tx4938_sramcptr
-#define tx4939_cryptoptr \
- ((struct tx4939_crypto_reg __iomem *)TX4939_CRYPTO_REG)
-#define tx4939_vpcptr ((struct tx4939_vpc_reg __iomem *)TX4939_VPC_REG)
-
-#define TX4939_REV_MAJ_MIN() \
- ((__u32)__raw_readq(&tx4939_ccfgptr->crir) & 0x00ff)
-#define TX4939_REV_PCODE() \
- ((__u32)__raw_readq(&tx4939_ccfgptr->crir) >> 16)
-#define TX4939_CCFG_BCFG() \
- ((__u32)((__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_BCFG_MASK) \
- >> 32))
-
-#define tx4939_ccfg_clear(bits) tx4938_ccfg_clear(bits)
-#define tx4939_ccfg_set(bits) tx4938_ccfg_set(bits)
-#define tx4939_ccfg_change(change, new) tx4938_ccfg_change(change, new)
-
-#define TX4939_EBUSC_CR(ch) TX4927_EBUSC_CR(ch)
-#define TX4939_EBUSC_BA(ch) TX4927_EBUSC_BA(ch)
-#define TX4939_EBUSC_SIZE(ch) TX4927_EBUSC_SIZE(ch)
-#define TX4939_EBUSC_WIDTH(ch) \
- (16 >> ((__u32)(TX4939_EBUSC_CR(ch) >> 20) & 0x1))
-
-/* SCLK0 = MSTCLK * 429/19 * 16/245 / 2 (14.745MHz for MST 20MHz) */
-#define TX4939_SCLK0(mst) \
- ((((mst) + 245/2) / 245UL * 429 * 16 + 19) / 19 / 2)
-
-void tx4939_wdt_init(void);
-void tx4939_setup(void);
-void tx4939_time_init(unsigned int tmrnr);
-void tx4939_sio_init(unsigned int sclk, unsigned int cts_mask);
-void tx4939_spi_init(int busid);
-void tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1);
-int tx4939_report_pciclk(void);
-void tx4939_report_pci1clk(void);
-struct pci_dev;
-int tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
-int tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
-void tx4939_setup_pcierr_irq(void);
-void tx4939_irq_init(void);
-int tx4939_irq(void);
-void tx4939_mtd_init(int ch);
-void tx4939_ata_init(void);
-void tx4939_rtc_init(void);
-void tx4939_ndfmc_init(unsigned int hold, unsigned int spw,
- unsigned char ch_mask, unsigned char wide_mask);
-void tx4939_dmac_init(int memcpy_chan0, int memcpy_chan1);
-void tx4939_aclc_init(void);
-void tx4939_sramc_init(void);
-void tx4939_rng_init(void);
-
-#endif /* __ASM_TXX9_TX4939_H */
diff --git a/arch/mips/include/asm/vermagic.h b/arch/mips/include/asm/vermagic.h
index 4d2dae0c7c57..b7b14e914a1b 100644
--- a/arch/mips/include/asm/vermagic.h
+++ b/arch/mips/include/asm/vermagic.h
@@ -28,8 +28,6 @@
#define MODULE_PROC_FAMILY "VR41XX "
#elif defined CONFIG_CPU_R4X00
#define MODULE_PROC_FAMILY "R4X00 "
-#elif defined CONFIG_CPU_TX49XX
-#define MODULE_PROC_FAMILY "TX49XX "
#elif defined CONFIG_CPU_R5000
#define MODULE_PROC_FAMILY "R5000 "
#elif defined CONFIG_CPU_R5500
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index e6853697a056..26b422abb652 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1211,16 +1211,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
MIPS_CPU_LLSC;
c->tlbsize = 48;
break;
- case PRID_IMP_TX49:
- c->cputype = CPU_TX49XX;
- __cpu_name[cpu] = "R49XX";
- set_isa(c, MIPS_CPU_ISA_III);
- c->fpu_msk31 |= FPU_CSR_CONDX;
- c->options = R4K_OPTS | MIPS_CPU_LLSC;
- if (!(c->processor_id & 0x08))
- c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR;
- c->tlbsize = 48;
- break;
case PRID_IMP_R5000:
c->cputype = CPU_R5000;
__cpu_name[cpu] = "R5000";
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 18e69ebf5691..49eca90c3588 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -223,9 +223,6 @@ void __init check_wait(void)
cpu_wait = r4k_wait_irqoff;
break;
- case CPU_TX49XX:
- cpu_wait = r4k_wait_irqoff;
- break;
case CPU_ALCHEMY:
cpu_wait = au1k_wait;
break;
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4f976d687ab0..2af14719ee66 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -239,16 +239,6 @@ static void r4k_blast_dcache_setup(void)
r4k_blast_dcache = blast_dcache128;
}
-/* force code alignment (used for CONFIG_WAR_TX49XX_ICACHE_INDEX_INV) */
-#define JUMP_TO_ALIGN(order) \
- __asm__ __volatile__( \
- "b\t1f\n\t" \
- ".align\t" #order "\n\t" \
- "1:\n\t" \
- )
-#define CACHE32_UNROLL32_ALIGN JUMP_TO_ALIGN(10) /* 32 * 32 = 1024 */
-#define CACHE32_UNROLL32_ALIGN2 JUMP_TO_ALIGN(11)
-
static inline void blast_r4600_v1_icache32(void)
{
unsigned long flags;
@@ -258,29 +248,6 @@ static inline void blast_r4600_v1_icache32(void)
local_irq_restore(flags);
}
-static inline void tx49_blast_icache32(void)
-{
- unsigned long start = INDEX_BASE;
- unsigned long end = start + current_cpu_data.icache.waysize;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- CACHE32_UNROLL32_ALIGN2;
- /* I'm in even chunk. blast odd chunks */
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
- cache_unroll(32, kernel_cache, Index_Invalidate_I,
- addr | ws, 32);
- CACHE32_UNROLL32_ALIGN;
- /* I'm in odd chunk. blast even chunks */
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400 * 2)
- cache_unroll(32, kernel_cache, Index_Invalidate_I,
- addr | ws, 32);
-}
-
static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page)
{
unsigned long flags;
@@ -290,30 +257,6 @@ static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page)
local_irq_restore(flags);
}
-static inline void tx49_blast_icache32_page_indexed(unsigned long page)
-{
- unsigned long indexmask = current_cpu_data.icache.waysize - 1;
- unsigned long start = INDEX_BASE + (page & indexmask);
- unsigned long end = start + PAGE_SIZE;
- unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
- unsigned long ws_end = current_cpu_data.icache.ways <<
- current_cpu_data.icache.waybit;
- unsigned long ws, addr;
-
- CACHE32_UNROLL32_ALIGN2;
- /* I'm in even chunk. blast odd chunks */
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
- cache_unroll(32, kernel_cache, Index_Invalidate_I,
- addr | ws, 32);
- CACHE32_UNROLL32_ALIGN;
- /* I'm in odd chunk. blast even chunks */
- for (ws = 0; ws < ws_end; ws += ws_inc)
- for (addr = start; addr < end; addr += 0x400 * 2)
- cache_unroll(32, kernel_cache, Index_Invalidate_I,
- addr | ws, 32);
-}
-
static void (* r4k_blast_icache_page)(unsigned long addr);
static void r4k_blast_icache_page_setup(void)
@@ -371,9 +314,6 @@ static void r4k_blast_icache_page_indexed_setup(void)
cpu_is_r4600_v1_x())
r4k_blast_icache_page_indexed =
blast_icache32_r4600_v1_page_indexed;
- else if (IS_ENABLED(CONFIG_WAR_TX49XX_ICACHE_INDEX_INV))
- r4k_blast_icache_page_indexed =
- tx49_blast_icache32_page_indexed;
else if (current_cpu_type() == CPU_LOONGSON2EF)
r4k_blast_icache_page_indexed =
loongson2_blast_icache32_page_indexed;
@@ -399,8 +339,6 @@ static void r4k_blast_icache_setup(void)
if (IS_ENABLED(CONFIG_WAR_R4600_V1_INDEX_ICACHEOP) &&
cpu_is_r4600_v1_x())
r4k_blast_icache = blast_r4600_v1_icache32;
- else if (IS_ENABLED(CONFIG_WAR_TX49XX_ICACHE_INDEX_INV))
- r4k_blast_icache = tx49_blast_icache32;
else if (current_cpu_type() == CPU_LOONGSON2EF)
r4k_blast_icache = loongson2_blast_icache32;
else
@@ -1143,21 +1081,6 @@ static void probe_pcache(void)
c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
break;
- case CPU_TX49XX:
- icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
- c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
- c->icache.ways = 4;
- c->icache.waybit= 0;
-
- dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
- c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
- c->dcache.ways = 4;
- c->dcache.waybit = 0;
-
- c->options |= MIPS_CPU_CACHE_CDEX_P;
- c->options |= MIPS_CPU_PREFETCH;
- break;
-
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 504bc4047c4c..3edd74d7de39 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -147,7 +147,6 @@ static void set_prefetch_parameters(void)
cache_line_size = cpu_dcache_line_size();
switch (current_cpu_type()) {
case CPU_R5500:
- case CPU_TX49XX:
/* These processors only support the Pref_Load. */
pref_bias_copy_load = 256;
break;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index a7521b8f7658..4c7cc11f26c4 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -550,7 +550,6 @@ void build_tlb_write_entry(u32 **p, struct uasm_label **l,
break;
case CPU_5KC:
- case CPU_TX49XX:
case CPU_PR4450:
case CPU_XLR:
uasm_i_nop(p);
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index f3eecc065e5c..d40e723d1211 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
-obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \
ops-bcm63xx.o
@@ -47,11 +46,6 @@ obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o
-obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
-obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
-obj-$(CONFIG_SOC_TX4939) += pci-tx4939.o
-obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o
-obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o
obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
diff --git a/arch/mips/pci/fixup-rbtx4927.c b/arch/mips/pci/fixup-rbtx4927.c
deleted file mode 100644
index d6aaed1d6be9..000000000000
--- a/arch/mips/pci/fixup-rbtx4927.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Board specific pci fixups for the Toshiba rbtx4927
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Author: Manish Lachwani (mlachwani@mvista.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <asm/txx9/pci.h>
-#include <asm/txx9/rbtx4927.h>
-
-int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- unsigned char irq = pin;
-
- /* IRQ rotation */
- irq--; /* 0-3 */
- if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
- /* PCI CardSlot (IDSEL=A23) */
- /* PCIA => PCIA */
- irq = (irq + 0 + slot) % 4;
- } else {
- /* PCI Backplane */
- if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
- irq = (irq + 33 - slot) % 4;
- else
- irq = (irq + 3 + slot) % 4;
- }
- irq++; /* 1-4 */
-
- switch (irq) {
- case 1:
- irq = RBTX4927_IRQ_IOC_PCIA;
- break;
- case 2:
- irq = RBTX4927_IRQ_IOC_PCIB;
- break;
- case 3:
- irq = RBTX4927_IRQ_IOC_PCIC;
- break;
- case 4:
- irq = RBTX4927_IRQ_IOC_PCID;
- break;
- }
- return irq;
-}
diff --git a/arch/mips/pci/fixup-rbtx4938.c b/arch/mips/pci/fixup-rbtx4938.c
deleted file mode 100644
index ff22a22db73e..000000000000
--- a/arch/mips/pci/fixup-rbtx4938.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Toshiba rbtx4938 pci routines
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/types.h>
-#include <asm/txx9/pci.h>
-#include <asm/txx9/rbtx4938.h>
-
-int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- int irq = tx4938_pcic1_map_irq(dev, slot);
-
- if (irq >= 0)
- return irq;
- irq = pin;
- /* IRQ rotation */
- irq--; /* 0-3 */
- if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
- /* PCI CardSlot (IDSEL=A23) */
- /* PCIA => PCIA (IDSEL=A23) */
- irq = (irq + 0 + slot) % 4;
- } else {
- /* PCI Backplane */
- if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
- irq = (irq + 33 - slot) % 4;
- else
- irq = (irq + 3 + slot) % 4;
- }
- irq++; /* 1-4 */
-
- switch (irq) {
- case 1:
- irq = RBTX4938_IRQ_IOC_PCIA;
- break;
- case 2:
- irq = RBTX4938_IRQ_IOC_PCIB;
- break;
- case 3:
- irq = RBTX4938_IRQ_IOC_PCIC;
- break;
- case 4:
- irq = RBTX4938_IRQ_IOC_PCID;
- break;
- }
- return irq;
-}
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
deleted file mode 100644
index f7802f100401..000000000000
--- a/arch/mips/pci/ops-tx4927.c
+++ /dev/null
@@ -1,524 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Define the pci_ops for the PCIC on Toshiba TX4927, TX4938, etc.
- *
- * Based on linux/arch/mips/pci/ops-tx4938.c,
- * linux/arch/mips/pci/fixup-rbtx4938.c,
- * linux/arch/mips/txx9/rbtx4938/setup.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * 2003-2005 (c) MontaVista Software, Inc.
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
- */
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <asm/txx9/pci.h>
-#include <asm/txx9/tx4927pcic.h>
-
-static struct {
- struct pci_controller *channel;
- struct tx4927_pcic_reg __iomem *pcicptr;
-} pcicptrs[2]; /* TX4938 has 2 pcic */
-
-static void __init set_tx4927_pcicptr(struct pci_controller *channel,
- struct tx4927_pcic_reg __iomem *pcicptr)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
- if (pcicptrs[i].channel == channel) {
- pcicptrs[i].pcicptr = pcicptr;
- return;
- }
- }
- for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
- if (!pcicptrs[i].channel) {
- pcicptrs[i].channel = channel;
- pcicptrs[i].pcicptr = pcicptr;
- return;
- }
- }
- BUG();
-}
-
-struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
- struct pci_controller *channel)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
- if (pcicptrs[i].channel == channel)
- return pcicptrs[i].pcicptr;
- }
- return NULL;
-}
-
-static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where,
- struct tx4927_pcic_reg __iomem *pcicptr)
-{
- if (bus->parent == NULL &&
- devfn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
- return -1;
- __raw_writel(((bus->number & 0xff) << 0x10)
- | ((devfn & 0xff) << 0x08) | (where & 0xfc)
- | (bus->parent ? 1 : 0),
- &pcicptr->g2pcfgadrs);
- /* clear M_ABORT and Disable M_ABORT Int. */
- __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
- | (PCI_STATUS_REC_MASTER_ABORT << 16),
- &pcicptr->pcistatus);
- return 0;
-}
-
-static int check_abort(struct tx4927_pcic_reg __iomem *pcicptr)
-{
- int code = PCIBIOS_SUCCESSFUL;
-
- /* wait write cycle completion before checking error status */
- while (__raw_readl(&pcicptr->pcicstatus) & TX4927_PCIC_PCICSTATUS_IWB)
- ;
- if (__raw_readl(&pcicptr->pcistatus)
- & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
- __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
- | (PCI_STATUS_REC_MASTER_ABORT << 16),
- &pcicptr->pcistatus);
- /* flush write buffer */
- iob();
- code = PCIBIOS_DEVICE_NOT_FOUND;
- }
- return code;
-}
-
-static u8 icd_readb(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
-{
-#ifdef __BIG_ENDIAN
- offset ^= 3;
-#endif
- return __raw_readb((void __iomem *)&pcicptr->g2pcfgdata + offset);
-}
-static u16 icd_readw(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
-{
-#ifdef __BIG_ENDIAN
- offset ^= 2;
-#endif
- return __raw_readw((void __iomem *)&pcicptr->g2pcfgdata + offset);
-}
-static u32 icd_readl(struct tx4927_pcic_reg __iomem *pcicptr)
-{
- return __raw_readl(&pcicptr->g2pcfgdata);
-}
-static void icd_writeb(u8 val, int offset,
- struct tx4927_pcic_reg __iomem *pcicptr)
-{
-#ifdef __BIG_ENDIAN
- offset ^= 3;
-#endif
- __raw_writeb(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
-}
-static void icd_writew(u16 val, int offset,
- struct tx4927_pcic_reg __iomem *pcicptr)
-{
-#ifdef __BIG_ENDIAN
- offset ^= 2;
-#endif
- __raw_writew(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
-}
-static void icd_writel(u32 val, struct tx4927_pcic_reg __iomem *pcicptr)
-{
- __raw_writel(val, &pcicptr->g2pcfgdata);
-}
-
-static struct tx4927_pcic_reg __iomem *pci_bus_to_pcicptr(struct pci_bus *bus)
-{
- struct pci_controller *channel = bus->sysdata;
- return get_tx4927_pcicptr(channel);
-}
-
-static int tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 *val)
-{
- struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
-
- if (mkaddr(bus, devfn, where, pcicptr)) {
- *val = 0xffffffff;
- return -1;
- }
- switch (size) {
- case 1:
- *val = icd_readb(where & 3, pcicptr);
- break;
- case 2:
- *val = icd_readw(where & 3, pcicptr);
- break;
- default:
- *val = icd_readl(pcicptr);
- }
- return check_abort(pcicptr);
-}
-
-static int tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
-
- if (mkaddr(bus, devfn, where, pcicptr))
- return -1;
- switch (size) {
- case 1:
- icd_writeb(val, where & 3, pcicptr);
- break;
- case 2:
- icd_writew(val, where & 3, pcicptr);
- break;
- default:
- icd_writel(val, pcicptr);
- }
- return check_abort(pcicptr);
-}
-
-static struct pci_ops tx4927_pci_ops = {
- .read = tx4927_pci_config_read,
- .write = tx4927_pci_config_write,
-};
-
-static struct {
- u8 trdyto;
- u8 retryto;
- u16 gbwc;
-} tx4927_pci_opts = {
- .trdyto = 0,
- .retryto = 0,
- .gbwc = 0xfe0, /* 4064 GBUSCLK for CCFG.GTOT=0b11 */
-};
-
-char *tx4927_pcibios_setup(char *str)
-{
- if (!strncmp(str, "trdyto=", 7)) {
- u8 val = 0;
- if (kstrtou8(str + 7, 0, &val) == 0)
- tx4927_pci_opts.trdyto = val;
- return NULL;
- }
- if (!strncmp(str, "retryto=", 8)) {
- u8 val = 0;
- if (kstrtou8(str + 8, 0, &val) == 0)
- tx4927_pci_opts.retryto = val;
- return NULL;
- }
- if (!strncmp(str, "gbwc=", 5)) {
- u16 val;
- if (kstrtou16(str + 5, 0, &val) == 0)
- tx4927_pci_opts.gbwc = val;
- return NULL;
- }
- return str;
-}
-
-void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
- struct pci_controller *channel, int extarb)
-{
- int i;
- unsigned long flags;
-
- set_tx4927_pcicptr(channel, pcicptr);
-
- if (!channel->pci_ops)
- printk(KERN_INFO
- "PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
- __raw_readl(&pcicptr->pciid) >> 16,
- __raw_readl(&pcicptr->pciid) & 0xffff,
- __raw_readl(&pcicptr->pciccrev) & 0xff,
- extarb ? "External" : "Internal");
- channel->pci_ops = &tx4927_pci_ops;
-
- local_irq_save(flags);
-
- /* Disable All Initiator Space */
- __raw_writel(__raw_readl(&pcicptr->pciccfg)
- & ~(TX4927_PCIC_PCICCFG_G2PMEN(0)
- | TX4927_PCIC_PCICCFG_G2PMEN(1)
- | TX4927_PCIC_PCICCFG_G2PMEN(2)
- | TX4927_PCIC_PCICCFG_G2PIOEN),
- &pcicptr->pciccfg);
-
- /* GB->PCI mappings */
- __raw_writel((channel->io_resource->end - channel->io_resource->start)
- >> 4,
- &pcicptr->g2piomask);
- ____raw_writeq((channel->io_resource->start +
- channel->io_map_base - IO_BASE) |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_G2PIOGBASE_ECHG
-#else
- TX4927_PCIC_G2PIOGBASE_BSDIS
-#endif
- , &pcicptr->g2piogbase);
- ____raw_writeq(channel->io_resource->start - channel->io_offset,
- &pcicptr->g2piopbase);
- for (i = 0; i < 3; i++) {
- __raw_writel(0, &pcicptr->g2pmmask[i]);
- ____raw_writeq(0, &pcicptr->g2pmgbase[i]);
- ____raw_writeq(0, &pcicptr->g2pmpbase[i]);
- }
- if (channel->mem_resource->end) {
- __raw_writel((channel->mem_resource->end
- - channel->mem_resource->start) >> 4,
- &pcicptr->g2pmmask[0]);
- ____raw_writeq(channel->mem_resource->start |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_G2PMnGBASE_ECHG
-#else
- TX4927_PCIC_G2PMnGBASE_BSDIS
-#endif
- , &pcicptr->g2pmgbase[0]);
- ____raw_writeq(channel->mem_resource->start -
- channel->mem_offset,
- &pcicptr->g2pmpbase[0]);
- }
- /* PCI->GB mappings (I/O 256B) */
- __raw_writel(0, &pcicptr->p2giopbase); /* 256B */
- ____raw_writeq(0, &pcicptr->p2giogbase);
- /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
- __raw_writel(0, &pcicptr->p2gm0plbase);
- __raw_writel(0, &pcicptr->p2gm0pubase);
- ____raw_writeq(TX4927_PCIC_P2GMnGBASE_TMEMEN |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_P2GMnGBASE_TECHG
-#else
- TX4927_PCIC_P2GMnGBASE_TBSDIS
-#endif
- , &pcicptr->p2gmgbase[0]);
- /* PCI->GB mappings (MEM 16MB) */
- __raw_writel(0xffffffff, &pcicptr->p2gm1plbase);
- __raw_writel(0xffffffff, &pcicptr->p2gm1pubase);
- ____raw_writeq(0, &pcicptr->p2gmgbase[1]);
- /* PCI->GB mappings (MEM 1MB) */
- __raw_writel(0xffffffff, &pcicptr->p2gm2pbase); /* 1MB */
- ____raw_writeq(0, &pcicptr->p2gmgbase[2]);
-
- /* Clear all (including IRBER) except for GBWC */
- __raw_writel((tx4927_pci_opts.gbwc << 16)
- & TX4927_PCIC_PCICCFG_GBWC_MASK,
- &pcicptr->pciccfg);
- /* Enable Initiator Memory Space */
- if (channel->mem_resource->end)
- __raw_writel(__raw_readl(&pcicptr->pciccfg)
- | TX4927_PCIC_PCICCFG_G2PMEN(0),
- &pcicptr->pciccfg);
- /* Enable Initiator I/O Space */
- if (channel->io_resource->end)
- __raw_writel(__raw_readl(&pcicptr->pciccfg)
- | TX4927_PCIC_PCICCFG_G2PIOEN,
- &pcicptr->pciccfg);
- /* Enable Initiator Config */
- __raw_writel(__raw_readl(&pcicptr->pciccfg)
- | TX4927_PCIC_PCICCFG_ICAEN | TX4927_PCIC_PCICCFG_TCAR,
- &pcicptr->pciccfg);
-
- /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
- __raw_writel(0, &pcicptr->pcicfg1);
-
- __raw_writel((__raw_readl(&pcicptr->g2ptocnt) & ~0xffff)
- | (tx4927_pci_opts.trdyto & 0xff)
- | ((tx4927_pci_opts.retryto & 0xff) << 8),
- &pcicptr->g2ptocnt);
-
- /* Clear All Local Bus Status */
- __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicstatus);
- /* Enable All Local Bus Interrupts */
- __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicmask);
- /* Clear All Initiator Status */
- __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pstatus);
- /* Enable All Initiator Interrupts */
- __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pmask);
- /* Clear All PCI Status Error */
- __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
- | (TX4927_PCIC_PCISTATUS_ALL << 16),
- &pcicptr->pcistatus);
- /* Enable All PCI Status Error Interrupts */
- __raw_writel(TX4927_PCIC_PCISTATUS_ALL, &pcicptr->pcimask);
-
- if (!extarb) {
- /* Reset Bus Arbiter */
- __raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg);
- __raw_writel(0, &pcicptr->pbabm);
- /* Enable Bus Arbiter */
- __raw_writel(TX4927_PCIC_PBACFG_PBAEN, &pcicptr->pbacfg);
- }
-
- __raw_writel(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
- | PCI_COMMAND_PARITY | PCI_COMMAND_SERR,
- &pcicptr->pcistatus);
- local_irq_restore(flags);
-
- printk(KERN_DEBUG
- "PCI: COMMAND=%04x,PCIMASK=%04x,"
- "TRDYTO=%02x,RETRYTO=%02x,GBWC=%03x\n",
- __raw_readl(&pcicptr->pcistatus) & 0xffff,
- __raw_readl(&pcicptr->pcimask) & 0xffff,
- __raw_readl(&pcicptr->g2ptocnt) & 0xff,
- (__raw_readl(&pcicptr->g2ptocnt) & 0xff00) >> 8,
- (__raw_readl(&pcicptr->pciccfg) >> 16) & 0xfff);
-}
-
-static void tx4927_report_pcic_status1(struct tx4927_pcic_reg __iomem *pcicptr)
-{
- __u16 pcistatus = (__u16)(__raw_readl(&pcicptr->pcistatus) >> 16);
- __u32 g2pstatus = __raw_readl(&pcicptr->g2pstatus);
- __u32 pcicstatus = __raw_readl(&pcicptr->pcicstatus);
- static struct {
- __u32 flag;
- const char *str;
- } pcistat_tbl[] = {
- { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
- { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
- { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
- { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
- { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
- { PCI_STATUS_PARITY, "MasterParityError" },
- }, g2pstat_tbl[] = {
- { TX4927_PCIC_G2PSTATUS_TTOE, "TIOE" },
- { TX4927_PCIC_G2PSTATUS_RTOE, "RTOE" },
- }, pcicstat_tbl[] = {
- { TX4927_PCIC_PCICSTATUS_PME, "PME" },
- { TX4927_PCIC_PCICSTATUS_TLB, "TLB" },
- { TX4927_PCIC_PCICSTATUS_NIB, "NIB" },
- { TX4927_PCIC_PCICSTATUS_ZIB, "ZIB" },
- { TX4927_PCIC_PCICSTATUS_PERR, "PERR" },
- { TX4927_PCIC_PCICSTATUS_SERR, "SERR" },
- { TX4927_PCIC_PCICSTATUS_GBE, "GBE" },
- { TX4927_PCIC_PCICSTATUS_IWB, "IWB" },
- };
- int i, cont;
-
- printk(KERN_ERR "");
- if (pcistatus & TX4927_PCIC_PCISTATUS_ALL) {
- printk(KERN_CONT "pcistat:%04x(", pcistatus);
- for (i = 0, cont = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
- if (pcistatus & pcistat_tbl[i].flag)
- printk(KERN_CONT "%s%s",
- cont++ ? " " : "", pcistat_tbl[i].str);
- printk(KERN_CONT ") ");
- }
- if (g2pstatus & TX4927_PCIC_G2PSTATUS_ALL) {
- printk(KERN_CONT "g2pstatus:%08x(", g2pstatus);
- for (i = 0, cont = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
- if (g2pstatus & g2pstat_tbl[i].flag)
- printk(KERN_CONT "%s%s",
- cont++ ? " " : "", g2pstat_tbl[i].str);
- printk(KERN_CONT ") ");
- }
- if (pcicstatus & TX4927_PCIC_PCICSTATUS_ALL) {
- printk(KERN_CONT "pcicstatus:%08x(", pcicstatus);
- for (i = 0, cont = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
- if (pcicstatus & pcicstat_tbl[i].flag)
- printk(KERN_CONT "%s%s",
- cont++ ? " " : "", pcicstat_tbl[i].str);
- printk(KERN_CONT ")");
- }
- printk(KERN_CONT "\n");
-}
-
-void tx4927_report_pcic_status(void)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
- if (pcicptrs[i].pcicptr)
- tx4927_report_pcic_status1(pcicptrs[i].pcicptr);
- }
-}
-
-static void tx4927_dump_pcic_settings1(struct tx4927_pcic_reg __iomem *pcicptr)
-{
- int i;
- __u32 __iomem *preg = (__u32 __iomem *)pcicptr;
-
- printk(KERN_INFO "tx4927 pcic (0x%p) settings:", pcicptr);
- for (i = 0; i < sizeof(struct tx4927_pcic_reg); i += 4, preg++) {
- if (i % 32 == 0) {
- printk(KERN_CONT "\n");
- printk(KERN_INFO "%04x:", i);
- }
- /* skip registers with side-effects */
- if (i == offsetof(struct tx4927_pcic_reg, g2pintack)
- || i == offsetof(struct tx4927_pcic_reg, g2pspc)
- || i == offsetof(struct tx4927_pcic_reg, g2pcfgadrs)
- || i == offsetof(struct tx4927_pcic_reg, g2pcfgdata)) {
- printk(KERN_CONT " XXXXXXXX");
- continue;
- }
- printk(KERN_CONT " %08x", __raw_readl(preg));
- }
- printk(KERN_CONT "\n");
-}
-
-void tx4927_dump_pcic_settings(void)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
- if (pcicptrs[i].pcicptr)
- tx4927_dump_pcic_settings1(pcicptrs[i].pcicptr);
- }
-}
-
-irqreturn_t tx4927_pcierr_interrupt(int irq, void *dev_id)
-{
- struct pt_regs *regs = get_irq_regs();
- struct tx4927_pcic_reg __iomem *pcicptr =
- (struct tx4927_pcic_reg __iomem *)(unsigned long)dev_id;
-
- if (txx9_pci_err_action != TXX9_PCI_ERR_IGNORE) {
- printk(KERN_WARNING "PCIERR interrupt at 0x%0*lx\n",
- (int)(2 * sizeof(unsigned long)), regs->cp0_epc);
- tx4927_report_pcic_status1(pcicptr);
- }
- if (txx9_pci_err_action != TXX9_PCI_ERR_PANIC) {
- /* clear all pci errors */
- __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
- | (TX4927_PCIC_PCISTATUS_ALL << 16),
- &pcicptr->pcistatus);
- __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pstatus);
- __raw_writel(TX4927_PCIC_PBASTATUS_ALL, &pcicptr->pbastatus);
- __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicstatus);
- return IRQ_HANDLED;
- }
- console_verbose();
- tx4927_dump_pcic_settings1(pcicptr);
- panic("PCI error.");
-}
-
-#ifdef CONFIG_TOSHIBA_FPCIB0
-static void tx4927_quirk_slc90e66_bridge(struct pci_dev *dev)
-{
- struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(dev->bus);
-
- if (!pcicptr)
- return;
- if (__raw_readl(&pcicptr->pbacfg) & TX4927_PCIC_PBACFG_PBAEN) {
- /* Reset Bus Arbiter */
- __raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg);
- /*
- * swap reqBP and reqXP (raise priority of SLC90E66).
- * SLC90E66(PCI-ISA bridge) is connected to REQ2 on
- * PCI Backplane board.
- */
- __raw_writel(0x72543610, &pcicptr->pbareqport);
- __raw_writel(0, &pcicptr->pbabm);
- /* Use Fixed ParkMaster (required by SLC90E66) */
- __raw_writel(TX4927_PCIC_PBACFG_FIXPA, &pcicptr->pbacfg);
- /* Enable Bus Arbiter */
- __raw_writel(TX4927_PCIC_PBACFG_FIXPA |
- TX4927_PCIC_PBACFG_PBAEN,
- &pcicptr->pbacfg);
- printk(KERN_INFO "PCI: Use Fixed Park Master (REQPORT %08x)\n",
- __raw_readl(&pcicptr->pbareqport));
- }
-}
-#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_0,
- tx4927_quirk_slc90e66_bridge);
-#endif
diff --git a/arch/mips/pci/pci-tx4927.c b/arch/mips/pci/pci-tx4927.c
deleted file mode 100644
index 9b3301d19a63..000000000000
--- a/arch/mips/pci/pci-tx4927.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * Copyright 2001, 2003-2005 MontaVista Software Inc.
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/tx4927.h>
-
-int __init tx4927_report_pciclk(void)
-{
- int pciclk = 0;
-
- pr_info("PCIC --%s PCICLK:",
- (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
- " PCI66" : "");
- if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
- u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
- switch ((unsigned long)ccfg &
- TX4927_CCFG_PCIDIVMODE_MASK) {
- case TX4927_CCFG_PCIDIVMODE_2_5:
- pciclk = txx9_cpu_clock * 2 / 5; break;
- case TX4927_CCFG_PCIDIVMODE_3:
- pciclk = txx9_cpu_clock / 3; break;
- case TX4927_CCFG_PCIDIVMODE_5:
- pciclk = txx9_cpu_clock / 5; break;
- case TX4927_CCFG_PCIDIVMODE_6:
- pciclk = txx9_cpu_clock / 6; break;
- }
- pr_cont("Internal(%u.%uMHz)",
- (pciclk + 50000) / 1000000,
- ((pciclk + 50000) / 100000) % 10);
- } else {
- pr_cont("External");
- pciclk = -1;
- }
- pr_cont("\n");
- return pciclk;
-}
-
-int __init tx4927_pciclk66_setup(void)
-{
- int pciclk;
-
- /* Assert M66EN */
- tx4927_ccfg_set(TX4927_CCFG_PCI66);
- /* Double PCICLK (if possible) */
- if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
- unsigned int pcidivmode = 0;
- u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
- pcidivmode = (unsigned long)ccfg &
- TX4927_CCFG_PCIDIVMODE_MASK;
- switch (pcidivmode) {
- case TX4927_CCFG_PCIDIVMODE_5:
- case TX4927_CCFG_PCIDIVMODE_2_5:
- pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
- pciclk = txx9_cpu_clock * 2 / 5;
- break;
- case TX4927_CCFG_PCIDIVMODE_6:
- case TX4927_CCFG_PCIDIVMODE_3:
- default:
- pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
- pciclk = txx9_cpu_clock / 3;
- }
- tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
- pcidivmode);
- pr_debug("PCICLK: ccfg:%08lx\n",
- (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
- } else
- pciclk = -1;
- return pciclk;
-}
-
-void __init tx4927_setup_pcierr_irq(void)
-{
- if (request_irq(TXX9_IRQ_BASE + TX4927_IR_PCIERR,
- tx4927_pcierr_interrupt,
- 0, "PCI error",
- (void *)TX4927_PCIC_REG))
- pr_warn("Failed to request irq for PCIERR\n");
-}
diff --git a/arch/mips/pci/pci-tx4938.c b/arch/mips/pci/pci-tx4938.c
deleted file mode 100644
index a6418460e3c4..000000000000
--- a/arch/mips/pci/pci-tx4938.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * Copyright 2001, 2003-2005 MontaVista Software Inc.
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/tx4938.h>
-
-int __init tx4938_report_pciclk(void)
-{
- int pciclk = 0;
-
- pr_info("PCIC --%s PCICLK:",
- (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ?
- " PCI66" : "");
- if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
- u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
- switch ((unsigned long)ccfg &
- TX4938_CCFG_PCIDIVMODE_MASK) {
- case TX4938_CCFG_PCIDIVMODE_4:
- pciclk = txx9_cpu_clock / 4; break;
- case TX4938_CCFG_PCIDIVMODE_4_5:
- pciclk = txx9_cpu_clock * 2 / 9; break;
- case TX4938_CCFG_PCIDIVMODE_5:
- pciclk = txx9_cpu_clock / 5; break;
- case TX4938_CCFG_PCIDIVMODE_5_5:
- pciclk = txx9_cpu_clock * 2 / 11; break;
- case TX4938_CCFG_PCIDIVMODE_8:
- pciclk = txx9_cpu_clock / 8; break;
- case TX4938_CCFG_PCIDIVMODE_9:
- pciclk = txx9_cpu_clock / 9; break;
- case TX4938_CCFG_PCIDIVMODE_10:
- pciclk = txx9_cpu_clock / 10; break;
- case TX4938_CCFG_PCIDIVMODE_11:
- pciclk = txx9_cpu_clock / 11; break;
- }
- pr_cont("Internal(%u.%uMHz)",
- (pciclk + 50000) / 1000000,
- ((pciclk + 50000) / 100000) % 10);
- } else {
- pr_cont("External");
- pciclk = -1;
- }
- pr_cont("\n");
- return pciclk;
-}
-
-void __init tx4938_report_pci1clk(void)
-{
- __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
- unsigned int pciclk =
- txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2);
-
- pr_info("PCIC1 -- %sPCICLK:%u.%uMHz\n",
- (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "",
- (pciclk + 50000) / 1000000,
- ((pciclk + 50000) / 100000) % 10);
-}
-
-int __init tx4938_pciclk66_setup(void)
-{
- int pciclk;
-
- /* Assert M66EN */
- tx4938_ccfg_set(TX4938_CCFG_PCI66);
- /* Double PCICLK (if possible) */
- if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
- unsigned int pcidivmode = 0;
- u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
- pcidivmode = (unsigned long)ccfg &
- TX4938_CCFG_PCIDIVMODE_MASK;
- switch (pcidivmode) {
- case TX4938_CCFG_PCIDIVMODE_8:
- case TX4938_CCFG_PCIDIVMODE_4:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
- pciclk = txx9_cpu_clock / 4;
- break;
- case TX4938_CCFG_PCIDIVMODE_9:
- case TX4938_CCFG_PCIDIVMODE_4_5:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
- pciclk = txx9_cpu_clock * 2 / 9;
- break;
- case TX4938_CCFG_PCIDIVMODE_10:
- case TX4938_CCFG_PCIDIVMODE_5:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
- pciclk = txx9_cpu_clock / 5;
- break;
- case TX4938_CCFG_PCIDIVMODE_11:
- case TX4938_CCFG_PCIDIVMODE_5_5:
- default:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
- pciclk = txx9_cpu_clock * 2 / 11;
- break;
- }
- tx4938_ccfg_change(TX4938_CCFG_PCIDIVMODE_MASK,
- pcidivmode);
- pr_debug("PCICLK: ccfg:%08lx\n",
- (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg));
- } else
- pciclk = -1;
- return pciclk;
-}
-
-int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
-{
- if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
- switch (slot) {
- case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
- if (__raw_readq(&tx4938_ccfgptr->pcfg) &
- TX4938_PCFG_ETH0_SEL)
- return TXX9_IRQ_BASE + TX4938_IR_ETH0;
- break;
- case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
- if (__raw_readq(&tx4938_ccfgptr->pcfg) &
- TX4938_PCFG_ETH1_SEL)
- return TXX9_IRQ_BASE + TX4938_IR_ETH1;
- break;
- }
- return 0;
- }
- return -1;
-}
-
-void __init tx4938_setup_pcierr_irq(void)
-{
- if (request_irq(TXX9_IRQ_BASE + TX4938_IR_PCIERR,
- tx4927_pcierr_interrupt,
- 0, "PCI error",
- (void *)TX4927_PCIC_REG))
- pr_warn("Failed to request irq for PCIERR\n");
-}
diff --git a/arch/mips/pci/pci-tx4939.c b/arch/mips/pci/pci-tx4939.c
deleted file mode 100644
index 09a65f7dbe7c..000000000000
--- a/arch/mips/pci/pci-tx4939.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Based on linux/arch/mips/txx9/rbtx4939/setup.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * Copyright 2001, 2003-2005 MontaVista Software Inc.
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/tx4939.h>
-
-int __init tx4939_report_pciclk(void)
-{
- int pciclk = 0;
-
- pr_info("PCIC --%s PCICLK:",
- (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ?
- " PCI66" : "");
- if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) {
- pciclk = txx9_master_clock * 20 / 6;
- if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66))
- pciclk /= 2;
- pr_cont("Internal(%u.%uMHz)",
- (pciclk + 50000) / 1000000,
- ((pciclk + 50000) / 100000) % 10);
- } else {
- pr_cont("External");
- pciclk = -1;
- }
- pr_cont("\n");
- return pciclk;
-}
-
-void __init tx4939_report_pci1clk(void)
-{
- unsigned int pciclk = txx9_master_clock * 20 / 6;
-
- pr_info("PCIC1 -- PCICLK:%u.%uMHz\n",
- (pciclk + 50000) / 1000000,
- ((pciclk + 50000) / 100000) % 10);
-}
-
-int tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
-{
- if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) {
- switch (slot) {
- case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
- if (__raw_readq(&tx4939_ccfgptr->pcfg) &
- TX4939_PCFG_ET0MODE)
- return TXX9_IRQ_BASE + TX4939_IR_ETH(0);
- break;
- case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
- if (__raw_readq(&tx4939_ccfgptr->pcfg) &
- TX4939_PCFG_ET1MODE)
- return TXX9_IRQ_BASE + TX4939_IR_ETH(1);
- break;
- }
- return 0;
- }
- return -1;
-}
-
-int tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- int irq = tx4939_pcic1_map_irq(dev, slot);
-
- if (irq >= 0)
- return irq;
- irq = pin;
- /* IRQ rotation */
- irq--; /* 0-3 */
- irq = (irq + 33 - slot) % 4;
- irq++; /* 1-4 */
-
- switch (irq) {
- case 1:
- irq = TXX9_IRQ_BASE + TX4939_IR_INTA;
- break;
- case 2:
- irq = TXX9_IRQ_BASE + TX4939_IR_INTB;
- break;
- case 3:
- irq = TXX9_IRQ_BASE + TX4939_IR_INTC;
- break;
- case 4:
- irq = TXX9_IRQ_BASE + TX4939_IR_INTD;
- break;
- }
- return irq;
-}
-
-void __init tx4939_setup_pcierr_irq(void)
-{
- if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR,
- tx4927_pcierr_interrupt,
- 0, "PCI error",
- (void *)TX4939_PCIC_REG))
- pr_warn("Failed to request irq for PCIERR\n");
-}
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig
index 85c4c121c71f..ac80f5441f14 100644
--- a/arch/mips/txx9/Kconfig
+++ b/arch/mips/txx9/Kconfig
@@ -4,15 +4,6 @@ config MACH_TX39XX
select MACH_TXX9
select SYS_HAS_CPU_TX39XX
-config MACH_TX49XX
- bool
- select MACH_TXX9
- select CEVT_R4K
- select CSRC_R4K
- select IRQ_MIPS_CPU
- select SYS_HAS_CPU_TX49XX
- select SYS_SUPPORTS_64BIT_KERNEL
-
config MACH_TXX9
bool
select DMA_NONCOHERENT
@@ -28,33 +19,6 @@ config TOSHIBA_JMR3927
depends on MACH_TX39XX
select SOC_TX3927
-config TOSHIBA_RBTX4927
- bool "Toshiba RBTX49[23]7 board"
- depends on MACH_TX49XX
- select SOC_TX4927
- # TX4937 is subset of TX4938
- select SOC_TX4938
- help
- This Toshiba board is based on the TX4927 processor. Say Y here to
- support this machine type
-
-config TOSHIBA_RBTX4938
- bool "Toshiba RBTX4938 board"
- depends on MACH_TX49XX
- select SOC_TX4938
- help
- This Toshiba board is based on the TX4938 processor. Say Y here to
- support this machine type
-
-config TOSHIBA_RBTX4939
- bool "Toshiba RBTX4939 board"
- depends on MACH_TX49XX
- select SOC_TX4939
- select TXX9_7SEGLED
- help
- This Toshiba board is based on the TX4939 processor. Say Y here to
- support this machine type
-
config SOC_TX3927
bool
select CEVT_TXX9
@@ -63,37 +27,6 @@ config SOC_TX3927
select IRQ_TXX9
select GPIO_TXX9
-config SOC_TX4927
- bool
- select CEVT_TXX9
- imply HAS_TXX9_SERIAL
- select HAVE_PCI
- select IRQ_TXX9
- select PCI_TX4927
- select GPIO_TXX9
- imply HAS_TXX9_ACLC
-
-config SOC_TX4938
- bool
- select CEVT_TXX9
- imply HAS_TXX9_SERIAL
- select HAVE_PCI
- select IRQ_TXX9
- select PCI_TX4927
- select GPIO_TXX9
- imply HAS_TXX9_ACLC
-
-config SOC_TX4939
- bool
- select CEVT_TXX9
- imply HAS_TXX9_SERIAL
- select HAVE_PCI
- select PCI_TX4927
- imply HAS_TXX9_ACLC
-
-config TXX9_7SEGLED
- bool
-
config TOSHIBA_FPCIB0
bool "FPCIB0 Backplane Support"
depends on PCI && MACH_TXX9
@@ -104,25 +37,3 @@ config PICMG_PCI_BACKPLANE_DEFAULT
depends on PCI && MACH_TXX9
default y if !TOSHIBA_FPCIB0
-if TOSHIBA_RBTX4938
-
-comment "Multiplex Pin Select"
-choice
- prompt "PIO[58:61]"
- default TOSHIBA_RBTX4938_MPLEX_PIO58_61
-
-config TOSHIBA_RBTX4938_MPLEX_PIO58_61
- bool "PIO"
-config TOSHIBA_RBTX4938_MPLEX_NAND
- bool "NAND"
-config TOSHIBA_RBTX4938_MPLEX_ATA
- bool "ATA"
-config TOSHIBA_RBTX4938_MPLEX_KEEP
- bool "Keep firmware settings"
-
-endchoice
-
-endif
-
-config PCI_TX4927
- bool
diff --git a/arch/mips/txx9/Makefile b/arch/mips/txx9/Makefile
index 195295937282..79b906a70c17 100644
--- a/arch/mips/txx9/Makefile
+++ b/arch/mips/txx9/Makefile
@@ -3,16 +3,8 @@
# Common TXx9
#
obj-$(CONFIG_MACH_TX39XX) += generic/
-obj-$(CONFIG_MACH_TX49XX) += generic/
#
# Toshiba JMR-TX3927 board
#
obj-$(CONFIG_TOSHIBA_JMR3927) += jmr3927/
-
-#
-# Toshiba RBTX49XX boards
-#
-obj-$(CONFIG_TOSHIBA_RBTX4927) += rbtx4927/
-obj-$(CONFIG_TOSHIBA_RBTX4938) += rbtx4938/
-obj-$(CONFIG_TOSHIBA_RBTX4939) += rbtx4939/
diff --git a/arch/mips/txx9/Platform b/arch/mips/txx9/Platform
index 7f4429ba22eb..d5f980ea8ffc 100644
--- a/arch/mips/txx9/Platform
+++ b/arch/mips/txx9/Platform
@@ -1,7 +1,4 @@
cflags-$(CONFIG_MACH_TX39XX) += \
-I$(srctree)/arch/mips/include/asm/mach-tx39xx
-cflags-$(CONFIG_MACH_TX49XX) += \
- -I$(srctree)/arch/mips/include/asm/mach-tx49xx
load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
-load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
diff --git a/arch/mips/txx9/generic/7segled.c b/arch/mips/txx9/generic/7segled.c
deleted file mode 100644
index 2203c2548cb4..000000000000
--- a/arch/mips/txx9/generic/7segled.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * 7 Segment LED routines
- * Based on RBTX49xx patch from CELF patch archive.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * (C) Copyright TOSHIBA CORPORATION 2005-2007
- * All Rights Reserved.
- */
-#include <linux/device.h>
-#include <linux/slab.h>
-#include <linux/map_to_7segment.h>
-#include <asm/txx9/generic.h>
-
-static unsigned int tx_7segled_num;
-static void (*tx_7segled_putc)(unsigned int pos, unsigned char val);
-
-void __init txx9_7segled_init(unsigned int num,
- void (*putc)(unsigned int pos, unsigned char val))
-{
- tx_7segled_num = num;
- tx_7segled_putc = putc;
-}
-
-static SEG7_CONVERSION_MAP(txx9_seg7map, MAP_ASCII7SEG_ALPHANUM_LC);
-
-int txx9_7segled_putc(unsigned int pos, char c)
-{
- if (pos >= tx_7segled_num)
- return -EINVAL;
- c = map_to_seg7(&txx9_seg7map, c);
- if (c < 0)
- return c;
- tx_7segled_putc(pos, c);
- return 0;
-}
-
-static ssize_t ascii_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t size)
-{
- unsigned int ch = dev->id;
- txx9_7segled_putc(ch, buf[0]);
- return size;
-}
-
-static ssize_t raw_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t size)
-{
- unsigned int ch = dev->id;
- tx_7segled_putc(ch, buf[0]);
- return size;
-}
-
-static DEVICE_ATTR_WO(ascii);
-static DEVICE_ATTR_WO(raw);
-
-static ssize_t map_seg7_show(struct device *dev,
- struct device_attribute *attr,
- char *buf)
-{
- memcpy(buf, &txx9_seg7map, sizeof(txx9_seg7map));
- return sizeof(txx9_seg7map);
-}
-
-static ssize_t map_seg7_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t size)
-{
- if (size != sizeof(txx9_seg7map))
- return -EINVAL;
- memcpy(&txx9_seg7map, buf, size);
- return size;
-}
-
-static DEVICE_ATTR(map_seg7, 0600, map_seg7_show, map_seg7_store);
-
-static struct bus_type tx_7segled_subsys = {
- .name = "7segled",
- .dev_name = "7segled",
-};
-
-static void tx_7segled_release(struct device *dev)
-{
- kfree(dev);
-}
-
-static int __init tx_7segled_init_sysfs(void)
-{
- int error, i;
- if (!tx_7segled_num)
- return -ENODEV;
- error = subsys_system_register(&tx_7segled_subsys, NULL);
- if (error)
- return error;
- error = device_create_file(tx_7segled_subsys.dev_root, &dev_attr_map_seg7);
- if (error)
- return error;
- for (i = 0; i < tx_7segled_num; i++) {
- struct device *dev;
- dev = kzalloc(sizeof(*dev), GFP_KERNEL);
- if (!dev) {
- error = -ENODEV;
- break;
- }
- dev->id = i;
- dev->bus = &tx_7segled_subsys;
- dev->release = &tx_7segled_release;
- error = device_register(dev);
- if (error) {
- put_device(dev);
- return error;
- }
- device_create_file(dev, &dev_attr_ascii);
- device_create_file(dev, &dev_attr_raw);
- }
- return error;
-}
-
-device_initcall(tx_7segled_init_sysfs);
diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile
index 6d00580fc81d..15000b8bd9e7 100644
--- a/arch/mips/txx9/generic/Makefile
+++ b/arch/mips/txx9/generic/Makefile
@@ -6,9 +6,5 @@
obj-y += setup.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_SOC_TX3927) += setup_tx3927.o irq_tx3927.o
-obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o setup_tx4927.o irq_tx4927.o
-obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o
-obj-$(CONFIG_SOC_TX4939) += setup_tx4939.o irq_tx4939.o
obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
obj-$(CONFIG_SPI) += spi_eeprom.o
-obj-$(CONFIG_TXX9_7SEGLED) += 7segled.o
diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c
deleted file mode 100644
index ed8e702d448e..000000000000
--- a/arch/mips/txx9/generic/irq_tx4927.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Common tx4927 irq handler
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <asm/irq_cpu.h>
-#include <asm/txx9/tx4927.h>
-
-void __init tx4927_irq_init(void)
-{
- int i;
-
- mips_cpu_irq_init();
- txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL);
- irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
- handle_simple_irq);
- /* raise priority for errors, timers, SIO */
- txx9_irq_set_pri(TX4927_IR_ECCERR, 7);
- txx9_irq_set_pri(TX4927_IR_WTOERR, 7);
- txx9_irq_set_pri(TX4927_IR_PCIERR, 7);
- txx9_irq_set_pri(TX4927_IR_PCIPME, 7);
- for (i = 0; i < TX4927_NUM_IR_TMR; i++)
- txx9_irq_set_pri(TX4927_IR_TMR(i), 6);
- for (i = 0; i < TX4927_NUM_IR_SIO; i++)
- txx9_irq_set_pri(TX4927_IR_SIO(i), 5);
-}
diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c
deleted file mode 100644
index aace85653329..000000000000
--- a/arch/mips/txx9/generic/irq_tx4938.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * linux/arch/mips/tx4938/common/irq.c
- *
- * Common tx4938 irq handler
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <asm/irq_cpu.h>
-#include <asm/txx9/tx4938.h>
-
-void __init tx4938_irq_init(void)
-{
- int i;
-
- mips_cpu_irq_init();
- txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL);
- irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
- handle_simple_irq);
- /* raise priority for errors, timers, SIO */
- txx9_irq_set_pri(TX4938_IR_ECCERR, 7);
- txx9_irq_set_pri(TX4938_IR_WTOERR, 7);
- txx9_irq_set_pri(TX4938_IR_PCIERR, 7);
- txx9_irq_set_pri(TX4938_IR_PCIPME, 7);
- for (i = 0; i < TX4938_NUM_IR_TMR; i++)
- txx9_irq_set_pri(TX4938_IR_TMR(i), 6);
- for (i = 0; i < TX4938_NUM_IR_SIO; i++)
- txx9_irq_set_pri(TX4938_IR_SIO(i), 5);
-}
diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c
deleted file mode 100644
index 0d7267e81a8c..000000000000
--- a/arch/mips/txx9/generic/irq_tx4939.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * TX4939 irq routines
- * Based on linux/arch/mips/kernel/irq_txx9.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * Copyright 2001, 2003-2005 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- * source@mvista.com
- * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-/*
- * TX4939 defines 64 IRQs.
- * Similer to irq_txx9.c but different register layouts.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <asm/irq_cpu.h>
-#include <asm/txx9irq.h>
-#include <asm/txx9/tx4939.h>
-
-/* IRCER : Int. Control Enable */
-#define TXx9_IRCER_ICE 0x00000001
-
-/* IRCR : Int. Control */
-#define TXx9_IRCR_LOW 0x00000000
-#define TXx9_IRCR_HIGH 0x00000001
-#define TXx9_IRCR_DOWN 0x00000002
-#define TXx9_IRCR_UP 0x00000003
-#define TXx9_IRCR_EDGE(cr) ((cr) & 0x00000002)
-
-/* IRSCR : Int. Status Control */
-#define TXx9_IRSCR_EIClrE 0x00000100
-#define TXx9_IRSCR_EIClr_MASK 0x0000000f
-
-/* IRCSR : Int. Current Status */
-#define TXx9_IRCSR_IF 0x00010000
-
-#define irc_dlevel 0
-#define irc_elevel 1
-
-static struct {
- unsigned char level;
- unsigned char mode;
-} tx4939irq[TX4939_NUM_IR] __read_mostly;
-
-static void tx4939_irq_unmask(struct irq_data *d)
-{
- unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
- u32 __iomem *lvlp;
- int ofs;
- if (irq_nr < 32) {
- irq_nr--;
- lvlp = &tx4939_ircptr->lvl[(irq_nr % 16) / 2].r;
- } else {
- irq_nr -= 32;
- lvlp = &tx4939_ircptr->lvl[8 + (irq_nr % 16) / 2].r;
- }
- ofs = (irq_nr & 16) + (irq_nr & 1) * 8;
- __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs))
- | (tx4939irq[irq_nr].level << ofs),
- lvlp);
-}
-
-static inline void tx4939_irq_mask(struct irq_data *d)
-{
- unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
- u32 __iomem *lvlp;
- int ofs;
- if (irq_nr < 32) {
- irq_nr--;
- lvlp = &tx4939_ircptr->lvl[(irq_nr % 16) / 2].r;
- } else {
- irq_nr -= 32;
- lvlp = &tx4939_ircptr->lvl[8 + (irq_nr % 16) / 2].r;
- }
- ofs = (irq_nr & 16) + (irq_nr & 1) * 8;
- __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs))
- | (irc_dlevel << ofs),
- lvlp);
- mmiowb();
-}
-
-static void tx4939_irq_mask_ack(struct irq_data *d)
-{
- unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
-
- tx4939_irq_mask(d);
- if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) {
- irq_nr--;
- /* clear edge detection */
- __raw_writel((TXx9_IRSCR_EIClrE | (irq_nr & 0xf))
- << (irq_nr & 0x10),
- &tx4939_ircptr->edc.r);
- }
-}
-
-static int tx4939_irq_set_type(struct irq_data *d, unsigned int flow_type)
-{
- unsigned int irq_nr = d->irq - TXX9_IRQ_BASE;
- u32 cr;
- u32 __iomem *crp;
- int ofs;
- int mode;
-
- if (flow_type & IRQF_TRIGGER_PROBE)
- return 0;
- switch (flow_type & IRQF_TRIGGER_MASK) {
- case IRQF_TRIGGER_RISING:
- mode = TXx9_IRCR_UP;
- break;
- case IRQF_TRIGGER_FALLING:
- mode = TXx9_IRCR_DOWN;
- break;
- case IRQF_TRIGGER_HIGH:
- mode = TXx9_IRCR_HIGH;
- break;
- case IRQF_TRIGGER_LOW:
- mode = TXx9_IRCR_LOW;
- break;
- default:
- return -EINVAL;
- }
- if (irq_nr < 32) {
- irq_nr--;
- crp = &tx4939_ircptr->dm[(irq_nr & 8) >> 3].r;
- } else {
- irq_nr -= 32;
- crp = &tx4939_ircptr->dm2[((irq_nr & 8) >> 3)].r;
- }
- ofs = (((irq_nr & 16) >> 1) | (irq_nr & (8 - 1))) * 2;
- cr = __raw_readl(crp);
- cr &= ~(0x3 << ofs);
- cr |= (mode & 0x3) << ofs;
- __raw_writel(cr, crp);
- tx4939irq[irq_nr].mode = mode;
- return 0;
-}
-
-static struct irq_chip tx4939_irq_chip = {
- .name = "TX4939",
- .irq_ack = tx4939_irq_mask_ack,
- .irq_mask = tx4939_irq_mask,
- .irq_mask_ack = tx4939_irq_mask_ack,
- .irq_unmask = tx4939_irq_unmask,
- .irq_set_type = tx4939_irq_set_type,
-};
-
-static int tx4939_irq_set_pri(int irc_irq, int new_pri)
-{
- int old_pri;
-
- if ((unsigned int)irc_irq >= TX4939_NUM_IR)
- return 0;
- old_pri = tx4939irq[irc_irq].level;
- tx4939irq[irc_irq].level = new_pri;
- return old_pri;
-}
-
-void __init tx4939_irq_init(void)
-{
- int i;
-
- mips_cpu_irq_init();
- /* disable interrupt control */
- __raw_writel(0, &tx4939_ircptr->den.r);
- __raw_writel(0, &tx4939_ircptr->maskint.r);
- __raw_writel(0, &tx4939_ircptr->maskext.r);
- /* irq_base + 0 is not used */
- for (i = 1; i < TX4939_NUM_IR; i++) {
- tx4939irq[i].level = 4; /* middle level */
- tx4939irq[i].mode = TXx9_IRCR_LOW;
- irq_set_chip_and_handler(TXX9_IRQ_BASE + i, &tx4939_irq_chip,
- handle_level_irq);
- }
-
- /* mask all IRC interrupts */
- __raw_writel(0, &tx4939_ircptr->msk.r);
- for (i = 0; i < 16; i++)
- __raw_writel(0, &tx4939_ircptr->lvl[i].r);
- /* setup IRC interrupt mode (Low Active) */
- for (i = 0; i < 2; i++)
- __raw_writel(0, &tx4939_ircptr->dm[i].r);
- for (i = 0; i < 2; i++)
- __raw_writel(0, &tx4939_ircptr->dm2[i].r);
- /* enable interrupt control */
- __raw_writel(TXx9_IRCER_ICE, &tx4939_ircptr->den.r);
- __raw_writel(irc_elevel, &tx4939_ircptr->msk.r);
-
- irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4939_IRC_INT,
- handle_simple_irq);
-
- /* raise priority for errors, timers, sio */
- tx4939_irq_set_pri(TX4939_IR_WTOERR, 7);
- tx4939_irq_set_pri(TX4939_IR_PCIERR, 7);
- tx4939_irq_set_pri(TX4939_IR_PCIPME, 7);
- for (i = 0; i < TX4939_NUM_IR_TMR; i++)
- tx4939_irq_set_pri(TX4939_IR_TMR(i), 6);
- for (i = 0; i < TX4939_NUM_IR_SIO; i++)
- tx4939_irq_set_pri(TX4939_IR_SIO(i), 5);
-}
-
-int tx4939_irq(void)
-{
- u32 csr = __raw_readl(&tx4939_ircptr->cs.r);
-
- if (likely(!(csr & TXx9_IRCSR_IF)))
- return TXX9_IRQ_BASE + (csr & (TX4939_NUM_IR - 1));
- return -1;
-}
diff --git a/arch/mips/txx9/generic/mem_tx4927.c b/arch/mips/txx9/generic/mem_tx4927.c
deleted file mode 100644
index deea2ceae8a7..000000000000
--- a/arch/mips/txx9/generic/mem_tx4927.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * common tx4927 memory interface
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/io.h>
-#include <asm/txx9/tx4927.h>
-
-static unsigned int __init tx4927_process_sdccr(u64 __iomem *addr)
-{
- u64 val;
- unsigned int sdccr_ce;
- unsigned int sdccr_bs;
- unsigned int sdccr_rs;
- unsigned int sdccr_cs;
- unsigned int sdccr_mw;
- unsigned int bs = 0;
- unsigned int rs = 0;
- unsigned int cs = 0;
- unsigned int mw = 0;
-
- val = __raw_readq(addr);
-
- /* MVMCP -- need #defs for these bits masks */
- sdccr_ce = ((val & (1 << 10)) >> 10);
- sdccr_bs = ((val & (1 << 8)) >> 8);
- sdccr_rs = ((val & (3 << 5)) >> 5);
- sdccr_cs = ((val & (7 << 2)) >> 2);
- sdccr_mw = ((val & (1 << 0)) >> 0);
-
- if (sdccr_ce) {
- bs = 2 << sdccr_bs;
- rs = 2048 << sdccr_rs;
- cs = 256 << sdccr_cs;
- mw = 8 >> sdccr_mw;
- }
-
- return rs * cs * mw * bs;
-}
-
-unsigned int __init tx4927_get_mem_size(void)
-{
- unsigned int total = 0;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(tx4927_sdramcptr->cr); i++)
- total += tx4927_process_sdccr(&tx4927_sdramcptr->cr[i]);
- return total;
-}
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 6d0fd0e055b4..0ce49978a47e 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -20,7 +20,6 @@
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
-#include <linux/platform_data/txx9/ndfmc.h>
#include <linux/serial_core.h>
#include <linux/mtd/physmap.h>
#include <linux/leds.h>
@@ -38,9 +37,6 @@
#include <asm/txx9/pci.h>
#include <asm/txx9tmr.h>
#include <asm/txx9/dmac.h>
-#ifdef CONFIG_CPU_TX49XX
-#include <asm/txx9/tx4938.h>
-#endif
/* EBUSC settings of TX4927, etc. */
struct resource txx9_ce_res[8];
@@ -146,55 +142,7 @@ static void __init prom_init_cmdline(void)
static int txx9_ic_disable __initdata;
static int txx9_dc_disable __initdata;
-#if defined(CONFIG_CPU_TX49XX)
-/* flush all cache on very early stage (before 4k_cache_init) */
-static void __init early_flush_dcache(void)
-{
- unsigned int conf = read_c0_config();
- unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
- unsigned int linesz = 32;
- unsigned long addr, end;
-
- end = INDEX_BASE + dc_size / 4;
- /* 4way, waybit=0 */
- for (addr = INDEX_BASE; addr < end; addr += linesz) {
- cache_op(Index_Writeback_Inv_D, addr | 0);
- cache_op(Index_Writeback_Inv_D, addr | 1);
- cache_op(Index_Writeback_Inv_D, addr | 2);
- cache_op(Index_Writeback_Inv_D, addr | 3);
- }
-}
-
-static void __init txx9_cache_fixup(void)
-{
- unsigned int conf;
-
- conf = read_c0_config();
- /* flush and disable */
- if (txx9_ic_disable) {
- conf |= TX49_CONF_IC;
- write_c0_config(conf);
- }
- if (txx9_dc_disable) {
- early_flush_dcache();
- conf |= TX49_CONF_DC;
- write_c0_config(conf);
- }
-
- /* enable cache */
- conf = read_c0_config();
- if (!txx9_ic_disable)
- conf &= ~TX49_CONF_IC;
- if (!txx9_dc_disable)
- conf &= ~TX49_CONF_DC;
- write_c0_config(conf);
-
- if (conf & TX49_CONF_IC)
- pr_info("TX49XX I-Cache disabled.\n");
- if (conf & TX49_CONF_DC)
- pr_info("TX49XX D-Cache disabled.\n");
-}
-#elif defined(CONFIG_CPU_TX39XX)
+#if defined(CONFIG_CPU_TX39XX)
/* flush all cache on very early stage (before tx39_cache_init) */
static void __init early_flush_dcache(void)
{
@@ -305,28 +253,6 @@ static void __init select_board(void)
#ifdef CONFIG_TOSHIBA_JMR3927
txx9_board_vec = &jmr3927_vec;
#endif
-#ifdef CONFIG_CPU_TX49XX
- switch (TX4938_REV_PCODE()) {
-#ifdef CONFIG_TOSHIBA_RBTX4927
- case 0x4927:
- txx9_board_vec = &rbtx4927_vec;
- break;
- case 0x4937:
- txx9_board_vec = &rbtx4937_vec;
- break;
-#endif
-#ifdef CONFIG_TOSHIBA_RBTX4938
- case 0x4938:
- txx9_board_vec = &rbtx4938_vec;
- break;
-#endif
-#ifdef CONFIG_TOSHIBA_RBTX4939
- case 0x4939:
- txx9_board_vec = &rbtx4939_vec;
- break;
-#endif
- }
-#endif
}
void __init prom_init(void)
@@ -517,9 +443,6 @@ void __init arch_init_irq(void)
void __init plat_time_init(void)
{
-#ifdef CONFIG_CPU_TX49XX
- mips_hpt_frequency = txx9_cpu_clock / 2;
-#endif
txx9_board_vec->time_init();
}
@@ -539,15 +462,6 @@ static void txx9_clk_init(void)
if (error)
goto fail;
-#ifdef CONFIG_CPU_TX49XX
- if (TX4938_REV_PCODE() == 0x4938) {
- hw = clk_hw_register_fixed_factor(NULL, "spi", "gbus", 0, 1, 4);
- error = clk_hw_register_clkdev(hw, "spi-baseclk", NULL);
- if (error)
- goto fail;
- }
-#endif
-
return;
fail:
@@ -648,25 +562,6 @@ void __init txx9_physmap_flash_init(int no, unsigned long addr,
#endif
}
-void __init txx9_ndfmc_init(unsigned long baseaddr,
- const struct txx9ndfmc_platform_data *pdata)
-{
-#if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC)
- struct resource res = {
- .start = baseaddr,
- .end = baseaddr + 0x1000 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
-
- if (!pdev ||
- platform_device_add_resources(pdev, &res, 1) ||
- platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
- platform_device_add(pdev))
- platform_device_put(pdev);
-#endif
-}
-
#if IS_ENABLED(CONFIG_LEDS_GPIO)
static DEFINE_SPINLOCK(txx9_iocled_lock);
@@ -794,20 +689,11 @@ void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
.start = baseaddr,
.end = baseaddr + 0x800 - 1,
.flags = IORESOURCE_MEM,
-#ifndef CONFIG_MACH_TX49XX
}, {
.start = irq,
.flags = IORESOURCE_IRQ,
-#endif
- }
- };
-#ifdef CONFIG_MACH_TX49XX
- struct resource chan_res[] = {
- {
- .flags = IORESOURCE_IRQ,
}
};
-#endif
struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
struct txx9dmac_chan_platform_data cpdata;
int i;
@@ -822,16 +708,9 @@ void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
memset(&cpdata, 0, sizeof(cpdata));
cpdata.dmac_dev = pdev;
for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
-#ifdef CONFIG_MACH_TX49XX
- chan_res[0].start = irq + i;
-#endif
pdev = platform_device_alloc("txx9dmac-chan",
id * TXX9_DMA_MAX_NR_CHANNELS + i);
if (!pdev ||
-#ifdef CONFIG_MACH_TX49XX
- platform_device_add_resources(pdev, chan_res,
- ARRAY_SIZE(chan_res)) ||
-#endif
platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
platform_device_add(pdev))
platform_device_put(pdev);
@@ -839,41 +718,6 @@ void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
#endif
}
-void __init txx9_aclc_init(unsigned long baseaddr, int irq,
- unsigned int dmac_id,
- unsigned int dma_chan_out,
- unsigned int dma_chan_in)
-{
-#if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC)
- unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
- struct resource res[] = {
- {
- .start = baseaddr,
- .end = baseaddr + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = irq,
- .flags = IORESOURCE_IRQ,
- }, {
- .name = "txx9dmac-chan",
- .start = dma_base + dma_chan_out,
- .flags = IORESOURCE_DMA,
- }, {
- .name = "txx9dmac-chan",
- .start = dma_base + dma_chan_in,
- .flags = IORESOURCE_DMA,
- }
- };
- struct platform_device *pdev =
- platform_device_alloc("txx9aclc-ac97", -1);
-
- if (!pdev ||
- platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
- platform_device_add(pdev))
- platform_device_put(pdev);
-#endif
-}
-
static struct bus_type txx9_sramc_subsys = {
.name = "txx9_sram",
.dev_name = "txx9_sram",
diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c
deleted file mode 100644
index 46e9c4101386..000000000000
--- a/arch/mips/txx9/generic/setup_tx4927.c
+++ /dev/null
@@ -1,337 +0,0 @@
-/*
- * TX4927 setup routines
- * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * 2003-2005 (c) MontaVista Software, Inc.
- * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/param.h>
-#include <linux/ptrace.h>
-#include <linux/mtd/physmap.h>
-#include <asm/reboot.h>
-#include <asm/traps.h>
-#include <asm/txx9irq.h>
-#include <asm/txx9tmr.h>
-#include <asm/txx9pio.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/dmac.h>
-#include <asm/txx9/tx4927.h>
-
-static void __init tx4927_wdr_init(void)
-{
- /* report watchdog reset status */
- if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST)
- pr_warn("Watchdog reset detected at 0x%lx\n",
- read_c0_errorepc());
- /* clear WatchDogReset (W1C) */
- tx4927_ccfg_set(TX4927_CCFG_WDRST);
- /* do reset on watchdog */
- tx4927_ccfg_set(TX4927_CCFG_WR);
-}
-
-void __init tx4927_wdt_init(void)
-{
- txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
-}
-
-static void tx4927_machine_restart(char *command)
-{
- local_irq_disable();
- pr_emerg("Rebooting (with %s watchdog reset)...\n",
- (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) ?
- "external" : "internal");
- /* clear watchdog status */
- tx4927_ccfg_set(TX4927_CCFG_WDRST); /* W1C */
- txx9_wdt_now(TX4927_TMR_REG(2) & 0xfffffffffULL);
- while (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST))
- ;
- mdelay(10);
- if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) {
- pr_emerg("Rebooting (with internal watchdog reset)...\n");
- /* External WDRST failed. Do internal watchdog reset */
- tx4927_ccfg_clear(TX4927_CCFG_WDREXEN);
- }
- /* fallback */
- (*_machine_halt)();
-}
-
-void show_registers(struct pt_regs *regs);
-static int tx4927_be_handler(struct pt_regs *regs, int is_fixup)
-{
- int data = regs->cp0_cause & 4;
- console_verbose();
- pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc);
- pr_err("ccfg:%llx, toea:%llx\n",
- (unsigned long long)____raw_readq(&tx4927_ccfgptr->ccfg),
- (unsigned long long)____raw_readq(&tx4927_ccfgptr->toea));
-#ifdef CONFIG_PCI
- tx4927_report_pcic_status();
-#endif
- show_registers(regs);
- panic("BusError!");
-}
-static void __init tx4927_be_init(void)
-{
- board_be_handler = tx4927_be_handler;
-}
-
-static struct resource tx4927_sdram_resource[4];
-
-void __init tx4927_setup(void)
-{
- int i;
- __u32 divmode;
- unsigned int cpuclk = 0;
- u64 ccfg;
-
- txx9_reg_res_init(TX4927_REV_PCODE(), TX4927_REG_BASE,
- TX4927_REG_SIZE);
- set_c0_config(TX49_CONF_CWFON);
-
- /* SDRAMC,EBUSC are configured by PROM */
- for (i = 0; i < 8; i++) {
- if (!(TX4927_EBUSC_CR(i) & 0x8))
- continue; /* disabled */
- txx9_ce_res[i].start = (unsigned long)TX4927_EBUSC_BA(i);
- txx9_ce_res[i].end =
- txx9_ce_res[i].start + TX4927_EBUSC_SIZE(i) - 1;
- request_resource(&iomem_resource, &txx9_ce_res[i]);
- }
-
- /* clocks */
- ccfg = ____raw_readq(&tx4927_ccfgptr->ccfg);
- if (txx9_master_clock) {
- /* calculate gbus_clock and cpu_clock from master_clock */
- divmode = (__u32)ccfg & TX4927_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4927_CCFG_DIVMODE_8:
- case TX4927_CCFG_DIVMODE_10:
- case TX4927_CCFG_DIVMODE_12:
- case TX4927_CCFG_DIVMODE_16:
- txx9_gbus_clock = txx9_master_clock * 4; break;
- default:
- txx9_gbus_clock = txx9_master_clock;
- }
- switch (divmode) {
- case TX4927_CCFG_DIVMODE_2:
- case TX4927_CCFG_DIVMODE_8:
- cpuclk = txx9_gbus_clock * 2; break;
- case TX4927_CCFG_DIVMODE_2_5:
- case TX4927_CCFG_DIVMODE_10:
- cpuclk = txx9_gbus_clock * 5 / 2; break;
- case TX4927_CCFG_DIVMODE_3:
- case TX4927_CCFG_DIVMODE_12:
- cpuclk = txx9_gbus_clock * 3; break;
- case TX4927_CCFG_DIVMODE_4:
- case TX4927_CCFG_DIVMODE_16:
- cpuclk = txx9_gbus_clock * 4; break;
- }
- txx9_cpu_clock = cpuclk;
- } else {
- if (txx9_cpu_clock == 0)
- txx9_cpu_clock = 200000000; /* 200MHz */
- /* calculate gbus_clock and master_clock from cpu_clock */
- cpuclk = txx9_cpu_clock;
- divmode = (__u32)ccfg & TX4927_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4927_CCFG_DIVMODE_2:
- case TX4927_CCFG_DIVMODE_8:
- txx9_gbus_clock = cpuclk / 2; break;
- case TX4927_CCFG_DIVMODE_2_5:
- case TX4927_CCFG_DIVMODE_10:
- txx9_gbus_clock = cpuclk * 2 / 5; break;
- case TX4927_CCFG_DIVMODE_3:
- case TX4927_CCFG_DIVMODE_12:
- txx9_gbus_clock = cpuclk / 3; break;
- case TX4927_CCFG_DIVMODE_4:
- case TX4927_CCFG_DIVMODE_16:
- txx9_gbus_clock = cpuclk / 4; break;
- }
- switch (divmode) {
- case TX4927_CCFG_DIVMODE_8:
- case TX4927_CCFG_DIVMODE_10:
- case TX4927_CCFG_DIVMODE_12:
- case TX4927_CCFG_DIVMODE_16:
- txx9_master_clock = txx9_gbus_clock / 4; break;
- default:
- txx9_master_clock = txx9_gbus_clock;
- }
- }
- /* change default value to udelay/mdelay take reasonable time */
- loops_per_jiffy = txx9_cpu_clock / HZ / 2;
-
- /* CCFG */
- tx4927_wdr_init();
- /* clear BusErrorOnWrite flag (W1C) */
- tx4927_ccfg_set(TX4927_CCFG_BEOW);
- /* enable Timeout BusError */
- if (txx9_ccfg_toeon)
- tx4927_ccfg_set(TX4927_CCFG_TOE);
-
- /* DMA selection */
- txx9_clear64(&tx4927_ccfgptr->pcfg, TX4927_PCFG_DMASEL_ALL);
-
- /* Use external clock for external arbiter */
- if (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB))
- txx9_clear64(&tx4927_ccfgptr->pcfg, TX4927_PCFG_PCICLKEN_ALL);
-
- pr_info("%s -- %dMHz(M%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n",
- txx9_pcode_str, (cpuclk + 500000) / 1000000,
- (txx9_master_clock + 500000) / 1000000,
- (__u32)____raw_readq(&tx4927_ccfgptr->crir),
- ____raw_readq(&tx4927_ccfgptr->ccfg),
- ____raw_readq(&tx4927_ccfgptr->pcfg));
-
- pr_info("%s SDRAMC --", txx9_pcode_str);
- for (i = 0; i < 4; i++) {
- __u64 cr = TX4927_SDRAMC_CR(i);
- unsigned long base, size;
- if (!((__u32)cr & 0x00000400))
- continue; /* disabled */
- base = (unsigned long)(cr >> 49) << 21;
- size = (((unsigned long)(cr >> 33) & 0x7fff) + 1) << 21;
- pr_cont(" CR%d:%016llx", i, cr);
- tx4927_sdram_resource[i].name = "SDRAM";
- tx4927_sdram_resource[i].start = base;
- tx4927_sdram_resource[i].end = base + size - 1;
- tx4927_sdram_resource[i].flags = IORESOURCE_MEM;
- request_resource(&iomem_resource, &tx4927_sdram_resource[i]);
- }
- pr_cont(" TR:%09llx\n", ____raw_readq(&tx4927_sdramcptr->tr));
-
- /* TMR */
- /* disable all timers */
- for (i = 0; i < TX4927_NR_TMR; i++)
- txx9_tmr_init(TX4927_TMR_REG(i) & 0xfffffffffULL);
-
- /* PIO */
- __raw_writel(0, &tx4927_pioptr->maskcpu);
- __raw_writel(0, &tx4927_pioptr->maskext);
-
- _machine_restart = tx4927_machine_restart;
- board_be_init = tx4927_be_init;
-}
-
-void __init tx4927_time_init(unsigned int tmrnr)
-{
- if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_TINTDIS)
- txx9_clockevent_init(TX4927_TMR_REG(tmrnr) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4927_IR_TMR(tmrnr),
- TXX9_IMCLK);
-}
-
-void __init tx4927_sio_init(unsigned int sclk, unsigned int cts_mask)
-{
- int i;
-
- for (i = 0; i < 2; i++)
- txx9_sio_init(TX4927_SIO_REG(i) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4927_IR_SIO(i),
- i, sclk, (1 << i) & cts_mask);
-}
-
-void __init tx4927_mtd_init(int ch)
-{
- struct physmap_flash_data pdata = {
- .width = TX4927_EBUSC_WIDTH(ch) / 8,
- };
- unsigned long start = txx9_ce_res[ch].start;
- unsigned long size = txx9_ce_res[ch].end - start + 1;
-
- if (!(TX4927_EBUSC_CR(ch) & 0x8))
- return; /* disabled */
- txx9_physmap_flash_init(ch, start, size, &pdata);
-}
-
-void __init tx4927_dmac_init(int memcpy_chan)
-{
- struct txx9dmac_platform_data plat_data = {
- .memcpy_chan = memcpy_chan,
- .have_64bit_regs = true,
- };
-
- txx9_dmac_init(0, TX4927_DMA_REG & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4927_IR_DMA(0), &plat_data);
-}
-
-void __init tx4927_aclc_init(unsigned int dma_chan_out,
- unsigned int dma_chan_in)
-{
- u64 pcfg = __raw_readq(&tx4927_ccfgptr->pcfg);
- __u64 dmasel_mask = 0, dmasel = 0;
- unsigned long flags;
-
- if (!(pcfg & TX4927_PCFG_SEL2))
- return;
- /* setup DMASEL (playback:ACLC ch0, capture:ACLC ch1) */
- switch (dma_chan_out) {
- case 0:
- dmasel_mask |= TX4927_PCFG_DMASEL0_MASK;
- dmasel |= TX4927_PCFG_DMASEL0_ACL0;
- break;
- case 2:
- dmasel_mask |= TX4927_PCFG_DMASEL2_MASK;
- dmasel |= TX4927_PCFG_DMASEL2_ACL0;
- break;
- default:
- return;
- }
- switch (dma_chan_in) {
- case 1:
- dmasel_mask |= TX4927_PCFG_DMASEL1_MASK;
- dmasel |= TX4927_PCFG_DMASEL1_ACL1;
- break;
- case 3:
- dmasel_mask |= TX4927_PCFG_DMASEL3_MASK;
- dmasel |= TX4927_PCFG_DMASEL3_ACL1;
- break;
- default:
- return;
- }
- local_irq_save(flags);
- txx9_clear64(&tx4927_ccfgptr->pcfg, dmasel_mask);
- txx9_set64(&tx4927_ccfgptr->pcfg, dmasel);
- local_irq_restore(flags);
- txx9_aclc_init(TX4927_ACLC_REG & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4927_IR_ACLC,
- 0, dma_chan_out, dma_chan_in);
-}
-
-static void __init tx4927_stop_unused_modules(void)
-{
- __u64 pcfg, rst = 0, ckd = 0;
- char buf[128];
-
- buf[0] = '\0';
- local_irq_disable();
- pcfg = ____raw_readq(&tx4927_ccfgptr->pcfg);
- if (!(pcfg & TX4927_PCFG_SEL2)) {
- rst |= TX4927_CLKCTR_ACLRST;
- ckd |= TX4927_CLKCTR_ACLCKD;
- strcat(buf, " ACLC");
- }
- if (rst | ckd) {
- txx9_set64(&tx4927_ccfgptr->clkctr, rst);
- txx9_set64(&tx4927_ccfgptr->clkctr, ckd);
- }
- local_irq_enable();
- if (buf[0])
- pr_info("%s: stop%s\n", txx9_pcode_str, buf);
-}
-
-static int __init tx4927_late_init(void)
-{
- if (txx9_pcode != 0x4927)
- return -ENODEV;
- tx4927_stop_unused_modules();
- return 0;
-}
-late_initcall(tx4927_late_init);
diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c
deleted file mode 100644
index 17395d5d15ca..000000000000
--- a/arch/mips/txx9/generic/setup_tx4938.c
+++ /dev/null
@@ -1,485 +0,0 @@
-/*
- * TX4938/4937 setup routines
- * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * 2003-2005 (c) MontaVista Software, Inc.
- * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/param.h>
-#include <linux/ptrace.h>
-#include <linux/mtd/physmap.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/txx9/ndfmc.h>
-#include <asm/reboot.h>
-#include <asm/traps.h>
-#include <asm/txx9irq.h>
-#include <asm/txx9tmr.h>
-#include <asm/txx9pio.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/dmac.h>
-#include <asm/txx9/tx4938.h>
-
-static void __init tx4938_wdr_init(void)
-{
- /* report watchdog reset status */
- if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST)
- pr_warn("Watchdog reset detected at 0x%lx\n",
- read_c0_errorepc());
- /* clear WatchDogReset (W1C) */
- tx4938_ccfg_set(TX4938_CCFG_WDRST);
- /* do reset on watchdog */
- tx4938_ccfg_set(TX4938_CCFG_WR);
-}
-
-void __init tx4938_wdt_init(void)
-{
- txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
-}
-
-static void tx4938_machine_restart(char *command)
-{
- local_irq_disable();
- pr_emerg("Rebooting (with %s watchdog reset)...\n",
- (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) ?
- "external" : "internal");
- /* clear watchdog status */
- tx4938_ccfg_set(TX4938_CCFG_WDRST); /* W1C */
- txx9_wdt_now(TX4938_TMR_REG(2) & 0xfffffffffULL);
- while (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST))
- ;
- mdelay(10);
- if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) {
- pr_emerg("Rebooting (with internal watchdog reset)...\n");
- /* External WDRST failed. Do internal watchdog reset */
- tx4938_ccfg_clear(TX4938_CCFG_WDREXEN);
- }
- /* fallback */
- (*_machine_halt)();
-}
-
-void show_registers(struct pt_regs *regs);
-static int tx4938_be_handler(struct pt_regs *regs, int is_fixup)
-{
- int data = regs->cp0_cause & 4;
- console_verbose();
- pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc);
- pr_err("ccfg:%llx, toea:%llx\n",
- (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg),
- (unsigned long long)____raw_readq(&tx4938_ccfgptr->toea));
-#ifdef CONFIG_PCI
- tx4927_report_pcic_status();
-#endif
- show_registers(regs);
- panic("BusError!");
-}
-static void __init tx4938_be_init(void)
-{
- board_be_handler = tx4938_be_handler;
-}
-
-static struct resource tx4938_sdram_resource[4];
-static struct resource tx4938_sram_resource;
-
-#define TX4938_SRAM_SIZE 0x800
-
-void __init tx4938_setup(void)
-{
- int i;
- __u32 divmode;
- unsigned int cpuclk = 0;
- u64 ccfg;
-
- txx9_reg_res_init(TX4938_REV_PCODE(), TX4938_REG_BASE,
- TX4938_REG_SIZE);
- set_c0_config(TX49_CONF_CWFON);
-
- /* SDRAMC,EBUSC are configured by PROM */
- for (i = 0; i < 8; i++) {
- if (!(TX4938_EBUSC_CR(i) & 0x8))
- continue; /* disabled */
- txx9_ce_res[i].start = (unsigned long)TX4938_EBUSC_BA(i);
- txx9_ce_res[i].end =
- txx9_ce_res[i].start + TX4938_EBUSC_SIZE(i) - 1;
- request_resource(&iomem_resource, &txx9_ce_res[i]);
- }
-
- /* clocks */
- ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg);
- if (txx9_master_clock) {
- /* calculate gbus_clock and cpu_clock from master_clock */
- divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_8:
- case TX4938_CCFG_DIVMODE_10:
- case TX4938_CCFG_DIVMODE_12:
- case TX4938_CCFG_DIVMODE_16:
- case TX4938_CCFG_DIVMODE_18:
- txx9_gbus_clock = txx9_master_clock * 4; break;
- default:
- txx9_gbus_clock = txx9_master_clock;
- }
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_2:
- case TX4938_CCFG_DIVMODE_8:
- cpuclk = txx9_gbus_clock * 2; break;
- case TX4938_CCFG_DIVMODE_2_5:
- case TX4938_CCFG_DIVMODE_10:
- cpuclk = txx9_gbus_clock * 5 / 2; break;
- case TX4938_CCFG_DIVMODE_3:
- case TX4938_CCFG_DIVMODE_12:
- cpuclk = txx9_gbus_clock * 3; break;
- case TX4938_CCFG_DIVMODE_4:
- case TX4938_CCFG_DIVMODE_16:
- cpuclk = txx9_gbus_clock * 4; break;
- case TX4938_CCFG_DIVMODE_4_5:
- case TX4938_CCFG_DIVMODE_18:
- cpuclk = txx9_gbus_clock * 9 / 2; break;
- }
- txx9_cpu_clock = cpuclk;
- } else {
- if (txx9_cpu_clock == 0)
- txx9_cpu_clock = 300000000; /* 300MHz */
- /* calculate gbus_clock and master_clock from cpu_clock */
- cpuclk = txx9_cpu_clock;
- divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_2:
- case TX4938_CCFG_DIVMODE_8:
- txx9_gbus_clock = cpuclk / 2; break;
- case TX4938_CCFG_DIVMODE_2_5:
- case TX4938_CCFG_DIVMODE_10:
- txx9_gbus_clock = cpuclk * 2 / 5; break;
- case TX4938_CCFG_DIVMODE_3:
- case TX4938_CCFG_DIVMODE_12:
- txx9_gbus_clock = cpuclk / 3; break;
- case TX4938_CCFG_DIVMODE_4:
- case TX4938_CCFG_DIVMODE_16:
- txx9_gbus_clock = cpuclk / 4; break;
- case TX4938_CCFG_DIVMODE_4_5:
- case TX4938_CCFG_DIVMODE_18:
- txx9_gbus_clock = cpuclk * 2 / 9; break;
- }
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_8:
- case TX4938_CCFG_DIVMODE_10:
- case TX4938_CCFG_DIVMODE_12:
- case TX4938_CCFG_DIVMODE_16:
- case TX4938_CCFG_DIVMODE_18:
- txx9_master_clock = txx9_gbus_clock / 4; break;
- default:
- txx9_master_clock = txx9_gbus_clock;
- }
- }
- /* change default value to udelay/mdelay take reasonable time */
- loops_per_jiffy = txx9_cpu_clock / HZ / 2;
-
- /* CCFG */
- tx4938_wdr_init();
- /* clear BusErrorOnWrite flag (W1C) */
- tx4938_ccfg_set(TX4938_CCFG_BEOW);
- /* enable Timeout BusError */
- if (txx9_ccfg_toeon)
- tx4938_ccfg_set(TX4938_CCFG_TOE);
-
- /* DMA selection */
- txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_DMASEL_ALL);
-
- /* Use external clock for external arbiter */
- if (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB))
- txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_PCICLKEN_ALL);
-
- pr_info("%s -- %dMHz(M%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n",
- txx9_pcode_str, (cpuclk + 500000) / 1000000,
- (txx9_master_clock + 500000) / 1000000,
- (__u32)____raw_readq(&tx4938_ccfgptr->crir),
- ____raw_readq(&tx4938_ccfgptr->ccfg),
- ____raw_readq(&tx4938_ccfgptr->pcfg));
-
- pr_info("%s SDRAMC --", txx9_pcode_str);
- for (i = 0; i < 4; i++) {
- __u64 cr = TX4938_SDRAMC_CR(i);
- unsigned long base, size;
- if (!((__u32)cr & 0x00000400))
- continue; /* disabled */
- base = (unsigned long)(cr >> 49) << 21;
- size = (((unsigned long)(cr >> 33) & 0x7fff) + 1) << 21;
- pr_cont(" CR%d:%016llx", i, cr);
- tx4938_sdram_resource[i].name = "SDRAM";
- tx4938_sdram_resource[i].start = base;
- tx4938_sdram_resource[i].end = base + size - 1;
- tx4938_sdram_resource[i].flags = IORESOURCE_MEM;
- request_resource(&iomem_resource, &tx4938_sdram_resource[i]);
- }
- pr_cont(" TR:%09llx\n", ____raw_readq(&tx4938_sdramcptr->tr));
-
- /* SRAM */
- if (txx9_pcode == 0x4938 && ____raw_readq(&tx4938_sramcptr->cr) & 1) {
- unsigned int size = TX4938_SRAM_SIZE;
- tx4938_sram_resource.name = "SRAM";
- tx4938_sram_resource.start =
- (____raw_readq(&tx4938_sramcptr->cr) >> (39-11))
- & ~(size - 1);
- tx4938_sram_resource.end =
- tx4938_sram_resource.start + TX4938_SRAM_SIZE - 1;
- tx4938_sram_resource.flags = IORESOURCE_MEM;
- request_resource(&iomem_resource, &tx4938_sram_resource);
- }
-
- /* TMR */
- /* disable all timers */
- for (i = 0; i < TX4938_NR_TMR; i++)
- txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
-
- /* PIO */
- __raw_writel(0, &tx4938_pioptr->maskcpu);
- __raw_writel(0, &tx4938_pioptr->maskext);
-
- if (txx9_pcode == 0x4938) {
- __u64 pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg);
- /* set PCIC1 reset */
- txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
- if (pcfg & (TX4938_PCFG_ETH0_SEL | TX4938_PCFG_ETH1_SEL)) {
- mdelay(1); /* at least 128 cpu clock */
- /* clear PCIC1 reset */
- txx9_clear64(&tx4938_ccfgptr->clkctr,
- TX4938_CLKCTR_PCIC1RST);
- } else {
- pr_info("%s: stop PCIC1\n", txx9_pcode_str);
- /* stop PCIC1 */
- txx9_set64(&tx4938_ccfgptr->clkctr,
- TX4938_CLKCTR_PCIC1CKD);
- }
- if (!(pcfg & TX4938_PCFG_ETH0_SEL)) {
- pr_info("%s: stop ETH0\n", txx9_pcode_str);
- txx9_set64(&tx4938_ccfgptr->clkctr,
- TX4938_CLKCTR_ETH0RST);
- txx9_set64(&tx4938_ccfgptr->clkctr,
- TX4938_CLKCTR_ETH0CKD);
- }
- if (!(pcfg & TX4938_PCFG_ETH1_SEL)) {
- pr_info("%s: stop ETH1\n", txx9_pcode_str);
- txx9_set64(&tx4938_ccfgptr->clkctr,
- TX4938_CLKCTR_ETH1RST);
- txx9_set64(&tx4938_ccfgptr->clkctr,
- TX4938_CLKCTR_ETH1CKD);
- }
- }
-
- _machine_restart = tx4938_machine_restart;
- board_be_init = tx4938_be_init;
-}
-
-void __init tx4938_time_init(unsigned int tmrnr)
-{
- if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_TINTDIS)
- txx9_clockevent_init(TX4938_TMR_REG(tmrnr) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4938_IR_TMR(tmrnr),
- TXX9_IMCLK);
-}
-
-void __init tx4938_sio_init(unsigned int sclk, unsigned int cts_mask)
-{
- int i;
- unsigned int ch_mask = 0;
-
- if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_ETH0_SEL)
- ch_mask |= 1 << 1; /* disable SIO1 by PCFG setting */
- for (i = 0; i < 2; i++) {
- if ((1 << i) & ch_mask)
- continue;
- txx9_sio_init(TX4938_SIO_REG(i) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4938_IR_SIO(i),
- i, sclk, (1 << i) & cts_mask);
- }
-}
-
-void __init tx4938_spi_init(int busid)
-{
- txx9_spi_init(busid, TX4938_SPI_REG & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4938_IR_SPI);
-}
-
-void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1)
-{
- u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg);
-
- if (addr0 && (pcfg & TX4938_PCFG_ETH0_SEL))
- txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH0, addr0);
- if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL))
- txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1);
-}
-
-void __init tx4938_mtd_init(int ch)
-{
- struct physmap_flash_data pdata = {
- .width = TX4938_EBUSC_WIDTH(ch) / 8,
- };
- unsigned long start = txx9_ce_res[ch].start;
- unsigned long size = txx9_ce_res[ch].end - start + 1;
-
- if (!(TX4938_EBUSC_CR(ch) & 0x8))
- return; /* disabled */
- txx9_physmap_flash_init(ch, start, size, &pdata);
-}
-
-void __init tx4938_ata_init(unsigned int irq, unsigned int shift, int tune)
-{
- struct platform_device *pdev;
- struct resource res[] = {
- {
- /* .start and .end are filled in later */
- .flags = IORESOURCE_MEM,
- }, {
- .start = irq,
- .flags = IORESOURCE_IRQ,
- },
- };
- struct tx4938ide_platform_info pdata = {
- .ioport_shift = shift,
- /*
- * The IDE driver should not change bus timings if other ISA
- * devices existed.
- */
- .gbus_clock = tune ? txx9_gbus_clock : 0,
- };
- u64 ebccr;
- int i;
-
- if ((__raw_readq(&tx4938_ccfgptr->pcfg) &
- (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL))
- != TX4938_PCFG_ATA_SEL)
- return;
- for (i = 0; i < 8; i++) {
- /* check EBCCRn.ISA, EBCCRn.BSZ, EBCCRn.ME */
- ebccr = __raw_readq(&tx4938_ebuscptr->cr[i]);
- if ((ebccr & 0x00f00008) == 0x00e00008)
- break;
- }
- if (i == 8)
- return;
- pdata.ebus_ch = i;
- res[0].start = ((ebccr >> 48) << 20) + 0x10000;
- res[0].end = res[0].start + 0x20000 - 1;
- pdev = platform_device_alloc("tx4938ide", -1);
- if (!pdev ||
- platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
- platform_device_add_data(pdev, &pdata, sizeof(pdata)) ||
- platform_device_add(pdev))
- platform_device_put(pdev);
-}
-
-void __init tx4938_ndfmc_init(unsigned int hold, unsigned int spw)
-{
- struct txx9ndfmc_platform_data plat_data = {
- .shift = 1,
- .gbus_clock = txx9_gbus_clock,
- .hold = hold,
- .spw = spw,
- .ch_mask = 1,
- };
- unsigned long baseaddr = TX4938_NDFMC_REG & 0xfffffffffULL;
-
-#ifdef __BIG_ENDIAN
- baseaddr += 4;
-#endif
- if ((__raw_readq(&tx4938_ccfgptr->pcfg) &
- (TX4938_PCFG_ATA_SEL|TX4938_PCFG_ISA_SEL|TX4938_PCFG_NDF_SEL)) ==
- TX4938_PCFG_NDF_SEL)
- txx9_ndfmc_init(baseaddr, &plat_data);
-}
-
-void __init tx4938_dmac_init(int memcpy_chan0, int memcpy_chan1)
-{
- struct txx9dmac_platform_data plat_data = {
- .have_64bit_regs = true,
- };
- int i;
-
- for (i = 0; i < 2; i++) {
- plat_data.memcpy_chan = i ? memcpy_chan1 : memcpy_chan0;
- txx9_dmac_init(i, TX4938_DMA_REG(i) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4938_IR_DMA(i, 0),
- &plat_data);
- }
-}
-
-void __init tx4938_aclc_init(void)
-{
- u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg);
-
- if ((pcfg & TX4938_PCFG_SEL2) &&
- !(pcfg & TX4938_PCFG_ETH0_SEL))
- txx9_aclc_init(TX4938_ACLC_REG & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4938_IR_ACLC,
- 1, 0, 1);
-}
-
-void __init tx4938_sramc_init(void)
-{
- if (tx4938_sram_resource.start)
- txx9_sramc_init(&tx4938_sram_resource);
-}
-
-static void __init tx4938_stop_unused_modules(void)
-{
- __u64 pcfg, rst = 0, ckd = 0;
- char buf[128];
-
- buf[0] = '\0';
- local_irq_disable();
- pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg);
- switch (txx9_pcode) {
- case 0x4937:
- if (!(pcfg & TX4938_PCFG_SEL2)) {
- rst |= TX4938_CLKCTR_ACLRST;
- ckd |= TX4938_CLKCTR_ACLCKD;
- strcat(buf, " ACLC");
- }
- break;
- case 0x4938:
- if (!(pcfg & TX4938_PCFG_SEL2) ||
- (pcfg & TX4938_PCFG_ETH0_SEL)) {
- rst |= TX4938_CLKCTR_ACLRST;
- ckd |= TX4938_CLKCTR_ACLCKD;
- strcat(buf, " ACLC");
- }
- if ((pcfg &
- (TX4938_PCFG_ATA_SEL | TX4938_PCFG_ISA_SEL |
- TX4938_PCFG_NDF_SEL))
- != TX4938_PCFG_NDF_SEL) {
- rst |= TX4938_CLKCTR_NDFRST;
- ckd |= TX4938_CLKCTR_NDFCKD;
- strcat(buf, " NDFMC");
- }
- if (!(pcfg & TX4938_PCFG_SPI_SEL)) {
- rst |= TX4938_CLKCTR_SPIRST;
- ckd |= TX4938_CLKCTR_SPICKD;
- strcat(buf, " SPI");
- }
- break;
- }
- if (rst | ckd) {
- txx9_set64(&tx4938_ccfgptr->clkctr, rst);
- txx9_set64(&tx4938_ccfgptr->clkctr, ckd);
- }
- local_irq_enable();
- if (buf[0])
- pr_info("%s: stop%s\n", txx9_pcode_str, buf);
-}
-
-static int __init tx4938_late_init(void)
-{
- if (txx9_pcode != 0x4937 && txx9_pcode != 0x4938)
- return -ENODEV;
- tx4938_stop_unused_modules();
- return 0;
-}
-late_initcall(tx4938_late_init);
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
deleted file mode 100644
index bf8a3cdababf..000000000000
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ /dev/null
@@ -1,568 +0,0 @@
-/*
- * TX4939 setup routines
- * Based on linux/arch/mips/txx9/generic/setup_tx4938.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * 2003-2005 (c) MontaVista Software, Inc.
- * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/notifier.h>
-#include <linux/device.h>
-#include <linux/ethtool.h>
-#include <linux/param.h>
-#include <linux/ptrace.h>
-#include <linux/mtd/physmap.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/txx9/ndfmc.h>
-#include <asm/reboot.h>
-#include <asm/traps.h>
-#include <asm/txx9irq.h>
-#include <asm/txx9tmr.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/dmac.h>
-#include <asm/txx9/tx4939.h>
-
-static void __init tx4939_wdr_init(void)
-{
- /* report watchdog reset status */
- if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDRST)
- pr_warn("Watchdog reset detected at 0x%lx\n",
- read_c0_errorepc());
- /* clear WatchDogReset (W1C) */
- tx4939_ccfg_set(TX4939_CCFG_WDRST);
- /* do reset on watchdog */
- tx4939_ccfg_set(TX4939_CCFG_WR);
-}
-
-void __init tx4939_wdt_init(void)
-{
- txx9_wdt_init(TX4939_TMR_REG(2) & 0xfffffffffULL);
-}
-
-static void tx4939_machine_restart(char *command)
-{
- local_irq_disable();
- pr_emerg("Rebooting (with %s watchdog reset)...\n",
- (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDREXEN) ?
- "external" : "internal");
- /* clear watchdog status */
- tx4939_ccfg_set(TX4939_CCFG_WDRST); /* W1C */
- txx9_wdt_now(TX4939_TMR_REG(2) & 0xfffffffffULL);
- while (!(____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDRST))
- ;
- mdelay(10);
- if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDREXEN) {
- pr_emerg("Rebooting (with internal watchdog reset)...\n");
- /* External WDRST failed. Do internal watchdog reset */
- tx4939_ccfg_clear(TX4939_CCFG_WDREXEN);
- }
- /* fallback */
- (*_machine_halt)();
-}
-
-void show_registers(struct pt_regs *regs);
-static int tx4939_be_handler(struct pt_regs *regs, int is_fixup)
-{
- int data = regs->cp0_cause & 4;
- console_verbose();
- pr_err("%cBE exception at %#lx\n",
- data ? 'D' : 'I', regs->cp0_epc);
- pr_err("ccfg:%llx, toea:%llx\n",
- (unsigned long long)____raw_readq(&tx4939_ccfgptr->ccfg),
- (unsigned long long)____raw_readq(&tx4939_ccfgptr->toea));
-#ifdef CONFIG_PCI
- tx4927_report_pcic_status();
-#endif
- show_registers(regs);
- panic("BusError!");
-}
-static void __init tx4939_be_init(void)
-{
- board_be_handler = tx4939_be_handler;
-}
-
-static struct resource tx4939_sdram_resource[4];
-static struct resource tx4939_sram_resource;
-#define TX4939_SRAM_SIZE 0x800
-
-void __init tx4939_setup(void)
-{
- int i;
- __u32 divmode;
- __u64 pcfg;
- unsigned int cpuclk = 0;
-
- txx9_reg_res_init(TX4939_REV_PCODE(), TX4939_REG_BASE,
- TX4939_REG_SIZE);
- set_c0_config(TX49_CONF_CWFON);
-
- /* SDRAMC,EBUSC are configured by PROM */
- for (i = 0; i < 4; i++) {
- if (!(TX4939_EBUSC_CR(i) & 0x8))
- continue; /* disabled */
- txx9_ce_res[i].start = (unsigned long)TX4939_EBUSC_BA(i);
- txx9_ce_res[i].end =
- txx9_ce_res[i].start + TX4939_EBUSC_SIZE(i) - 1;
- request_resource(&iomem_resource, &txx9_ce_res[i]);
- }
-
- /* clocks */
- if (txx9_master_clock) {
- /* calculate cpu_clock from master_clock */
- divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) &
- TX4939_CCFG_MULCLK_MASK;
- cpuclk = txx9_master_clock * 20 / 2;
- switch (divmode) {
- case TX4939_CCFG_MULCLK_8:
- cpuclk = cpuclk / 3 * 4 /* / 6 * 8 */; break;
- case TX4939_CCFG_MULCLK_9:
- cpuclk = cpuclk / 2 * 3 /* / 6 * 9 */; break;
- case TX4939_CCFG_MULCLK_10:
- cpuclk = cpuclk / 3 * 5 /* / 6 * 10 */; break;
- case TX4939_CCFG_MULCLK_11:
- cpuclk = cpuclk / 6 * 11; break;
- case TX4939_CCFG_MULCLK_12:
- cpuclk = cpuclk * 2 /* / 6 * 12 */; break;
- case TX4939_CCFG_MULCLK_13:
- cpuclk = cpuclk / 6 * 13; break;
- case TX4939_CCFG_MULCLK_14:
- cpuclk = cpuclk / 3 * 7 /* / 6 * 14 */; break;
- case TX4939_CCFG_MULCLK_15:
- cpuclk = cpuclk / 2 * 5 /* / 6 * 15 */; break;
- }
- txx9_cpu_clock = cpuclk;
- } else {
- if (txx9_cpu_clock == 0)
- txx9_cpu_clock = 400000000; /* 400MHz */
- /* calculate master_clock from cpu_clock */
- cpuclk = txx9_cpu_clock;
- divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) &
- TX4939_CCFG_MULCLK_MASK;
- switch (divmode) {
- case TX4939_CCFG_MULCLK_8:
- txx9_master_clock = cpuclk * 6 / 8; break;
- case TX4939_CCFG_MULCLK_9:
- txx9_master_clock = cpuclk * 6 / 9; break;
- case TX4939_CCFG_MULCLK_10:
- txx9_master_clock = cpuclk * 6 / 10; break;
- case TX4939_CCFG_MULCLK_11:
- txx9_master_clock = cpuclk * 6 / 11; break;
- case TX4939_CCFG_MULCLK_12:
- txx9_master_clock = cpuclk * 6 / 12; break;
- case TX4939_CCFG_MULCLK_13:
- txx9_master_clock = cpuclk * 6 / 13; break;
- case TX4939_CCFG_MULCLK_14:
- txx9_master_clock = cpuclk * 6 / 14; break;
- case TX4939_CCFG_MULCLK_15:
- txx9_master_clock = cpuclk * 6 / 15; break;
- }
- txx9_master_clock /= 10; /* * 2 / 20 */
- }
- /* calculate gbus_clock from cpu_clock */
- divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) &
- TX4939_CCFG_YDIVMODE_MASK;
- txx9_gbus_clock = txx9_cpu_clock;
- switch (divmode) {
- case TX4939_CCFG_YDIVMODE_2:
- txx9_gbus_clock /= 2; break;
- case TX4939_CCFG_YDIVMODE_3:
- txx9_gbus_clock /= 3; break;
- case TX4939_CCFG_YDIVMODE_5:
- txx9_gbus_clock /= 5; break;
- case TX4939_CCFG_YDIVMODE_6:
- txx9_gbus_clock /= 6; break;
- }
- /* change default value to udelay/mdelay take reasonable time */
- loops_per_jiffy = txx9_cpu_clock / HZ / 2;
-
- /* CCFG */
- tx4939_wdr_init();
- /* clear BusErrorOnWrite flag (W1C) */
- tx4939_ccfg_set(TX4939_CCFG_WDRST | TX4939_CCFG_BEOW);
- /* enable Timeout BusError */
- if (txx9_ccfg_toeon)
- tx4939_ccfg_set(TX4939_CCFG_TOE);
-
- /* DMA selection */
- txx9_clear64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_DMASEL_ALL);
-
- /* Use external clock for external arbiter */
- if (!(____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB))
- txx9_clear64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_PCICLKEN_ALL);
-
- pr_info("%s -- %dMHz(M%dMHz,G%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n",
- txx9_pcode_str,
- (cpuclk + 500000) / 1000000,
- (txx9_master_clock + 500000) / 1000000,
- (txx9_gbus_clock + 500000) / 1000000,
- (__u32)____raw_readq(&tx4939_ccfgptr->crir),
- ____raw_readq(&tx4939_ccfgptr->ccfg),
- ____raw_readq(&tx4939_ccfgptr->pcfg));
-
- pr_info("%s DDRC -- EN:%08x", txx9_pcode_str,
- (__u32)____raw_readq(&tx4939_ddrcptr->winen));
- for (i = 0; i < 4; i++) {
- __u64 win = ____raw_readq(&tx4939_ddrcptr->win[i]);
- if (!((__u32)____raw_readq(&tx4939_ddrcptr->winen) & (1 << i)))
- continue; /* disabled */
- pr_cont(" #%d:%016llx", i, win);
- tx4939_sdram_resource[i].name = "DDR SDRAM";
- tx4939_sdram_resource[i].start =
- (unsigned long)(win >> 48) << 20;
- tx4939_sdram_resource[i].end =
- ((((unsigned long)(win >> 32) & 0xffff) + 1) <<
- 20) - 1;
- tx4939_sdram_resource[i].flags = IORESOURCE_MEM;
- request_resource(&iomem_resource, &tx4939_sdram_resource[i]);
- }
- pr_cont("\n");
-
- /* SRAM */
- if (____raw_readq(&tx4939_sramcptr->cr) & 1) {
- unsigned int size = TX4939_SRAM_SIZE;
- tx4939_sram_resource.name = "SRAM";
- tx4939_sram_resource.start =
- (____raw_readq(&tx4939_sramcptr->cr) >> (39-11))
- & ~(size - 1);
- tx4939_sram_resource.end =
- tx4939_sram_resource.start + TX4939_SRAM_SIZE - 1;
- tx4939_sram_resource.flags = IORESOURCE_MEM;
- request_resource(&iomem_resource, &tx4939_sram_resource);
- }
-
- /* TMR */
- /* disable all timers */
- for (i = 0; i < TX4939_NR_TMR; i++)
- txx9_tmr_init(TX4939_TMR_REG(i) & 0xfffffffffULL);
-
- /* set PCIC1 reset (required to prevent hangup on BIST) */
- txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1RST);
- pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
- if (pcfg & (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE)) {
- mdelay(1); /* at least 128 cpu clock */
- /* clear PCIC1 reset */
- txx9_clear64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1RST);
- } else {
- pr_info("%s: stop PCIC1\n", txx9_pcode_str);
- /* stop PCIC1 */
- txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1CKD);
- }
- if (!(pcfg & TX4939_PCFG_ET0MODE)) {
- pr_info("%s: stop ETH0\n", txx9_pcode_str);
- txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH0RST);
- txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH0CKD);
- }
- if (!(pcfg & TX4939_PCFG_ET1MODE)) {
- pr_info("%s: stop ETH1\n", txx9_pcode_str);
- txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH1RST);
- txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH1CKD);
- }
-
- _machine_restart = tx4939_machine_restart;
- board_be_init = tx4939_be_init;
-}
-
-void __init tx4939_time_init(unsigned int tmrnr)
-{
- if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_TINTDIS)
- txx9_clockevent_init(TX4939_TMR_REG(tmrnr) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4939_IR_TMR(tmrnr),
- TXX9_IMCLK);
-}
-
-void __init tx4939_sio_init(unsigned int sclk, unsigned int cts_mask)
-{
- int i;
- unsigned int ch_mask = 0;
- __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg);
-
- cts_mask |= ~1; /* only SIO0 have RTS/CTS */
- if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO0)
- cts_mask |= 1 << 0; /* disable SIO0 RTS/CTS by PCFG setting */
- if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO2)
- ch_mask |= 1 << 2; /* disable SIO2 by PCFG setting */
- if (pcfg & TX4939_PCFG_SIO3MODE)
- ch_mask |= 1 << 3; /* disable SIO3 by PCFG setting */
- for (i = 0; i < 4; i++) {
- if ((1 << i) & ch_mask)
- continue;
- txx9_sio_init(TX4939_SIO_REG(i) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4939_IR_SIO(i),
- i, sclk, (1 << i) & cts_mask);
- }
-}
-
-#if IS_ENABLED(CONFIG_TC35815)
-static u32 tx4939_get_eth_speed(struct net_device *dev)
-{
- struct ethtool_link_ksettings cmd;
-
- if (__ethtool_get_link_ksettings(dev, &cmd))
- return 100; /* default 100Mbps */
-
- return cmd.base.speed;
-}
-
-static int tx4939_netdev_event(struct notifier_block *this,
- unsigned long event,
- void *ptr)
-{
- struct net_device *dev = netdev_notifier_info_to_dev(ptr);
-
- if (event == NETDEV_CHANGE && netif_carrier_ok(dev)) {
- __u64 bit = 0;
- if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(0))
- bit = TX4939_PCFG_SPEED0;
- else if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(1))
- bit = TX4939_PCFG_SPEED1;
- if (bit) {
- if (tx4939_get_eth_speed(dev) == 100)
- txx9_set64(&tx4939_ccfgptr->pcfg, bit);
- else
- txx9_clear64(&tx4939_ccfgptr->pcfg, bit);
- }
- }
- return NOTIFY_DONE;
-}
-
-static struct notifier_block tx4939_netdev_notifier = {
- .notifier_call = tx4939_netdev_event,
- .priority = 1,
-};
-
-void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1)
-{
- u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg);
-
- if (addr0 && (pcfg & TX4939_PCFG_ET0MODE))
- txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(0), addr0);
- if (addr1 && (pcfg & TX4939_PCFG_ET1MODE))
- txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(1), addr1);
- register_netdevice_notifier(&tx4939_netdev_notifier);
-}
-#else
-void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1)
-{
-}
-#endif
-
-void __init tx4939_mtd_init(int ch)
-{
- struct physmap_flash_data pdata = {
- .width = TX4939_EBUSC_WIDTH(ch) / 8,
- };
- unsigned long start = txx9_ce_res[ch].start;
- unsigned long size = txx9_ce_res[ch].end - start + 1;
-
- if (!(TX4939_EBUSC_CR(ch) & 0x8))
- return; /* disabled */
- txx9_physmap_flash_init(ch, start, size, &pdata);
-}
-
-#define TX4939_ATA_REG_PHYS(ch) (TX4939_ATA_REG(ch) & 0xfffffffffULL)
-void __init tx4939_ata_init(void)
-{
- static struct resource ata0_res[] = {
- {
- .start = TX4939_ATA_REG_PHYS(0),
- .end = TX4939_ATA_REG_PHYS(0) + 0x1000 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = TXX9_IRQ_BASE + TX4939_IR_ATA(0),
- .flags = IORESOURCE_IRQ,
- },
- };
- static struct resource ata1_res[] = {
- {
- .start = TX4939_ATA_REG_PHYS(1),
- .end = TX4939_ATA_REG_PHYS(1) + 0x1000 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = TXX9_IRQ_BASE + TX4939_IR_ATA(1),
- .flags = IORESOURCE_IRQ,
- },
- };
- static struct platform_device ata0_dev = {
- .name = "tx4939ide",
- .id = 0,
- .num_resources = ARRAY_SIZE(ata0_res),
- .resource = ata0_res,
- };
- static struct platform_device ata1_dev = {
- .name = "tx4939ide",
- .id = 1,
- .num_resources = ARRAY_SIZE(ata1_res),
- .resource = ata1_res,
- };
- __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg);
-
- if (pcfg & TX4939_PCFG_ATA0MODE)
- platform_device_register(&ata0_dev);
- if ((pcfg & (TX4939_PCFG_ATA1MODE |
- TX4939_PCFG_ET1MODE |
- TX4939_PCFG_ET0MODE)) == TX4939_PCFG_ATA1MODE)
- platform_device_register(&ata1_dev);
-}
-
-void __init tx4939_rtc_init(void)
-{
- static struct resource res[] = {
- {
- .start = TX4939_RTC_REG & 0xfffffffffULL,
- .end = (TX4939_RTC_REG & 0xfffffffffULL) + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = TXX9_IRQ_BASE + TX4939_IR_RTC,
- .flags = IORESOURCE_IRQ,
- },
- };
- static struct platform_device rtc_dev = {
- .name = "tx4939rtc",
- .id = -1,
- .num_resources = ARRAY_SIZE(res),
- .resource = res,
- };
-
- platform_device_register(&rtc_dev);
-}
-
-void __init tx4939_ndfmc_init(unsigned int hold, unsigned int spw,
- unsigned char ch_mask, unsigned char wide_mask)
-{
- struct txx9ndfmc_platform_data plat_data = {
- .shift = 1,
- .gbus_clock = txx9_gbus_clock,
- .hold = hold,
- .spw = spw,
- .flags = NDFMC_PLAT_FLAG_NO_RSTR | NDFMC_PLAT_FLAG_HOLDADD |
- NDFMC_PLAT_FLAG_DUMMYWRITE,
- .ch_mask = ch_mask,
- .wide_mask = wide_mask,
- };
- txx9_ndfmc_init(TX4939_NDFMC_REG & 0xfffffffffULL, &plat_data);
-}
-
-void __init tx4939_dmac_init(int memcpy_chan0, int memcpy_chan1)
-{
- struct txx9dmac_platform_data plat_data = {
- .have_64bit_regs = true,
- };
- int i;
-
- for (i = 0; i < 2; i++) {
- plat_data.memcpy_chan = i ? memcpy_chan1 : memcpy_chan0;
- txx9_dmac_init(i, TX4939_DMA_REG(i) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4939_IR_DMA(i, 0),
- &plat_data);
- }
-}
-
-void __init tx4939_aclc_init(void)
-{
- u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg);
-
- if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_ACLC)
- txx9_aclc_init(TX4939_ACLC_REG & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4939_IR_ACLC, 1, 0, 1);
-}
-
-void __init tx4939_sramc_init(void)
-{
- if (tx4939_sram_resource.start)
- txx9_sramc_init(&tx4939_sram_resource);
-}
-
-void __init tx4939_rng_init(void)
-{
- static struct resource res = {
- .start = TX4939_RNG_REG & 0xfffffffffULL,
- .end = (TX4939_RNG_REG & 0xfffffffffULL) + 0x30 - 1,
- .flags = IORESOURCE_MEM,
- };
- static struct platform_device pdev = {
- .name = "tx4939-rng",
- .id = -1,
- .num_resources = 1,
- .resource = &res,
- };
-
- platform_device_register(&pdev);
-}
-
-static void __init tx4939_stop_unused_modules(void)
-{
- __u64 pcfg, rst = 0, ckd = 0;
- char buf[128];
-
- buf[0] = '\0';
- local_irq_disable();
- pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
- if ((pcfg & TX4939_PCFG_I2SMODE_MASK) !=
- TX4939_PCFG_I2SMODE_ACLC) {
- rst |= TX4939_CLKCTR_ACLRST;
- ckd |= TX4939_CLKCTR_ACLCKD;
- strcat(buf, " ACLC");
- }
- if ((pcfg & TX4939_PCFG_I2SMODE_MASK) !=
- TX4939_PCFG_I2SMODE_I2S &&
- (pcfg & TX4939_PCFG_I2SMODE_MASK) !=
- TX4939_PCFG_I2SMODE_I2S_ALT) {
- rst |= TX4939_CLKCTR_I2SRST;
- ckd |= TX4939_CLKCTR_I2SCKD;
- strcat(buf, " I2S");
- }
- if (!(pcfg & TX4939_PCFG_ATA0MODE)) {
- rst |= TX4939_CLKCTR_ATA0RST;
- ckd |= TX4939_CLKCTR_ATA0CKD;
- strcat(buf, " ATA0");
- }
- if (!(pcfg & TX4939_PCFG_ATA1MODE)) {
- rst |= TX4939_CLKCTR_ATA1RST;
- ckd |= TX4939_CLKCTR_ATA1CKD;
- strcat(buf, " ATA1");
- }
- if (pcfg & TX4939_PCFG_SPIMODE) {
- rst |= TX4939_CLKCTR_SPIRST;
- ckd |= TX4939_CLKCTR_SPICKD;
- strcat(buf, " SPI");
- }
- if (!(pcfg & (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE))) {
- rst |= TX4939_CLKCTR_VPCRST;
- ckd |= TX4939_CLKCTR_VPCCKD;
- strcat(buf, " VPC");
- }
- if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO2) {
- rst |= TX4939_CLKCTR_SIO2RST;
- ckd |= TX4939_CLKCTR_SIO2CKD;
- strcat(buf, " SIO2");
- }
- if (pcfg & TX4939_PCFG_SIO3MODE) {
- rst |= TX4939_CLKCTR_SIO3RST;
- ckd |= TX4939_CLKCTR_SIO3CKD;
- strcat(buf, " SIO3");
- }
- if (rst | ckd) {
- txx9_set64(&tx4939_ccfgptr->clkctr, rst);
- txx9_set64(&tx4939_ccfgptr->clkctr, ckd);
- }
- local_irq_enable();
- if (buf[0])
- pr_info("%s: stop%s\n", txx9_pcode_str, buf);
-}
-
-static int __init tx4939_late_init(void)
-{
- if (txx9_pcode != 0x4939)
- return -ENODEV;
- tx4939_stop_unused_modules();
- return 0;
-}
-late_initcall(tx4939_late_init);
diff --git a/arch/mips/txx9/rbtx4927/Makefile b/arch/mips/txx9/rbtx4927/Makefile
deleted file mode 100644
index 08a02aebda5a..000000000000
--- a/arch/mips/txx9/rbtx4927/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-y += prom.o setup.o irq.o
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
deleted file mode 100644
index 3f48292c9c6c..000000000000
--- a/arch/mips/txx9/rbtx4927/irq.c
+++ /dev/null
@@ -1,198 +0,0 @@
-/*
- * Toshiba RBTX4927 specific interrupt handlers
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-/*
- * I8259A_IRQ_BASE+00
- * I8259A_IRQ_BASE+01 PS2/Keyboard
- * I8259A_IRQ_BASE+02 Cascade RBTX4927-ISA (irqs 8-15)
- * I8259A_IRQ_BASE+03
- * I8259A_IRQ_BASE+04
- * I8259A_IRQ_BASE+05
- * I8259A_IRQ_BASE+06
- * I8259A_IRQ_BASE+07
- * I8259A_IRQ_BASE+08
- * I8259A_IRQ_BASE+09
- * I8259A_IRQ_BASE+10
- * I8259A_IRQ_BASE+11
- * I8259A_IRQ_BASE+12 PS2/Mouse (not supported at this time)
- * I8259A_IRQ_BASE+13
- * I8259A_IRQ_BASE+14 IDE
- * I8259A_IRQ_BASE+15
- *
- * MIPS_CPU_IRQ_BASE+00 Software 0
- * MIPS_CPU_IRQ_BASE+01 Software 1
- * MIPS_CPU_IRQ_BASE+02 Cascade TX4927-CP0
- * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+07 CPU TIMER
- *
- * TXX9_IRQ_BASE+00
- * TXX9_IRQ_BASE+01
- * TXX9_IRQ_BASE+02
- * TXX9_IRQ_BASE+03 Cascade RBTX4927-IOC
- * TXX9_IRQ_BASE+04
- * TXX9_IRQ_BASE+05 RBTX4927 RTL-8019AS ethernet
- * TXX9_IRQ_BASE+06
- * TXX9_IRQ_BASE+07
- * TXX9_IRQ_BASE+08 TX4927 SerialIO Channel 0
- * TXX9_IRQ_BASE+09 TX4927 SerialIO Channel 1
- * TXX9_IRQ_BASE+10
- * TXX9_IRQ_BASE+11
- * TXX9_IRQ_BASE+12
- * TXX9_IRQ_BASE+13
- * TXX9_IRQ_BASE+14
- * TXX9_IRQ_BASE+15
- * TXX9_IRQ_BASE+16 TX4927 PCI PCI-C
- * TXX9_IRQ_BASE+17
- * TXX9_IRQ_BASE+18
- * TXX9_IRQ_BASE+19
- * TXX9_IRQ_BASE+20
- * TXX9_IRQ_BASE+21
- * TXX9_IRQ_BASE+22 TX4927 PCI PCI-ERR
- * TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used)
- * TXX9_IRQ_BASE+24
- * TXX9_IRQ_BASE+25
- * TXX9_IRQ_BASE+26
- * TXX9_IRQ_BASE+27
- * TXX9_IRQ_BASE+28
- * TXX9_IRQ_BASE+29
- * TXX9_IRQ_BASE+30
- * TXX9_IRQ_BASE+31
- *
- * RBTX4927_IRQ_IOC+00 FPCIB0 PCI-D (SouthBridge)
- * RBTX4927_IRQ_IOC+01 FPCIB0 PCI-C (SouthBridge)
- * RBTX4927_IRQ_IOC+02 FPCIB0 PCI-B (SouthBridge/IDE/pin=1,INTR)
- * RBTX4927_IRQ_IOC+03 FPCIB0 PCI-A (SouthBridge/USB/pin=4)
- * RBTX4927_IRQ_IOC+04
- * RBTX4927_IRQ_IOC+05
- * RBTX4927_IRQ_IOC+06
- * RBTX4927_IRQ_IOC+07
- *
- * NOTES:
- * SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
- * SouthBridge/ISA/pin=0 no pci irq used by this device
- * SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR
- * via ISA IRQ14
- * SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
- * SouthBridge/PMC/pin=0 no pci irq used by this device
- * SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
- * SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
- * JP7 is not bus master -- do NOT use -- only 4 pci bus master's
- * allowed -- SouthBridge, JP4, JP5, JP6
- */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <asm/io.h>
-#include <asm/mipsregs.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/rbtx4927.h>
-
-static int toshiba_rbtx4927_irq_nested(int sw_irq)
-{
- u8 level3;
-
- level3 = readb(rbtx4927_imstat_addr) & 0x1f;
- if (unlikely(!level3))
- return -1;
- return RBTX4927_IRQ_IOC + __fls8(level3);
-}
-
-static void toshiba_rbtx4927_irq_ioc_enable(struct irq_data *d)
-{
- unsigned char v;
-
- v = readb(rbtx4927_imask_addr);
- v |= (1 << (d->irq - RBTX4927_IRQ_IOC));
- writeb(v, rbtx4927_imask_addr);
-}
-
-static void toshiba_rbtx4927_irq_ioc_disable(struct irq_data *d)
-{
- unsigned char v;
-
- v = readb(rbtx4927_imask_addr);
- v &= ~(1 << (d->irq - RBTX4927_IRQ_IOC));
- writeb(v, rbtx4927_imask_addr);
- mmiowb();
-}
-
-#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
-static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
- .name = TOSHIBA_RBTX4927_IOC_NAME,
- .irq_mask = toshiba_rbtx4927_irq_ioc_disable,
- .irq_unmask = toshiba_rbtx4927_irq_ioc_enable,
-};
-
-static void __init toshiba_rbtx4927_irq_ioc_init(void)
-{
- int i;
-
- /* mask all IOC interrupts */
- writeb(0, rbtx4927_imask_addr);
- /* clear SoftInt interrupts */
- writeb(0, rbtx4927_softint_addr);
-
- for (i = RBTX4927_IRQ_IOC;
- i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
- irq_set_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
- handle_level_irq);
- irq_set_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
-}
-
-static int rbtx4927_irq_dispatch(int pending)
-{
- int irq;
-
- if (pending & STATUSF_IP7) /* cpu timer */
- irq = MIPS_CPU_IRQ_BASE + 7;
- else if (pending & STATUSF_IP2) { /* tx4927 pic */
- irq = txx9_irq();
- if (irq == RBTX4927_IRQ_IOCINT)
- irq = toshiba_rbtx4927_irq_nested(irq);
- } else if (pending & STATUSF_IP0) /* user line 0 */
- irq = MIPS_CPU_IRQ_BASE + 0;
- else if (pending & STATUSF_IP1) /* user line 1 */
- irq = MIPS_CPU_IRQ_BASE + 1;
- else
- irq = -1;
- return irq;
-}
-
-void __init rbtx4927_irq_setup(void)
-{
- txx9_irq_dispatch = rbtx4927_irq_dispatch;
- tx4927_irq_init();
- toshiba_rbtx4927_irq_ioc_init();
- /* Onboard 10M Ether: High Active */
- irq_set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
-}
diff --git a/arch/mips/txx9/rbtx4927/prom.c b/arch/mips/txx9/rbtx4927/prom.c
deleted file mode 100644
index 9b4acff826eb..000000000000
--- a/arch/mips/txx9/rbtx4927/prom.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * rbtx4927 specific prom routines
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Author: Manish Lachwani, mlachwani@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/init.h>
-#include <linux/memblock.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/rbtx4927.h>
-
-void __init rbtx4927_prom_init(void)
-{
- memblock_add(0, tx4927_get_mem_size());
- txx9_sio_putchar_init(TX4927_SIO_REG(0) & 0xfffffffffULL);
-}
diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c
deleted file mode 100644
index 31955c1d5555..000000000000
--- a/arch/mips/txx9/rbtx4927/setup.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * Toshiba rbtx4927 specific setup
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * Copyright 2002 MontaVista Software Inc.
- * Author: Michael Pruznick, michael_pruznick@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Author: Manish Lachwani, mlachwani@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/ioport.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <asm/io.h>
-#include <asm/reboot.h>
-#include <asm/txx9pio.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/pci.h>
-#include <asm/txx9/rbtx4927.h>
-#include <asm/txx9/tx4938.h> /* for TX4937 */
-
-#ifdef CONFIG_PCI
-static void __init tx4927_pci_setup(void)
-{
- int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB);
- struct pci_controller *c = &txx9_primary_pcic;
-
- register_pci_controller(c);
-
- if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66)
- txx9_pci_option =
- (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
- TXX9_PCI_OPT_CLK_66; /* already configured */
-
- /* Reset PCI Bus */
- writeb(1, rbtx4927_pcireset_addr);
- /* Reset PCIC */
- txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
- if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
- TXX9_PCI_OPT_CLK_66)
- tx4927_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
- writeb(0, rbtx4927_pcireset_addr);
- iob();
-
- tx4927_report_pciclk();
- tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
- if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
- TXX9_PCI_OPT_CLK_AUTO &&
- txx9_pci66_check(c, 0, 0)) {
- /* Reset PCI Bus */
- writeb(1, rbtx4927_pcireset_addr);
- /* Reset PCIC */
- txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
- tx4927_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
- writeb(0, rbtx4927_pcireset_addr);
- iob();
- /* Reinitialize PCIC */
- tx4927_report_pciclk();
- tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
- }
- tx4927_setup_pcierr_irq();
-}
-
-static void __init tx4937_pci_setup(void)
-{
- int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
- struct pci_controller *c = &txx9_primary_pcic;
-
- register_pci_controller(c);
-
- if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
- txx9_pci_option =
- (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
- TXX9_PCI_OPT_CLK_66; /* already configured */
-
- /* Reset PCI Bus */
- writeb(1, rbtx4927_pcireset_addr);
- /* Reset PCIC */
- txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
- TXX9_PCI_OPT_CLK_66)
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- writeb(0, rbtx4927_pcireset_addr);
- iob();
-
- tx4938_report_pciclk();
- tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
- if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
- TXX9_PCI_OPT_CLK_AUTO &&
- txx9_pci66_check(c, 0, 0)) {
- /* Reset PCI Bus */
- writeb(1, rbtx4927_pcireset_addr);
- /* Reset PCIC */
- txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- writeb(0, rbtx4927_pcireset_addr);
- iob();
- /* Reinitialize PCIC */
- tx4938_report_pciclk();
- tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
- }
- tx4938_setup_pcierr_irq();
-}
-#else
-static inline void tx4927_pci_setup(void) {}
-static inline void tx4937_pci_setup(void) {}
-#endif /* CONFIG_PCI */
-
-static void __init rbtx4927_gpio_init(void)
-{
- /* TX4927-SIO DTR on (PIO[15]) */
- gpio_request(15, "sio-dtr");
- gpio_direction_output(15, 1);
-
- tx4927_sio_init(0, 0);
-}
-
-static void __init rbtx4927_arch_init(void)
-{
- txx9_gpio_init(TX4927_PIO_REG & 0xfffffffffULL, 0, TX4927_NUM_PIO);
-
- rbtx4927_gpio_init();
-
- tx4927_pci_setup();
-}
-
-static void __init rbtx4937_arch_init(void)
-{
- txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, TX4938_NUM_PIO);
-
- rbtx4927_gpio_init();
-
- tx4937_pci_setup();
-}
-
-static void toshiba_rbtx4927_restart(char *command)
-{
- /* enable the s/w reset register */
- writeb(1, rbtx4927_softresetlock_addr);
-
- /* wait for enable to be seen */
- while (!(readb(rbtx4927_softresetlock_addr) & 1))
- ;
-
- /* do a s/w reset */
- writeb(1, rbtx4927_softreset_addr);
-
- /* fallback */
- (*_machine_halt)();
-}
-
-static void __init rbtx4927_clock_init(void);
-static void __init rbtx4937_clock_init(void);
-
-static void __init rbtx4927_mem_setup(void)
-{
- if (TX4927_REV_PCODE() == 0x4927) {
- rbtx4927_clock_init();
- tx4927_setup();
- } else {
- rbtx4937_clock_init();
- tx4938_setup();
- }
-
- _machine_restart = toshiba_rbtx4927_restart;
-
-#ifdef CONFIG_PCI
- txx9_alloc_pci_controller(&txx9_primary_pcic,
- RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
- RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
- txx9_board_pcibios_setup = tx4927_pcibios_setup;
-#else
- set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
-#endif
-}
-
-static void __init rbtx4927_clock_init(void)
-{
- /*
- * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
- *
- * For TX4927:
- * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
- * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
- * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
- * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
- * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
- * i.e. S9[3]: ON (83MHz), OFF (100MHz)
- */
- switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) &
- TX4927_CCFG_PCIDIVMODE_MASK) {
- case TX4927_CCFG_PCIDIVMODE_2_5:
- case TX4927_CCFG_PCIDIVMODE_5:
- txx9_cpu_clock = 166666666; /* 166MHz */
- break;
- default:
- txx9_cpu_clock = 200000000; /* 200MHz */
- }
-}
-
-static void __init rbtx4937_clock_init(void)
-{
- /*
- * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
- *
- * For TX4937:
- * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
- * PCIDIVMODE[10] is 0.
- * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
- * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
- * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
- * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
- * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
- * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
- */
- switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) &
- TX4938_CCFG_PCIDIVMODE_MASK) {
- case TX4938_CCFG_PCIDIVMODE_8:
- case TX4938_CCFG_PCIDIVMODE_4:
- txx9_cpu_clock = 266666666; /* 266MHz */
- break;
- case TX4938_CCFG_PCIDIVMODE_9:
- case TX4938_CCFG_PCIDIVMODE_4_5:
- txx9_cpu_clock = 300000000; /* 300MHz */
- break;
- default:
- txx9_cpu_clock = 333333333; /* 333MHz */
- }
-}
-
-static void __init rbtx4927_time_init(void)
-{
- tx4927_time_init(0);
-}
-
-static void __init toshiba_rbtx4927_rtc_init(void)
-{
- struct resource res = {
- .start = RBTX4927_BRAMRTC_BASE - IO_BASE,
- .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1,
- .flags = IORESOURCE_MEM,
- };
- platform_device_register_simple("rtc-ds1742", -1, &res, 1);
-}
-
-static void __init rbtx4927_ne_init(void)
-{
- struct resource res[] = {
- {
- .start = RBTX4927_RTL_8019_BASE,
- .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
- .flags = IORESOURCE_IO,
- }, {
- .start = RBTX4927_RTL_8019_IRQ,
- .flags = IORESOURCE_IRQ,
- }
- };
- platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
-}
-
-static void __init rbtx4927_mtd_init(void)
-{
- int i;
-
- for (i = 0; i < 2; i++)
- tx4927_mtd_init(i);
-}
-
-static void __init rbtx4927_gpioled_init(void)
-{
- static const struct gpio_led leds[] = {
- { .name = "gpioled:green:0", .gpio = 0, .active_low = 1, },
- { .name = "gpioled:green:1", .gpio = 1, .active_low = 1, },
- };
- static struct gpio_led_platform_data pdata = {
- .num_leds = ARRAY_SIZE(leds),
- .leds = leds,
- };
- struct platform_device *pdev = platform_device_alloc("leds-gpio", 0);
-
- if (!pdev)
- return;
- pdev->dev.platform_data = &pdata;
- if (platform_device_add(pdev))
- platform_device_put(pdev);
-}
-
-static void __init rbtx4927_device_init(void)
-{
- toshiba_rbtx4927_rtc_init();
- rbtx4927_ne_init();
- tx4927_wdt_init();
- rbtx4927_mtd_init();
- if (TX4927_REV_PCODE() == 0x4927) {
- tx4927_dmac_init(2);
- tx4927_aclc_init(0, 1);
- } else {
- tx4938_dmac_init(0, 2);
- tx4938_aclc_init();
- }
- platform_device_register_simple("txx9aclc-generic", -1, NULL, 0);
- txx9_iocled_init(RBTX4927_LED_ADDR - IO_BASE, -1, 3, 1, "green", NULL);
- rbtx4927_gpioled_init();
-}
-
-struct txx9_board_vec rbtx4927_vec __initdata = {
- .system = "Toshiba RBTX4927",
- .prom_init = rbtx4927_prom_init,
- .mem_setup = rbtx4927_mem_setup,
- .irq_setup = rbtx4927_irq_setup,
- .time_init = rbtx4927_time_init,
- .device_init = rbtx4927_device_init,
- .arch_init = rbtx4927_arch_init,
-#ifdef CONFIG_PCI
- .pci_map_irq = rbtx4927_pci_map_irq,
-#endif
-};
-struct txx9_board_vec rbtx4937_vec __initdata = {
- .system = "Toshiba RBTX4937",
- .prom_init = rbtx4927_prom_init,
- .mem_setup = rbtx4927_mem_setup,
- .irq_setup = rbtx4927_irq_setup,
- .time_init = rbtx4927_time_init,
- .device_init = rbtx4927_device_init,
- .arch_init = rbtx4937_arch_init,
-#ifdef CONFIG_PCI
- .pci_map_irq = rbtx4927_pci_map_irq,
-#endif
-};
diff --git a/arch/mips/txx9/rbtx4938/Makefile b/arch/mips/txx9/rbtx4938/Makefile
deleted file mode 100644
index 08a02aebda5a..000000000000
--- a/arch/mips/txx9/rbtx4938/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-y += prom.o setup.o irq.o
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
deleted file mode 100644
index 58cd7a9272cc..000000000000
--- a/arch/mips/txx9/rbtx4938/irq.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * Toshiba RBTX4938 specific interrupt handlers
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-
-/*
- * MIPS_CPU_IRQ_BASE+00 Software 0
- * MIPS_CPU_IRQ_BASE+01 Software 1
- * MIPS_CPU_IRQ_BASE+02 Cascade TX4938-CP0
- * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use
- * MIPS_CPU_IRQ_BASE+07 CPU TIMER
- *
- * TXX9_IRQ_BASE+00
- * TXX9_IRQ_BASE+01
- * TXX9_IRQ_BASE+02 Cascade RBTX4938-IOC
- * TXX9_IRQ_BASE+03 RBTX4938 RTL-8019AS Ethernet
- * TXX9_IRQ_BASE+04
- * TXX9_IRQ_BASE+05 TX4938 ETH1
- * TXX9_IRQ_BASE+06 TX4938 ETH0
- * TXX9_IRQ_BASE+07
- * TXX9_IRQ_BASE+08 TX4938 SIO 0
- * TXX9_IRQ_BASE+09 TX4938 SIO 1
- * TXX9_IRQ_BASE+10 TX4938 DMA0
- * TXX9_IRQ_BASE+11 TX4938 DMA1
- * TXX9_IRQ_BASE+12 TX4938 DMA2
- * TXX9_IRQ_BASE+13 TX4938 DMA3
- * TXX9_IRQ_BASE+14
- * TXX9_IRQ_BASE+15
- * TXX9_IRQ_BASE+16 TX4938 PCIC
- * TXX9_IRQ_BASE+17 TX4938 TMR0
- * TXX9_IRQ_BASE+18 TX4938 TMR1
- * TXX9_IRQ_BASE+19 TX4938 TMR2
- * TXX9_IRQ_BASE+20
- * TXX9_IRQ_BASE+21
- * TXX9_IRQ_BASE+22 TX4938 PCIERR
- * TXX9_IRQ_BASE+23
- * TXX9_IRQ_BASE+24
- * TXX9_IRQ_BASE+25
- * TXX9_IRQ_BASE+26
- * TXX9_IRQ_BASE+27
- * TXX9_IRQ_BASE+28
- * TXX9_IRQ_BASE+29
- * TXX9_IRQ_BASE+30
- * TXX9_IRQ_BASE+31 TX4938 SPI
- *
- * RBTX4938_IRQ_IOC+00 PCI-D
- * RBTX4938_IRQ_IOC+01 PCI-C
- * RBTX4938_IRQ_IOC+02 PCI-B
- * RBTX4938_IRQ_IOC+03 PCI-A
- * RBTX4938_IRQ_IOC+04 RTC
- * RBTX4938_IRQ_IOC+05 ATA
- * RBTX4938_IRQ_IOC+06 MODEM
- * RBTX4938_IRQ_IOC+07 SWINT
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/rbtx4938.h>
-
-static int toshiba_rbtx4938_irq_nested(int sw_irq)
-{
- u8 level3;
-
- level3 = readb(rbtx4938_imstat_addr);
- if (unlikely(!level3))
- return -1;
- /* must use fls so onboard ATA has priority */
- return RBTX4938_IRQ_IOC + __fls8(level3);
-}
-
-static void toshiba_rbtx4938_irq_ioc_enable(struct irq_data *d)
-{
- unsigned char v;
-
- v = readb(rbtx4938_imask_addr);
- v |= (1 << (d->irq - RBTX4938_IRQ_IOC));
- writeb(v, rbtx4938_imask_addr);
- mmiowb();
-}
-
-static void toshiba_rbtx4938_irq_ioc_disable(struct irq_data *d)
-{
- unsigned char v;
-
- v = readb(rbtx4938_imask_addr);
- v &= ~(1 << (d->irq - RBTX4938_IRQ_IOC));
- writeb(v, rbtx4938_imask_addr);
- mmiowb();
-}
-
-#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
-static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
- .name = TOSHIBA_RBTX4938_IOC_NAME,
- .irq_mask = toshiba_rbtx4938_irq_ioc_disable,
- .irq_unmask = toshiba_rbtx4938_irq_ioc_enable,
-};
-
-static int rbtx4938_irq_dispatch(int pending)
-{
- int irq;
-
- if (pending & STATUSF_IP7)
- irq = MIPS_CPU_IRQ_BASE + 7;
- else if (pending & STATUSF_IP2) {
- irq = txx9_irq();
- if (irq == RBTX4938_IRQ_IOCINT)
- irq = toshiba_rbtx4938_irq_nested(irq);
- } else if (pending & STATUSF_IP1)
- irq = MIPS_CPU_IRQ_BASE + 0;
- else if (pending & STATUSF_IP0)
- irq = MIPS_CPU_IRQ_BASE + 1;
- else
- irq = -1;
- return irq;
-}
-
-static void __init toshiba_rbtx4938_irq_ioc_init(void)
-{
- int i;
-
- for (i = RBTX4938_IRQ_IOC;
- i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
- irq_set_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
- handle_level_irq);
-
- irq_set_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
-}
-
-void __init rbtx4938_irq_setup(void)
-{
- txx9_irq_dispatch = rbtx4938_irq_dispatch;
- /* Now, interrupt control disabled, */
- /* all IRC interrupts are masked, */
- /* all IRC interrupt mode are Low Active. */
-
- /* mask all IOC interrupts */
- writeb(0, rbtx4938_imask_addr);
-
- /* clear SoftInt interrupts */
- writeb(0, rbtx4938_softint_addr);
- tx4938_irq_init();
- toshiba_rbtx4938_irq_ioc_init();
- /* Onboard 10M Ether: High Active */
- irq_set_irq_type(RBTX4938_IRQ_ETHER, IRQF_TRIGGER_HIGH);
-}
diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c
deleted file mode 100644
index 0de84716a428..000000000000
--- a/arch/mips/txx9/rbtx4938/prom.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * rbtx4938 specific prom routines
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-
-#include <linux/init.h>
-#include <linux/memblock.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/rbtx4938.h>
-
-void __init rbtx4938_prom_init(void)
-{
- memblock_add(0, tx4938_get_mem_size());
- txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL);
-}
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c
deleted file mode 100644
index e68eb2e7ce0c..000000000000
--- a/arch/mips/txx9/rbtx4938/setup.c
+++ /dev/null
@@ -1,372 +0,0 @@
-/*
- * Setup pointers to hardware-dependent routines.
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <linux/gpio/driver.h>
-#include <linux/gpio.h>
-#include <linux/mtd/physmap.h>
-
-#include <asm/reboot.h>
-#include <asm/io.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/pci.h>
-#include <asm/txx9/rbtx4938.h>
-#include <linux/spi/spi.h>
-#include <asm/txx9/spi.h>
-#include <asm/txx9pio.h>
-
-static void rbtx4938_machine_restart(char *command)
-{
- local_irq_disable();
- writeb(1, rbtx4938_softresetlock_addr);
- writeb(1, rbtx4938_sfvol_addr);
- writeb(1, rbtx4938_softreset_addr);
- /* fallback */
- (*_machine_halt)();
-}
-
-static void __init rbtx4938_pci_setup(void)
-{
-#ifdef CONFIG_PCI
- int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
- struct pci_controller *c = &txx9_primary_pcic;
-
- register_pci_controller(c);
-
- if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
- txx9_pci_option =
- (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
- TXX9_PCI_OPT_CLK_66; /* already configured */
-
- /* Reset PCI Bus */
- writeb(0, rbtx4938_pcireset_addr);
- /* Reset PCIC */
- txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
- TXX9_PCI_OPT_CLK_66)
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- writeb(1, rbtx4938_pcireset_addr);
- iob();
-
- tx4938_report_pciclk();
- tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
- if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
- TXX9_PCI_OPT_CLK_AUTO &&
- txx9_pci66_check(c, 0, 0)) {
- /* Reset PCI Bus */
- writeb(0, rbtx4938_pcireset_addr);
- /* Reset PCIC */
- txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
- writeb(1, rbtx4938_pcireset_addr);
- iob();
- /* Reinitialize PCIC */
- tx4938_report_pciclk();
- tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
- }
-
- if (__raw_readq(&tx4938_ccfgptr->pcfg) &
- (TX4938_PCFG_ETH0_SEL|TX4938_PCFG_ETH1_SEL)) {
- /* Reset PCIC1 */
- txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
- /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
- if (!(__raw_readq(&tx4938_ccfgptr->ccfg)
- & TX4938_CCFG_PCI1DMD))
- tx4938_ccfg_set(TX4938_CCFG_PCI1_66);
- mdelay(10);
- /* clear PCIC1 reset */
- txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
- tx4938_report_pci1clk();
-
- /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
- c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
- register_pci_controller(c);
- tx4927_pcic_setup(tx4938_pcic1ptr, c, 0);
- }
- tx4938_setup_pcierr_irq();
-#endif /* CONFIG_PCI */
-}
-
-/* SPI support */
-
-/* chip select for SPI devices */
-#define SEEPROM1_CS 7 /* PIO7 */
-#define SEEPROM2_CS 0 /* IOC */
-#define SEEPROM3_CS 1 /* IOC */
-#define SRTC_CS 2 /* IOC */
-#define SPI_BUSNO 0
-
-static int __init rbtx4938_ethaddr_init(void)
-{
-#ifdef CONFIG_PCI
- unsigned char dat[17];
- unsigned char sum;
- int i;
-
- /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
- if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) {
- pr_err("seeprom: read error.\n");
- return -ENODEV;
- } else {
- if (strcmp(dat, "MAC") != 0)
- pr_warn("seeprom: bad signature.\n");
- for (i = 0, sum = 0; i < sizeof(dat); i++)
- sum += dat[i];
- if (sum)
- pr_warn("seeprom: bad checksum.\n");
- }
- tx4938_ethaddr_init(&dat[4], &dat[4 + 6]);
-#endif /* CONFIG_PCI */
- return 0;
-}
-
-static void __init rbtx4938_spi_setup(void)
-{
- /* set SPI_SEL */
- txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_SPI_SEL);
-}
-
-static struct resource rbtx4938_fpga_resource;
-
-static void __init rbtx4938_time_init(void)
-{
- tx4938_time_init(0);
-}
-
-static void __init rbtx4938_mem_setup(void)
-{
- unsigned long long pcfg;
-
- if (txx9_master_clock == 0)
- txx9_master_clock = 25000000; /* 25MHz */
-
- tx4938_setup();
-
-#ifdef CONFIG_PCI
- txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
- txx9_board_pcibios_setup = tx4927_pcibios_setup;
-#else
- set_io_port_base(RBTX4938_ETHER_BASE);
-#endif
-
- tx4938_sio_init(7372800, 0);
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
- pr_info("PIOSEL: disabling both ATA and NAND selection\n");
- txx9_clear64(&tx4938_ccfgptr->pcfg,
- TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
- pr_info("PIOSEL: enabling NAND selection\n");
- txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
- txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
- pr_info("PIOSEL: enabling ATA selection\n");
- txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
- txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP
- pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg);
- pr_info("PIOSEL: NAND %s, ATA %s\n",
- (pcfg & TX4938_PCFG_NDF_SEL) ? "enabled" : "disabled",
- (pcfg & TX4938_PCFG_ATA_SEL) ? "enabled" : "disabled");
-#endif
-
- rbtx4938_spi_setup();
- pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
- /* fixup piosel */
- if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
- TX4938_PCFG_ATA_SEL)
- writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x04,
- rbtx4938_piosel_addr);
- else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
- TX4938_PCFG_NDF_SEL)
- writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x08,
- rbtx4938_piosel_addr);
- else
- writeb(readb(rbtx4938_piosel_addr) & ~(0x08 | 0x04),
- rbtx4938_piosel_addr);
-
- rbtx4938_fpga_resource.name = "FPGA Registers";
- rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
- rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
- rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
- if (request_resource(&txx9_ce_res[2], &rbtx4938_fpga_resource))
- pr_err("request resource for fpga failed\n");
-
- _machine_restart = rbtx4938_machine_restart;
-
- writeb(0xff, rbtx4938_led_addr);
- pr_info("RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
- readb(rbtx4938_fpga_rev_addr),
- readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
-}
-
-static void __init rbtx4938_ne_init(void)
-{
- struct resource res[] = {
- {
- .start = RBTX4938_RTL_8019_BASE,
- .end = RBTX4938_RTL_8019_BASE + 0x20 - 1,
- .flags = IORESOURCE_IO,
- }, {
- .start = RBTX4938_RTL_8019_IRQ,
- .flags = IORESOURCE_IRQ,
- }
- };
- platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
-}
-
-static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
-
-static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset,
- int value)
-{
- u8 val;
- unsigned long flags;
- spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags);
- val = readb(rbtx4938_spics_addr);
- if (value)
- val |= 1 << offset;
- else
- val &= ~(1 << offset);
- writeb(val, rbtx4938_spics_addr);
- mmiowb();
- spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags);
-}
-
-static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip,
- unsigned int offset, int value)
-{
- rbtx4938_spi_gpio_set(chip, offset, value);
- return 0;
-}
-
-static struct gpio_chip rbtx4938_spi_gpio_chip = {
- .set = rbtx4938_spi_gpio_set,
- .direction_output = rbtx4938_spi_gpio_dir_out,
- .label = "RBTX4938-SPICS",
- .base = 16,
- .ngpio = 3,
-};
-
-static int __init rbtx4938_spi_init(void)
-{
- struct spi_board_info srtc_info = {
- .modalias = "rtc-rs5c348",
- .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */
- .bus_num = 0,
- .chip_select = 16 + SRTC_CS,
- /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */
- .mode = SPI_MODE_1 | SPI_CS_HIGH,
- };
- spi_register_board_info(&srtc_info, 1);
- spi_eeprom_register(SPI_BUSNO, SEEPROM1_CS, 128);
- spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM2_CS, 128);
- spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM3_CS, 128);
- gpio_request(16 + SRTC_CS, "rtc-rs5c348");
- gpio_direction_output(16 + SRTC_CS, 0);
- gpio_request(SEEPROM1_CS, "seeprom1");
- gpio_direction_output(SEEPROM1_CS, 1);
- gpio_request(16 + SEEPROM2_CS, "seeprom2");
- gpio_direction_output(16 + SEEPROM2_CS, 1);
- gpio_request(16 + SEEPROM3_CS, "seeprom3");
- gpio_direction_output(16 + SEEPROM3_CS, 1);
- tx4938_spi_init(SPI_BUSNO);
- return 0;
-}
-
-static void __init rbtx4938_mtd_init(void)
-{
- struct physmap_flash_data pdata = {
- .width = 4,
- };
-
- switch (readb(rbtx4938_bdipsw_addr) & 7) {
- case 0:
- /* Boot */
- txx9_physmap_flash_init(0, 0x1fc00000, 0x400000, &pdata);
- /* System */
- txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata);
- break;
- case 1:
- /* System */
- txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata);
- /* Boot */
- txx9_physmap_flash_init(1, 0x1ec00000, 0x400000, &pdata);
- break;
- case 2:
- /* Ext */
- txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata);
- /* System */
- txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata);
- /* Boot */
- txx9_physmap_flash_init(2, 0x1dc00000, 0x400000, &pdata);
- break;
- case 3:
- /* Boot */
- txx9_physmap_flash_init(1, 0x1bc00000, 0x400000, &pdata);
- /* System */
- txx9_physmap_flash_init(2, 0x1a000000, 0x1000000, &pdata);
- break;
- }
-}
-
-static void __init rbtx4938_arch_init(void)
-{
- txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, TX4938_NUM_PIO);
- gpiochip_add_data(&rbtx4938_spi_gpio_chip, NULL);
- rbtx4938_pci_setup();
- rbtx4938_spi_init();
-}
-
-static void __init rbtx4938_device_init(void)
-{
- rbtx4938_ethaddr_init();
- rbtx4938_ne_init();
- tx4938_wdt_init();
- rbtx4938_mtd_init();
- /* TC58DVM82A1FT: tDH=10ns, tWP=tRP=tREADID=35ns */
- tx4938_ndfmc_init(10, 35);
- tx4938_ata_init(RBTX4938_IRQ_IOC_ATA, 0, 1);
- tx4938_dmac_init(0, 2);
- tx4938_aclc_init();
- platform_device_register_simple("txx9aclc-generic", -1, NULL, 0);
- tx4938_sramc_init();
- txx9_iocled_init(RBTX4938_LED_ADDR - IO_BASE, -1, 8, 1, "green", NULL);
-}
-
-struct txx9_board_vec rbtx4938_vec __initdata = {
- .system = "Toshiba RBTX4938",
- .prom_init = rbtx4938_prom_init,
- .mem_setup = rbtx4938_mem_setup,
- .irq_setup = rbtx4938_irq_setup,
- .time_init = rbtx4938_time_init,
- .device_init = rbtx4938_device_init,
- .arch_init = rbtx4938_arch_init,
-#ifdef CONFIG_PCI
- .pci_map_irq = rbtx4938_pci_map_irq,
-#endif
-};
diff --git a/arch/mips/txx9/rbtx4939/Makefile b/arch/mips/txx9/rbtx4939/Makefile
deleted file mode 100644
index 840496e7a76e..000000000000
--- a/arch/mips/txx9/rbtx4939/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-y += irq.o setup.o prom.o
diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c
deleted file mode 100644
index 69a80616f0c9..000000000000
--- a/arch/mips/txx9/rbtx4939/irq.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Toshiba RBTX4939 interrupt routines
- * Based on linux/arch/mips/txx9/rbtx4938/irq.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/txx9/rbtx4939.h>
-
-/*
- * RBTX4939 IOC controller definition
- */
-
-static void rbtx4939_ioc_irq_unmask(struct irq_data *d)
-{
- int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
-
- writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr);
-}
-
-static void rbtx4939_ioc_irq_mask(struct irq_data *d)
-{
- int ioc_nr = d->irq - RBTX4939_IRQ_IOC;
-
- writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr);
- mmiowb();
-}
-
-static struct irq_chip rbtx4939_ioc_irq_chip = {
- .name = "IOC",
- .irq_mask = rbtx4939_ioc_irq_mask,
- .irq_unmask = rbtx4939_ioc_irq_unmask,
-};
-
-
-static inline int rbtx4939_ioc_irqroute(void)
-{
- unsigned char istat = readb(rbtx4939_ifac2_addr);
-
- if (unlikely(istat == 0))
- return -1;
- return RBTX4939_IRQ_IOC + __fls8(istat);
-}
-
-static int rbtx4939_irq_dispatch(int pending)
-{
- int irq;
-
- if (pending & CAUSEF_IP7)
- return MIPS_CPU_IRQ_BASE + 7;
- irq = tx4939_irq();
- if (likely(irq >= 0)) {
- /* redirect IOC interrupts */
- switch (irq) {
- case RBTX4939_IRQ_IOCINT:
- irq = rbtx4939_ioc_irqroute();
- break;
- }
- } else if (pending & CAUSEF_IP0)
- irq = MIPS_CPU_IRQ_BASE + 0;
- else if (pending & CAUSEF_IP1)
- irq = MIPS_CPU_IRQ_BASE + 1;
- else
- irq = -1;
- return irq;
-}
-
-void __init rbtx4939_irq_setup(void)
-{
- int i;
-
- /* mask all IOC interrupts */
- writeb(0, rbtx4939_ien_addr);
-
- /* clear SoftInt interrupts */
- writeb(0, rbtx4939_softint_addr);
-
- txx9_irq_dispatch = rbtx4939_irq_dispatch;
-
- tx4939_irq_init();
- for (i = RBTX4939_IRQ_IOC;
- i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++)
- irq_set_chip_and_handler(i, &rbtx4939_ioc_irq_chip,
- handle_level_irq);
-
- irq_set_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq);
-}
diff --git a/arch/mips/txx9/rbtx4939/prom.c b/arch/mips/txx9/rbtx4939/prom.c
deleted file mode 100644
index ba25ba1bd2ec..000000000000
--- a/arch/mips/txx9/rbtx4939/prom.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * rbtx4939 specific prom routines
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/init.h>
-#include <linux/memblock.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/rbtx4939.h>
-
-void __init rbtx4939_prom_init(void)
-{
- unsigned long start, size;
- u64 win;
- int i;
-
- for (i = 0; i < 4; i++) {
- if (!((__u32)____raw_readq(&tx4939_ddrcptr->winen) & (1 << i)))
- continue;
- win = ____raw_readq(&tx4939_ddrcptr->win[i]);
- start = (unsigned long)(win >> 48);
- size = (((unsigned long)(win >> 32) & 0xffff) + 1) - start;
- memblock_add(start << 20, size << 20);
- }
- txx9_sio_putchar_init(TX4939_SIO_REG(0) & 0xfffffffffULL);
-}
diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c
deleted file mode 100644
index ef29a9c2ffd6..000000000000
--- a/arch/mips/txx9/rbtx4939/setup.c
+++ /dev/null
@@ -1,554 +0,0 @@
-/*
- * Toshiba RBTX4939 setup routines.
- * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
- * and RBTX49xx patch from CELF patch archive.
- *
- * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/export.h>
-#include <linux/platform_device.h>
-#include <linux/leds.h>
-#include <linux/interrupt.h>
-#include <linux/smc91x.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/map.h>
-#include <asm/reboot.h>
-#include <asm/txx9/generic.h>
-#include <asm/txx9/pci.h>
-#include <asm/txx9/rbtx4939.h>
-
-static void rbtx4939_machine_restart(char *command)
-{
- local_irq_disable();
- writeb(1, rbtx4939_reseten_addr);
- writeb(1, rbtx4939_softreset_addr);
- while (1)
- ;
-}
-
-static void __init rbtx4939_time_init(void)
-{
- tx4939_time_init(0);
-}
-
-#if defined(__BIG_ENDIAN) && IS_ENABLED(CONFIG_SMC91X)
-#define HAVE_RBTX4939_IOSWAB
-#define IS_CE1_ADDR(addr) \
- ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))
-static u16 rbtx4939_ioswabw(volatile u16 *a, u16 x)
-{
- return IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
-}
-static u16 rbtx4939_mem_ioswabw(volatile u16 *a, u16 x)
-{
- return !IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
-}
-#endif /* __BIG_ENDIAN && CONFIG_SMC91X */
-
-static void __init rbtx4939_pci_setup(void)
-{
-#ifdef CONFIG_PCI
- int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB);
- struct pci_controller *c = &txx9_primary_pcic;
-
- register_pci_controller(c);
-
- tx4939_report_pciclk();
- tx4927_pcic_setup(tx4939_pcicptr, c, extarb);
- if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) &&
- (__raw_readq(&tx4939_ccfgptr->pcfg) &
- (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) {
- tx4939_report_pci1clk();
-
- /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
- c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
- register_pci_controller(c);
- tx4927_pcic_setup(tx4939_pcic1ptr, c, 0);
- }
-
- tx4939_setup_pcierr_irq();
-#endif /* CONFIG_PCI */
-}
-
-static unsigned long long default_ebccr[] __initdata = {
- 0x01c0000000007608ULL, /* 64M ROM */
- 0x017f000000007049ULL, /* 1M IOC */
- 0x0180000000408608ULL, /* ISA */
- 0,
-};
-
-static void __init rbtx4939_ebusc_setup(void)
-{
- int i;
- unsigned int sp;
-
- /* use user-configured speed */
- sp = TX4939_EBUSC_CR(0) & 0x30;
- default_ebccr[0] |= sp;
- default_ebccr[1] |= sp;
- default_ebccr[2] |= sp;
- /* initialise by myself */
- for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) {
- if (default_ebccr[i])
- ____raw_writeq(default_ebccr[i],
- &tx4939_ebuscptr->cr[i]);
- else
- ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
- & ~8,
- &tx4939_ebuscptr->cr[i]);
- }
-}
-
-static void __init rbtx4939_update_ioc_pen(void)
-{
- __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
- __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg);
- __u8 pe1 = readb(rbtx4939_pe1_addr);
- __u8 pe2 = readb(rbtx4939_pe2_addr);
- __u8 pe3 = readb(rbtx4939_pe3_addr);
- if (pcfg & TX4939_PCFG_ATA0MODE)
- pe1 |= RBTX4939_PE1_ATA(0);
- else
- pe1 &= ~RBTX4939_PE1_ATA(0);
- if (pcfg & TX4939_PCFG_ATA1MODE) {
- pe1 |= RBTX4939_PE1_ATA(1);
- pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
- } else {
- pe1 &= ~RBTX4939_PE1_ATA(1);
- if (pcfg & TX4939_PCFG_ET0MODE)
- pe1 |= RBTX4939_PE1_RMII(0);
- else
- pe1 &= ~RBTX4939_PE1_RMII(0);
- if (pcfg & TX4939_PCFG_ET1MODE)
- pe1 |= RBTX4939_PE1_RMII(1);
- else
- pe1 &= ~RBTX4939_PE1_RMII(1);
- }
- if (ccfg & TX4939_CCFG_PTSEL)
- pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
- RBTX4939_PE3_VP_S);
- else {
- __u64 vmode = pcfg &
- (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE);
- if (vmode == 0)
- pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
- RBTX4939_PE3_VP_S);
- else if (vmode == TX4939_PCFG_VPSMODE) {
- pe3 |= RBTX4939_PE3_VP_P;
- pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S);
- } else if (vmode == TX4939_PCFG_VSSMODE) {
- pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S;
- pe3 &= ~RBTX4939_PE3_VP_P;
- } else {
- pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P;
- pe3 &= ~RBTX4939_PE3_VP_S;
- }
- }
- if (pcfg & TX4939_PCFG_SPIMODE) {
- if (pcfg & TX4939_PCFG_SIO2MODE_GPIO)
- pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0);
- else {
- if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) {
- pe2 |= RBTX4939_PE2_SIO2;
- pe2 &= ~RBTX4939_PE2_SIO0;
- } else {
- pe2 |= RBTX4939_PE2_SIO0;
- pe2 &= ~RBTX4939_PE2_SIO2;
- }
- }
- if (pcfg & TX4939_PCFG_SIO3MODE)
- pe2 |= RBTX4939_PE2_SIO3;
- else
- pe2 &= ~RBTX4939_PE2_SIO3;
- pe2 &= ~RBTX4939_PE2_SPI;
- } else {
- pe2 |= RBTX4939_PE2_SPI;
- pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 |
- RBTX4939_PE2_SIO0);
- }
- if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO)
- pe2 |= RBTX4939_PE2_GPIO;
- else
- pe2 &= ~RBTX4939_PE2_GPIO;
- writeb(pe1, rbtx4939_pe1_addr);
- writeb(pe2, rbtx4939_pe2_addr);
- writeb(pe3, rbtx4939_pe3_addr);
-}
-
-#define RBTX4939_MAX_7SEGLEDS 8
-
-#if IS_BUILTIN(CONFIG_LEDS_CLASS)
-static u8 led_val[RBTX4939_MAX_7SEGLEDS];
-struct rbtx4939_led_data {
- struct led_classdev cdev;
- char name[32];
- unsigned int num;
-};
-
-/* Use "dot" in 7seg LEDs */
-static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev,
- enum led_brightness value)
-{
- struct rbtx4939_led_data *led_dat =
- container_of(led_cdev, struct rbtx4939_led_data, cdev);
- unsigned int num = led_dat->num;
- unsigned long flags;
-
- local_irq_save(flags);
- led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0);
- writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4));
- local_irq_restore(flags);
-}
-
-static int __init rbtx4939_led_probe(struct platform_device *pdev)
-{
- struct rbtx4939_led_data *leds_data;
- int i;
- static char *default_triggers[] __initdata = {
- "heartbeat",
- "disk-activity",
- "nand-disk",
- };
-
- leds_data = kcalloc(RBTX4939_MAX_7SEGLEDS, sizeof(*leds_data),
- GFP_KERNEL);
- if (!leds_data)
- return -ENOMEM;
- for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) {
- int rc;
- struct rbtx4939_led_data *led_dat = &leds_data[i];
-
- led_dat->num = i;
- led_dat->cdev.brightness_set = rbtx4939_led_brightness_set;
- sprintf(led_dat->name, "rbtx4939:amber:%u", i);
- led_dat->cdev.name = led_dat->name;
- if (i < ARRAY_SIZE(default_triggers))
- led_dat->cdev.default_trigger = default_triggers[i];
- rc = led_classdev_register(&pdev->dev, &led_dat->cdev);
- if (rc < 0)
- return rc;
- led_dat->cdev.brightness_set(&led_dat->cdev, 0);
- }
- return 0;
-
-}
-
-static struct platform_driver rbtx4939_led_driver = {
- .driver = {
- .name = "rbtx4939-led",
- },
-};
-
-static void __init rbtx4939_led_setup(void)
-{
- platform_device_register_simple("rbtx4939-led", -1, NULL, 0);
- platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe);
-}
-#else
-static inline void rbtx4939_led_setup(void)
-{
-}
-#endif
-
-static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
-{
-#if IS_BUILTIN(CONFIG_LEDS_CLASS)
- unsigned long flags;
- local_irq_save(flags);
- /* bit7: reserved for LED class */
- led_val[pos] = (led_val[pos] & 0x80) | (val & 0x7f);
- val = led_val[pos];
- local_irq_restore(flags);
-#endif
- writeb(val, rbtx4939_7seg_addr(pos / 4, pos % 4));
-}
-
-static void rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
-{
- /* convert from map_to_seg7() notation */
- val = (val & 0x88) |
- ((val & 0x40) >> 6) |
- ((val & 0x20) >> 4) |
- ((val & 0x10) >> 2) |
- ((val & 0x04) << 2) |
- ((val & 0x02) << 4) |
- ((val & 0x01) << 6);
- __rbtx4939_7segled_putc(pos, val);
-}
-
-#if IS_ENABLED(CONFIG_MTD_RBTX4939)
-/* special mapping for boot rom */
-static unsigned long rbtx4939_flash_fixup_ofs(unsigned long ofs)
-{
- u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
- unsigned char shift;
-
- if (bdipsw & 8) {
- /* BOOT Mode: USER ROM1 / USER ROM2 */
- shift = bdipsw & 3;
- /* rotate A[23:22] */
- return (ofs & ~0xc00000) | ((((ofs >> 22) + shift) & 3) << 22);
- }
-#ifdef __BIG_ENDIAN
- if (bdipsw == 0)
- /* BOOT Mode: Monitor ROM */
- ofs ^= 0x400000; /* swap A[22] */
-#endif
- return ofs;
-}
-
-static map_word rbtx4939_flash_read16(struct map_info *map, unsigned long ofs)
-{
- map_word r;
-
- ofs = rbtx4939_flash_fixup_ofs(ofs);
- r.x[0] = __raw_readw(map->virt + ofs);
- return r;
-}
-
-static void rbtx4939_flash_write16(struct map_info *map, const map_word datum,
- unsigned long ofs)
-{
- ofs = rbtx4939_flash_fixup_ofs(ofs);
- __raw_writew(datum.x[0], map->virt + ofs);
- mb(); /* see inline_map_write() in mtd/map.h */
-}
-
-static void rbtx4939_flash_copy_from(struct map_info *map, void *to,
- unsigned long from, ssize_t len)
-{
- u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
- unsigned char shift;
- ssize_t curlen;
-
- from += (unsigned long)map->virt;
- if (bdipsw & 8) {
- /* BOOT Mode: USER ROM1 / USER ROM2 */
- shift = bdipsw & 3;
- while (len) {
- curlen = min_t(unsigned long, len,
- 0x400000 - (from & (0x400000 - 1)));
- memcpy(to,
- (void *)((from & ~0xc00000) |
- ((((from >> 22) + shift) & 3) << 22)),
- curlen);
- len -= curlen;
- from += curlen;
- to += curlen;
- }
- return;
- }
-#ifdef __BIG_ENDIAN
- if (bdipsw == 0) {
- /* BOOT Mode: Monitor ROM */
- while (len) {
- curlen = min_t(unsigned long, len,
- 0x400000 - (from & (0x400000 - 1)));
- memcpy(to, (void *)(from ^ 0x400000), curlen);
- len -= curlen;
- from += curlen;
- to += curlen;
- }
- return;
- }
-#endif
- memcpy(to, (void *)from, len);
-}
-
-static void rbtx4939_flash_map_init(struct map_info *map)
-{
- map->read = rbtx4939_flash_read16;
- map->write = rbtx4939_flash_write16;
- map->copy_from = rbtx4939_flash_copy_from;
-}
-
-static void __init rbtx4939_mtd_init(void)
-{
- static struct {
- struct platform_device dev;
- struct resource res;
- struct rbtx4939_flash_data data;
- } pdevs[4];
- int i;
- static char names[4][8];
- static struct mtd_partition parts[4];
- struct rbtx4939_flash_data *boot_pdata = &pdevs[0].data;
- u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
-
- if (bdipsw & 8) {
- /* BOOT Mode: USER ROM1 / USER ROM2 */
- boot_pdata->nr_parts = 4;
- for (i = 0; i < boot_pdata->nr_parts; i++) {
- sprintf(names[i], "img%d", 4 - i);
- parts[i].name = names[i];
- parts[i].size = 0x400000;
- parts[i].offset = MTDPART_OFS_NXTBLK;
- }
- } else if (bdipsw == 0) {
- /* BOOT Mode: Monitor ROM */
- boot_pdata->nr_parts = 2;
- strcpy(names[0], "big");
- strcpy(names[1], "little");
- for (i = 0; i < boot_pdata->nr_parts; i++) {
- parts[i].name = names[i];
- parts[i].size = 0x400000;
- parts[i].offset = MTDPART_OFS_NXTBLK;
- }
- } else {
- /* BOOT Mode: ROM Emulator */
- boot_pdata->nr_parts = 2;
- parts[0].name = "boot";
- parts[0].offset = 0xc00000;
- parts[0].size = 0x400000;
- parts[1].name = "user";
- parts[1].offset = 0;
- parts[1].size = 0xc00000;
- }
- boot_pdata->parts = parts;
- boot_pdata->map_init = rbtx4939_flash_map_init;
-
- for (i = 0; i < ARRAY_SIZE(pdevs); i++) {
- struct resource *r = &pdevs[i].res;
- struct platform_device *dev = &pdevs[i].dev;
-
- r->start = 0x1f000000 - i * 0x1000000;
- r->end = r->start + 0x1000000 - 1;
- r->flags = IORESOURCE_MEM;
- pdevs[i].data.width = 2;
- dev->num_resources = 1;
- dev->resource = r;
- dev->id = i;
- dev->name = "rbtx4939-flash";
- dev->dev.platform_data = &pdevs[i].data;
- platform_device_register(dev);
- }
-}
-#else
-static void __init rbtx4939_mtd_init(void)
-{
-}
-#endif
-
-static void __init rbtx4939_arch_init(void)
-{
- rbtx4939_pci_setup();
-}
-
-static void __init rbtx4939_device_init(void)
-{
- unsigned long smc_addr = RBTX4939_ETHER_ADDR - IO_BASE;
- struct resource smc_res[] = {
- {
- .start = smc_addr,
- .end = smc_addr + 0x10 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = RBTX4939_IRQ_ETHER,
- /* override default irq flag defined in smc91x.h */
- .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
- },
- };
- struct smc91x_platdata smc_pdata = {
- .flags = SMC91X_USE_16BIT,
- };
- struct platform_device *pdev;
-#if IS_ENABLED(CONFIG_TC35815)
- int i, j;
- unsigned char ethaddr[2][6];
- u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
-
- for (i = 0; i < 2; i++) {
- unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
- if (bdipsw == 0)
- memcpy(ethaddr[i], (void *)area, 6);
- else {
- u16 buf[3];
- if (bdipsw & 8)
- area -= 0x03000000;
- else
- area -= 0x01000000;
- for (j = 0; j < 3; j++)
- buf[j] = le16_to_cpup((u16 *)(area + j * 2));
- memcpy(ethaddr[i], buf, 6);
- }
- }
- tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
-#endif
- pdev = platform_device_alloc("smc91x", -1);
- if (!pdev ||
- platform_device_add_resources(pdev, smc_res, ARRAY_SIZE(smc_res)) ||
- platform_device_add_data(pdev, &smc_pdata, sizeof(smc_pdata)) ||
- platform_device_add(pdev))
- platform_device_put(pdev);
- rbtx4939_mtd_init();
- /* TC58DVM82A1FT: tDH=10ns, tWP=tRP=tREADID=35ns */
- tx4939_ndfmc_init(10, 35,
- (1 << 1) | (1 << 2),
- (1 << 2)); /* ch1:8bit, ch2:16bit */
- rbtx4939_led_setup();
- tx4939_wdt_init();
- tx4939_ata_init();
- tx4939_rtc_init();
- tx4939_dmac_init(0, 2);
- tx4939_aclc_init();
- platform_device_register_simple("txx9aclc-generic", -1, NULL, 0);
- tx4939_sramc_init();
- tx4939_rng_init();
-}
-
-static void __init rbtx4939_setup(void)
-{
- int i;
-
- rbtx4939_ebusc_setup();
- /* always enable ATA0 */
- txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
- if (txx9_master_clock == 0)
- txx9_master_clock = 20000000;
- tx4939_setup();
- rbtx4939_update_ioc_pen();
-#ifdef HAVE_RBTX4939_IOSWAB
- ioswabw = rbtx4939_ioswabw;
- __mem_ioswabw = rbtx4939_mem_ioswabw;
-#endif
-
- _machine_restart = rbtx4939_machine_restart;
-
- txx9_7segled_init(RBTX4939_MAX_7SEGLEDS, rbtx4939_7segled_putc);
- for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++)
- txx9_7segled_putc(i, '-');
- pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
- readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
- readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
-
-#ifdef CONFIG_PCI
- txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
- txx9_board_pcibios_setup = tx4927_pcibios_setup;
-#else
- set_io_port_base(RBTX4939_ETHER_BASE);
-#endif
-
- tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0);
-}
-
-struct txx9_board_vec rbtx4939_vec __initdata = {
- .system = "Toshiba RBTX4939",
- .prom_init = rbtx4939_prom_init,
- .mem_setup = rbtx4939_setup,
- .irq_setup = rbtx4939_irq_setup,
- .time_init = rbtx4939_time_init,
- .device_init = rbtx4939_device_init,
- .arch_init = rbtx4939_arch_init,
-#ifdef CONFIG_PCI
- .pci_map_irq = tx4939_pci_map_irq,
-#endif
-};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 7ff941e71b79..e4f8f8000db6 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1719,7 +1719,7 @@ config AR7_WDT
config TXX9_WDT
tristate "Toshiba TXx9 Watchdog Timer"
- depends on CPU_TX39XX || CPU_TX49XX || (MIPS && COMPILE_TEST)
+ depends on CPU_TX39XX || (MIPS && COMPILE_TEST)
select WATCHDOG_CORE
help
Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs.
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 02/10] net: tc35815: Drop support for TX49XX boards
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 01/10] MIPS: TX49xx: Drop support Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 03/10] net: 8390: " Thomas Bogendoerfer
` (11 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove support in network
drivers for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/net/ethernet/toshiba/tc35815.c | 29 --------------------------
1 file changed, 29 deletions(-)
diff --git a/drivers/net/ethernet/toshiba/tc35815.c b/drivers/net/ethernet/toshiba/tc35815.c
index 7a6e5ff8e5d4..d4712cd2e28c 100644
--- a/drivers/net/ethernet/toshiba/tc35815.c
+++ b/drivers/net/ethernet/toshiba/tc35815.c
@@ -687,39 +687,10 @@ static int tc_mii_init(struct net_device *dev)
return err;
}
-#ifdef CONFIG_CPU_TX49XX
-/*
- * Find a platform_device providing a MAC address. The platform code
- * should provide a "tc35815-mac" device with a MAC address in its
- * platform_data.
- */
-static int tc35815_mac_match(struct device *dev, const void *data)
-{
- struct platform_device *plat_dev = to_platform_device(dev);
- const struct pci_dev *pci_dev = data;
- unsigned int id = pci_dev->irq;
- return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
-}
-
static int tc35815_read_plat_dev_addr(struct net_device *dev)
{
- struct tc35815_local *lp = netdev_priv(dev);
- struct device *pd = bus_find_device(&platform_bus_type, NULL,
- lp->pci_dev, tc35815_mac_match);
- if (pd) {
- if (pd->platform_data)
- memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
- put_device(pd);
- return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
- }
return -ENODEV;
}
-#else
-static int tc35815_read_plat_dev_addr(struct net_device *dev)
-{
- return -ENODEV;
-}
-#endif
static int tc35815_init_dev_addr(struct net_device *dev)
{
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 03/10] net: 8390: Drop support for TX49XX boards
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 01/10] MIPS: TX49xx: Drop support Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 02/10] net: tc35815: Drop support for TX49XX boards Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 04/10] spi: txx9: Remove driver Thomas Bogendoerfer
` (10 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove support in network
drivers for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/net/ethernet/8390/Kconfig | 2 +-
drivers/net/ethernet/8390/ne.c | 7 +------
2 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/8390/Kconfig b/drivers/net/ethernet/8390/Kconfig
index 9f4b302fd2ce..6aecc4c199d0 100644
--- a/drivers/net/ethernet/8390/Kconfig
+++ b/drivers/net/ethernet/8390/Kconfig
@@ -101,7 +101,7 @@ config MCF8390
config NE2000
tristate "NE2000/NE1000 support"
- depends on (ISA || (Q40 && m) || MACH_TX49XX || ATARI_ETHERNEC)
+ depends on (ISA || (Q40 && m) || ATARI_ETHERNEC)
select CRC32
help
If you have a network (Ethernet) card of this type, say Y here.
diff --git a/drivers/net/ethernet/8390/ne.c b/drivers/net/ethernet/8390/ne.c
index e9756d0ea5b8..69110306badf 100644
--- a/drivers/net/ethernet/8390/ne.c
+++ b/drivers/net/ethernet/8390/ne.c
@@ -143,9 +143,6 @@ bad_clone_list[] __initdata = {
{"E-LAN100", "E-LAN200", {0x00, 0x00, 0x5d}}, /* Broken ne1000 clones */
{"PCM-4823", "PCM-4823", {0x00, 0xc0, 0x6c}}, /* Broken Advantech MoBo */
{"REALTEK", "RTL8019", {0x00, 0x00, 0xe8}}, /* no-name with Realtek chip */
-#ifdef CONFIG_MACH_TX49XX
- {"RBHMA4X00-RTL8019", "RBHMA4X00-RTL8019", {0x00, 0x60, 0x0a}}, /* Toshiba built-in */
-#endif
{"LCS-8834", "LCS-8836", {0x04, 0x04, 0x37}}, /* ShinyNet (SET) */
{NULL,}
};
@@ -164,9 +161,7 @@ bad_clone_list[] __initdata = {
#define NESM_START_PG 0x40 /* First page of TX buffer */
#define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */
-#if defined(CONFIG_MACH_TX49XX)
-# define DCR_VAL 0x48 /* 8-bit mode */
-#elif defined(CONFIG_ATARI) /* 8-bit mode on Atari, normal on Q40 */
+#if defined(CONFIG_ATARI) /* 8-bit mode on Atari, normal on Q40 */
# define DCR_VAL (MACH_IS_ATARI ? 0x48 : 0x49)
#else
# define DCR_VAL 0x49
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 04/10] spi: txx9: Remove driver
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (2 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 03/10] net: 8390: " Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 05/10] dma: tx49 removal Thomas Bogendoerfer
` (9 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove support SPI driver
for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/spi/Kconfig | 6 -
drivers/spi/Makefile | 1 -
drivers/spi/spi-txx9.c | 477 -----------------------------------------
3 files changed, 484 deletions(-)
delete mode 100644 drivers/spi/spi-txx9.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index aadaea052f51..7e9d91bbb996 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -885,12 +885,6 @@ config SPI_TOPCLIFF_PCH
This driver also supports the ML7213/ML7223/ML7831, a companion chip
for the Atom E6xx series and compatible with the Intel EG20T PCH.
-config SPI_TXX9
- tristate "Toshiba TXx9 SPI controller"
- depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST)
- help
- SPI driver for Toshiba TXx9 MIPS SoCs
-
config SPI_UNIPHIER
tristate "Socionext UniPhier SPI Controller"
depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 6fea5821662e..9578b40e7800 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -122,7 +122,6 @@ obj-$(CONFIG_SPI_TLE62X0) += spi-tle62x0.o
spi-thunderx-objs := spi-cavium.o spi-cavium-thunderx.o
obj-$(CONFIG_SPI_THUNDERX) += spi-thunderx.o
obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o
-obj-$(CONFIG_SPI_TXX9) += spi-txx9.o
obj-$(CONFIG_SPI_UNIPHIER) += spi-uniphier.o
obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o
obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o
diff --git a/drivers/spi/spi-txx9.c b/drivers/spi/spi-txx9.c
deleted file mode 100644
index 3606232f190f..000000000000
--- a/drivers/spi/spi-txx9.c
+++ /dev/null
@@ -1,477 +0,0 @@
-/*
- * TXx9 SPI controller driver.
- *
- * Based on linux/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- *
- * Convert to generic SPI framework - Atsushi Nemoto (anemo@mba.ocn.ne.jp)
- */
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/workqueue.h>
-#include <linux/spi/spi.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/gpio/machine.h>
-#include <linux/gpio/consumer.h>
-
-
-#define SPI_FIFO_SIZE 4
-#define SPI_MAX_DIVIDER 0xff /* Max. value for SPCR1.SER */
-#define SPI_MIN_DIVIDER 1 /* Min. value for SPCR1.SER */
-
-#define TXx9_SPMCR 0x00
-#define TXx9_SPCR0 0x04
-#define TXx9_SPCR1 0x08
-#define TXx9_SPFS 0x0c
-#define TXx9_SPSR 0x14
-#define TXx9_SPDR 0x18
-
-/* SPMCR : SPI Master Control */
-#define TXx9_SPMCR_OPMODE 0xc0
-#define TXx9_SPMCR_CONFIG 0x40
-#define TXx9_SPMCR_ACTIVE 0x80
-#define TXx9_SPMCR_SPSTP 0x02
-#define TXx9_SPMCR_BCLR 0x01
-
-/* SPCR0 : SPI Control 0 */
-#define TXx9_SPCR0_TXIFL_MASK 0xc000
-#define TXx9_SPCR0_RXIFL_MASK 0x3000
-#define TXx9_SPCR0_SIDIE 0x0800
-#define TXx9_SPCR0_SOEIE 0x0400
-#define TXx9_SPCR0_RBSIE 0x0200
-#define TXx9_SPCR0_TBSIE 0x0100
-#define TXx9_SPCR0_IFSPSE 0x0010
-#define TXx9_SPCR0_SBOS 0x0004
-#define TXx9_SPCR0_SPHA 0x0002
-#define TXx9_SPCR0_SPOL 0x0001
-
-/* SPSR : SPI Status */
-#define TXx9_SPSR_TBSI 0x8000
-#define TXx9_SPSR_RBSI 0x4000
-#define TXx9_SPSR_TBS_MASK 0x3800
-#define TXx9_SPSR_RBS_MASK 0x0700
-#define TXx9_SPSR_SPOE 0x0080
-#define TXx9_SPSR_IFSD 0x0008
-#define TXx9_SPSR_SIDLE 0x0004
-#define TXx9_SPSR_STRDY 0x0002
-#define TXx9_SPSR_SRRDY 0x0001
-
-
-struct txx9spi {
- struct work_struct work;
- spinlock_t lock; /* protect 'queue' */
- struct list_head queue;
- wait_queue_head_t waitq;
- void __iomem *membase;
- int baseclk;
- struct clk *clk;
- struct gpio_desc *last_chipselect;
- int last_chipselect_val;
-};
-
-static u32 txx9spi_rd(struct txx9spi *c, int reg)
-{
- return __raw_readl(c->membase + reg);
-}
-static void txx9spi_wr(struct txx9spi *c, u32 val, int reg)
-{
- __raw_writel(val, c->membase + reg);
-}
-
-static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c,
- int on, unsigned int cs_delay)
-{
- /*
- * The GPIO descriptor will track polarity inversion inside
- * gpiolib.
- */
- if (on) {
- /* deselect the chip with cs_change hint in last transfer */
- if (c->last_chipselect)
- gpiod_set_value(c->last_chipselect,
- !c->last_chipselect_val);
- c->last_chipselect = spi->cs_gpiod;
- c->last_chipselect_val = on;
- } else {
- c->last_chipselect = NULL;
- ndelay(cs_delay); /* CS Hold Time */
- }
- gpiod_set_value(spi->cs_gpiod, on);
- ndelay(cs_delay); /* CS Setup Time / CS Recovery Time */
-}
-
-static int txx9spi_setup(struct spi_device *spi)
-{
- struct txx9spi *c = spi_master_get_devdata(spi->master);
-
- if (!spi->max_speed_hz)
- return -EINVAL;
-
- /* deselect chip */
- spin_lock(&c->lock);
- txx9spi_cs_func(spi, c, 0, (NSEC_PER_SEC / 2) / spi->max_speed_hz);
- spin_unlock(&c->lock);
-
- return 0;
-}
-
-static irqreturn_t txx9spi_interrupt(int irq, void *dev_id)
-{
- struct txx9spi *c = dev_id;
-
- /* disable rx intr */
- txx9spi_wr(c, txx9spi_rd(c, TXx9_SPCR0) & ~TXx9_SPCR0_RBSIE,
- TXx9_SPCR0);
- wake_up(&c->waitq);
- return IRQ_HANDLED;
-}
-
-static void txx9spi_work_one(struct txx9spi *c, struct spi_message *m)
-{
- struct spi_device *spi = m->spi;
- struct spi_transfer *t;
- unsigned int cs_delay;
- unsigned int cs_change = 1;
- int status = 0;
- u32 mcr;
- u32 prev_speed_hz = 0;
- u8 prev_bits_per_word = 0;
-
- /* CS setup/hold/recovery time in nsec */
- cs_delay = 100 + (NSEC_PER_SEC / 2) / spi->max_speed_hz;
-
- mcr = txx9spi_rd(c, TXx9_SPMCR);
- if (unlikely((mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE)) {
- dev_err(&spi->dev, "Bad mode.\n");
- status = -EIO;
- goto exit;
- }
- mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR);
-
- /* enter config mode */
- txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
- txx9spi_wr(c, TXx9_SPCR0_SBOS
- | ((spi->mode & SPI_CPOL) ? TXx9_SPCR0_SPOL : 0)
- | ((spi->mode & SPI_CPHA) ? TXx9_SPCR0_SPHA : 0)
- | 0x08,
- TXx9_SPCR0);
-
- list_for_each_entry(t, &m->transfers, transfer_list) {
- const void *txbuf = t->tx_buf;
- void *rxbuf = t->rx_buf;
- u32 data;
- unsigned int len = t->len;
- unsigned int wsize;
- u32 speed_hz = t->speed_hz;
- u8 bits_per_word = t->bits_per_word;
-
- wsize = bits_per_word >> 3; /* in bytes */
-
- if (prev_speed_hz != speed_hz
- || prev_bits_per_word != bits_per_word) {
- int n = DIV_ROUND_UP(c->baseclk, speed_hz) - 1;
-
- n = clamp(n, SPI_MIN_DIVIDER, SPI_MAX_DIVIDER);
- /* enter config mode */
- txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR,
- TXx9_SPMCR);
- txx9spi_wr(c, (n << 8) | bits_per_word, TXx9_SPCR1);
- /* enter active mode */
- txx9spi_wr(c, mcr | TXx9_SPMCR_ACTIVE, TXx9_SPMCR);
-
- prev_speed_hz = speed_hz;
- prev_bits_per_word = bits_per_word;
- }
-
- if (cs_change)
- txx9spi_cs_func(spi, c, 1, cs_delay);
- cs_change = t->cs_change;
- while (len) {
- unsigned int count = SPI_FIFO_SIZE;
- int i;
- u32 cr0;
-
- if (len < count * wsize)
- count = len / wsize;
- /* now tx must be idle... */
- while (!(txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_SIDLE))
- cpu_relax();
- cr0 = txx9spi_rd(c, TXx9_SPCR0);
- cr0 &= ~TXx9_SPCR0_RXIFL_MASK;
- cr0 |= (count - 1) << 12;
- /* enable rx intr */
- cr0 |= TXx9_SPCR0_RBSIE;
- txx9spi_wr(c, cr0, TXx9_SPCR0);
- /* send */
- for (i = 0; i < count; i++) {
- if (txbuf) {
- data = (wsize == 1)
- ? *(const u8 *)txbuf
- : *(const u16 *)txbuf;
- txx9spi_wr(c, data, TXx9_SPDR);
- txbuf += wsize;
- } else
- txx9spi_wr(c, 0, TXx9_SPDR);
- }
- /* wait all rx data */
- wait_event(c->waitq,
- txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_RBSI);
- /* receive */
- for (i = 0; i < count; i++) {
- data = txx9spi_rd(c, TXx9_SPDR);
- if (rxbuf) {
- if (wsize == 1)
- *(u8 *)rxbuf = data;
- else
- *(u16 *)rxbuf = data;
- rxbuf += wsize;
- }
- }
- len -= count * wsize;
- }
- m->actual_length += t->len;
- spi_transfer_delay_exec(t);
-
- if (!cs_change)
- continue;
- if (t->transfer_list.next == &m->transfers)
- break;
- /* sometimes a short mid-message deselect of the chip
- * may be needed to terminate a mode or command
- */
- txx9spi_cs_func(spi, c, 0, cs_delay);
- }
-
-exit:
- m->status = status;
- if (m->complete)
- m->complete(m->context);
-
- /* normally deactivate chipselect ... unless no error and
- * cs_change has hinted that the next message will probably
- * be for this chip too.
- */
- if (!(status == 0 && cs_change))
- txx9spi_cs_func(spi, c, 0, cs_delay);
-
- /* enter config mode */
- txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
-}
-
-static void txx9spi_work(struct work_struct *work)
-{
- struct txx9spi *c = container_of(work, struct txx9spi, work);
- unsigned long flags;
-
- spin_lock_irqsave(&c->lock, flags);
- while (!list_empty(&c->queue)) {
- struct spi_message *m;
-
- m = container_of(c->queue.next, struct spi_message, queue);
- list_del_init(&m->queue);
- spin_unlock_irqrestore(&c->lock, flags);
-
- txx9spi_work_one(c, m);
-
- spin_lock_irqsave(&c->lock, flags);
- }
- spin_unlock_irqrestore(&c->lock, flags);
-}
-
-static int txx9spi_transfer(struct spi_device *spi, struct spi_message *m)
-{
- struct spi_master *master = spi->master;
- struct txx9spi *c = spi_master_get_devdata(master);
- struct spi_transfer *t;
- unsigned long flags;
-
- m->actual_length = 0;
-
- /* check each transfer's parameters */
- list_for_each_entry(t, &m->transfers, transfer_list) {
- if (!t->tx_buf && !t->rx_buf && t->len)
- return -EINVAL;
- }
-
- spin_lock_irqsave(&c->lock, flags);
- list_add_tail(&m->queue, &c->queue);
- schedule_work(&c->work);
- spin_unlock_irqrestore(&c->lock, flags);
-
- return 0;
-}
-
-/*
- * Chip select uses GPIO only, further the driver is using the chip select
- * numer (from the device tree "reg" property, and this can only come from
- * device tree since this i MIPS and there is no way to pass platform data) as
- * the GPIO number. As the platform has only one GPIO controller (the txx9 GPIO
- * chip) it is thus using the chip select number as an offset into that chip.
- * This chip has a maximum of 16 GPIOs 0..15 and this is what all platforms
- * register.
- *
- * We modernized this behaviour by explicitly converting that offset to an
- * offset on the GPIO chip using a GPIO descriptor machine table of the same
- * size as the txx9 GPIO chip with a 1-to-1 mapping of chip select to GPIO
- * offset.
- *
- * This is admittedly a hack, but it is countering the hack of using "reg" to
- * contain a GPIO offset when it should be using "cs-gpios" as the SPI bindings
- * state.
- */
-static struct gpiod_lookup_table txx9spi_cs_gpio_table = {
- .dev_id = "spi0",
- .table = {
- GPIO_LOOKUP_IDX("TXx9", 0, "cs", 0, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 1, "cs", 1, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 2, "cs", 2, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 3, "cs", 3, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 4, "cs", 4, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 5, "cs", 5, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 6, "cs", 6, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 7, "cs", 7, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 8, "cs", 8, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 9, "cs", 9, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 10, "cs", 10, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 11, "cs", 11, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 12, "cs", 12, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 13, "cs", 13, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 14, "cs", 14, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("TXx9", 15, "cs", 15, GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-static int txx9spi_probe(struct platform_device *dev)
-{
- struct spi_master *master;
- struct txx9spi *c;
- struct resource *res;
- int ret = -ENODEV;
- u32 mcr;
- int irq;
-
- master = spi_alloc_master(&dev->dev, sizeof(*c));
- if (!master)
- return ret;
- c = spi_master_get_devdata(master);
- platform_set_drvdata(dev, master);
-
- INIT_WORK(&c->work, txx9spi_work);
- spin_lock_init(&c->lock);
- INIT_LIST_HEAD(&c->queue);
- init_waitqueue_head(&c->waitq);
-
- c->clk = devm_clk_get(&dev->dev, "spi-baseclk");
- if (IS_ERR(c->clk)) {
- ret = PTR_ERR(c->clk);
- c->clk = NULL;
- goto exit;
- }
- ret = clk_prepare_enable(c->clk);
- if (ret) {
- c->clk = NULL;
- goto exit;
- }
- c->baseclk = clk_get_rate(c->clk);
- master->min_speed_hz = DIV_ROUND_UP(c->baseclk, SPI_MAX_DIVIDER + 1);
- master->max_speed_hz = c->baseclk / (SPI_MIN_DIVIDER + 1);
-
- res = platform_get_resource(dev, IORESOURCE_MEM, 0);
- c->membase = devm_ioremap_resource(&dev->dev, res);
- if (IS_ERR(c->membase))
- goto exit_busy;
-
- /* enter config mode */
- mcr = txx9spi_rd(c, TXx9_SPMCR);
- mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR);
- txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR);
-
- irq = platform_get_irq(dev, 0);
- if (irq < 0)
- goto exit_busy;
- ret = devm_request_irq(&dev->dev, irq, txx9spi_interrupt, 0,
- "spi_txx9", c);
- if (ret)
- goto exit;
-
- c->last_chipselect = NULL;
-
- dev_info(&dev->dev, "at %#llx, irq %d, %dMHz\n",
- (unsigned long long)res->start, irq,
- (c->baseclk + 500000) / 1000000);
-
- gpiod_add_lookup_table(&txx9spi_cs_gpio_table);
-
- /* the spi->mode bits understood by this driver: */
- master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA;
-
- master->bus_num = dev->id;
- master->setup = txx9spi_setup;
- master->transfer = txx9spi_transfer;
- master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */
- master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
- master->use_gpio_descriptors = true;
-
- ret = devm_spi_register_master(&dev->dev, master);
- if (ret)
- goto exit;
- return 0;
-exit_busy:
- ret = -EBUSY;
-exit:
- clk_disable_unprepare(c->clk);
- spi_master_put(master);
- return ret;
-}
-
-static int txx9spi_remove(struct platform_device *dev)
-{
- struct spi_master *master = platform_get_drvdata(dev);
- struct txx9spi *c = spi_master_get_devdata(master);
-
- flush_work(&c->work);
- clk_disable_unprepare(c->clk);
- return 0;
-}
-
-/* work with hotplug and coldplug */
-MODULE_ALIAS("platform:spi_txx9");
-
-static struct platform_driver txx9spi_driver = {
- .probe = txx9spi_probe,
- .remove = txx9spi_remove,
- .driver = {
- .name = "spi_txx9",
- },
-};
-
-static int __init txx9spi_init(void)
-{
- return platform_driver_register(&txx9spi_driver);
-}
-subsys_initcall(txx9spi_init);
-
-static void __exit txx9spi_exit(void)
-{
- platform_driver_unregister(&txx9spi_driver);
-}
-module_exit(txx9spi_exit);
-
-MODULE_DESCRIPTION("TXx9 SPI Driver");
-MODULE_LICENSE("GPL");
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 05/10] dma: tx49 removal
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (3 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 04/10] spi: txx9: Remove driver Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-06 6:18 ` Vinod Koul
2021-01-06 19:10 ` Joe Perches
2021-01-05 14:02 ` [PATCH 06/10] mtd: Remove drivers used by TX49xx Thomas Bogendoerfer
` (8 subsequent siblings)
13 siblings, 2 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/dma/Kconfig | 2 +-
drivers/dma/txx9dmac.h | 10 ----------
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index d242c7632621..22fedfb6f5f9 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -601,7 +601,7 @@ config S3C24XX_DMAC
config TXX9_DMAC
tristate "Toshiba TXx9 SoC DMA support"
- depends on MACH_TX49XX || MACH_TX39XX
+ depends on MACH_TX39XX
select DMA_ENGINE
help
Support the TXx9 SoC internal DMA controller. This can be
diff --git a/drivers/dma/txx9dmac.h b/drivers/dma/txx9dmac.h
index aa53eafb1519..4acf29f50a29 100644
--- a/drivers/dma/txx9dmac.h
+++ b/drivers/dma/txx9dmac.h
@@ -26,11 +26,6 @@
* DMA channel.
*/
-#ifdef CONFIG_MACH_TX49XX
-static inline bool txx9_dma_have_SMPCHN(void)
-{
- return true;
-}
#define TXX9_DMA_USE_SIMPLE_CHAIN
#else
static inline bool txx9_dma_have_SMPCHN(void)
@@ -40,13 +35,8 @@ static inline bool txx9_dma_have_SMPCHN(void)
#endif
#ifdef __LITTLE_ENDIAN
-#ifdef CONFIG_MACH_TX49XX
-#define CCR_LE TXX9_DMA_CCR_LE
-#define MCR_LE 0
-#else
#define CCR_LE 0
#define MCR_LE TXX9_DMA_MCR_LE
-#endif
#else
#define CCR_LE 0
#define MCR_LE 0
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 06/10] mtd: Remove drivers used by TX49xx
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (4 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 05/10] dma: tx49 removal Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:06 ` Miquel Raynal
2021-01-05 14:02 ` [PATCH 07/10] char: hw_random: Remove tx4939 driver Thomas Bogendoerfer
` (7 subsequent siblings)
13 siblings, 1 reply; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove MTD support for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/mtd/maps/Kconfig | 6 -
drivers/mtd/maps/Makefile | 1 -
drivers/mtd/maps/rbtx4939-flash.c | 133 -------
drivers/mtd/nand/raw/Kconfig | 7 -
drivers/mtd/nand/raw/Makefile | 1 -
drivers/mtd/nand/raw/txx9ndfmc.c | 423 -----------------------
include/linux/platform_data/txx9/ndfmc.h | 28 --
7 files changed, 599 deletions(-)
delete mode 100644 drivers/mtd/maps/rbtx4939-flash.c
delete mode 100644 drivers/mtd/nand/raw/txx9ndfmc.c
delete mode 100644 include/linux/platform_data/txx9/ndfmc.h
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 6650acbc961e..17579ce04922 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -380,12 +380,6 @@ config MTD_INTEL_VR_NOR
Map driver for a NOR flash bank located on the Expansion Bus of the
Intel Vermilion Range chipset.
-config MTD_RBTX4939
- tristate "Map driver for RBTX4939 board"
- depends on TOSHIBA_RBTX4939 && MTD_CFI && MTD_COMPLEX_MAPPINGS
- help
- Map driver for NOR flash chips on RBTX4939 board.
-
config MTD_PLATRAM
tristate "Map driver for platform device RAM (mtd-ram)"
select MTD_RAM
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 79f018cf412f..408a2217b0f2 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -43,6 +43,5 @@ obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
-obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o
obj-$(CONFIG_MTD_VMU) += vmu-flash.o
obj-$(CONFIG_MTD_LANTIQ) += lantiq-flash.o
diff --git a/drivers/mtd/maps/rbtx4939-flash.c b/drivers/mtd/maps/rbtx4939-flash.c
deleted file mode 100644
index 39c86c0b0ec1..000000000000
--- a/drivers/mtd/maps/rbtx4939-flash.c
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * rbtx4939-flash (based on physmap.c)
- *
- * This is a simplified physmap driver with map_init callback function.
- *
- * Copyright (C) 2009 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-#include <asm/txx9/rbtx4939.h>
-
-struct rbtx4939_flash_info {
- struct mtd_info *mtd;
- struct map_info map;
-};
-
-static int rbtx4939_flash_remove(struct platform_device *dev)
-{
- struct rbtx4939_flash_info *info;
-
- info = platform_get_drvdata(dev);
- if (!info)
- return 0;
-
- if (info->mtd) {
- mtd_device_unregister(info->mtd);
- map_destroy(info->mtd);
- }
- return 0;
-}
-
-static const char * const rom_probe_types[] = {
- "cfi_probe", "jedec_probe", NULL };
-
-static int rbtx4939_flash_probe(struct platform_device *dev)
-{
- struct rbtx4939_flash_data *pdata;
- struct rbtx4939_flash_info *info;
- struct resource *res;
- const char * const *probe_type;
- int err = 0;
- unsigned long size;
-
- pdata = dev_get_platdata(&dev->dev);
- if (!pdata)
- return -ENODEV;
-
- res = platform_get_resource(dev, IORESOURCE_MEM, 0);
- if (!res)
- return -ENODEV;
- info = devm_kzalloc(&dev->dev, sizeof(struct rbtx4939_flash_info),
- GFP_KERNEL);
- if (!info)
- return -ENOMEM;
-
- platform_set_drvdata(dev, info);
-
- size = resource_size(res);
- pr_notice("rbtx4939 platform flash device: %pR\n", res);
-
- if (!devm_request_mem_region(&dev->dev, res->start, size,
- dev_name(&dev->dev)))
- return -EBUSY;
-
- info->map.name = dev_name(&dev->dev);
- info->map.phys = res->start;
- info->map.size = size;
- info->map.bankwidth = pdata->width;
-
- info->map.virt = devm_ioremap(&dev->dev, info->map.phys, size);
- if (!info->map.virt)
- return -EBUSY;
-
- if (pdata->map_init)
- (*pdata->map_init)(&info->map);
- else
- simple_map_init(&info->map);
-
- probe_type = rom_probe_types;
- for (; !info->mtd && *probe_type; probe_type++)
- info->mtd = do_map_probe(*probe_type, &info->map);
- if (!info->mtd) {
- dev_err(&dev->dev, "map_probe failed\n");
- err = -ENXIO;
- goto err_out;
- }
- info->mtd->dev.parent = &dev->dev;
- err = mtd_device_register(info->mtd, pdata->parts, pdata->nr_parts);
-
- if (err)
- goto err_out;
- return 0;
-
-err_out:
- rbtx4939_flash_remove(dev);
- return err;
-}
-
-#ifdef CONFIG_PM
-static void rbtx4939_flash_shutdown(struct platform_device *dev)
-{
- struct rbtx4939_flash_info *info = platform_get_drvdata(dev);
-
- if (mtd_suspend(info->mtd) == 0)
- mtd_resume(info->mtd);
-}
-#else
-#define rbtx4939_flash_shutdown NULL
-#endif
-
-static struct platform_driver rbtx4939_flash_driver = {
- .probe = rbtx4939_flash_probe,
- .remove = rbtx4939_flash_remove,
- .shutdown = rbtx4939_flash_shutdown,
- .driver = {
- .name = "rbtx4939-flash",
- },
-};
-
-module_platform_driver(rbtx4939_flash_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("RBTX4939 MTD map driver");
-MODULE_ALIAS("platform:rbtx4939-flash");
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 442a039b92f3..9e74a63b18a4 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -313,13 +313,6 @@ config MTD_NAND_DAVINCI
Enable the driver for NAND flash chips on Texas Instruments
DaVinci/Keystone processors.
-config MTD_NAND_TXX9NDFMC
- tristate "TXx9 NAND controller"
- depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST
- depends on HAS_IOMEM
- help
- This enables the NAND flash controller on the TXx9 SoCs.
-
config MTD_NAND_SOCRATES
tristate "Socrates NAND controller"
depends on SOCRATES
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index 32475a28d8f8..07cb86321403 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -37,7 +37,6 @@ obj-$(CONFIG_MTD_NAND_MLC_LPC32XX) += lpc32xx_mlc.o
obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o
obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o
obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o
-obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o
obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o
obj-$(CONFIG_MTD_NAND_RICOH) += r852.o
diff --git a/drivers/mtd/nand/raw/txx9ndfmc.c b/drivers/mtd/nand/raw/txx9ndfmc.c
deleted file mode 100644
index 1a9449e53bf9..000000000000
--- a/drivers/mtd/nand/raw/txx9ndfmc.c
+++ /dev/null
@@ -1,423 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * TXx9 NAND flash memory controller driver
- * Based on RBTX49xx patch from CELF patch archive.
- *
- * (C) Copyright TOSHIBA CORPORATION 2004-2007
- * All Rights Reserved.
- */
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/delay.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/rawnand.h>
-#include <linux/mtd/partitions.h>
-#include <linux/io.h>
-#include <linux/platform_data/txx9/ndfmc.h>
-
-/* TXX9 NDFMC Registers */
-#define TXX9_NDFDTR 0x00
-#define TXX9_NDFMCR 0x04
-#define TXX9_NDFSR 0x08
-#define TXX9_NDFISR 0x0c
-#define TXX9_NDFIMR 0x10
-#define TXX9_NDFSPR 0x14
-#define TXX9_NDFRSTR 0x18 /* not TX4939 */
-
-/* NDFMCR : NDFMC Mode Control */
-#define TXX9_NDFMCR_WE 0x80
-#define TXX9_NDFMCR_ECC_ALL 0x60
-#define TXX9_NDFMCR_ECC_RESET 0x60
-#define TXX9_NDFMCR_ECC_READ 0x40
-#define TXX9_NDFMCR_ECC_ON 0x20
-#define TXX9_NDFMCR_ECC_OFF 0x00
-#define TXX9_NDFMCR_CE 0x10
-#define TXX9_NDFMCR_BSPRT 0x04 /* TX4925/TX4926 only */
-#define TXX9_NDFMCR_ALE 0x02
-#define TXX9_NDFMCR_CLE 0x01
-/* TX4939 only */
-#define TXX9_NDFMCR_X16 0x0400
-#define TXX9_NDFMCR_DMAREQ_MASK 0x0300
-#define TXX9_NDFMCR_DMAREQ_NODMA 0x0000
-#define TXX9_NDFMCR_DMAREQ_128 0x0100
-#define TXX9_NDFMCR_DMAREQ_256 0x0200
-#define TXX9_NDFMCR_DMAREQ_512 0x0300
-#define TXX9_NDFMCR_CS_MASK 0x0c
-#define TXX9_NDFMCR_CS(ch) ((ch) << 2)
-
-/* NDFMCR : NDFMC Status */
-#define TXX9_NDFSR_BUSY 0x80
-/* TX4939 only */
-#define TXX9_NDFSR_DMARUN 0x40
-
-/* NDFMCR : NDFMC Reset */
-#define TXX9_NDFRSTR_RST 0x01
-
-struct txx9ndfmc_priv {
- struct platform_device *dev;
- struct nand_chip chip;
- int cs;
- const char *mtdname;
-};
-
-#define MAX_TXX9NDFMC_DEV 4
-struct txx9ndfmc_drvdata {
- struct mtd_info *mtds[MAX_TXX9NDFMC_DEV];
- void __iomem *base;
- unsigned char hold; /* in gbusclock */
- unsigned char spw; /* in gbusclock */
- struct nand_controller controller;
-};
-
-static struct platform_device *mtd_to_platdev(struct mtd_info *mtd)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct txx9ndfmc_priv *txx9_priv = nand_get_controller_data(chip);
- return txx9_priv->dev;
-}
-
-static void __iomem *ndregaddr(struct platform_device *dev, unsigned int reg)
-{
- struct txx9ndfmc_drvdata *drvdata = platform_get_drvdata(dev);
- struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev);
-
- return drvdata->base + (reg << plat->shift);
-}
-
-static u32 txx9ndfmc_read(struct platform_device *dev, unsigned int reg)
-{
- return __raw_readl(ndregaddr(dev, reg));
-}
-
-static void txx9ndfmc_write(struct platform_device *dev,
- u32 val, unsigned int reg)
-{
- __raw_writel(val, ndregaddr(dev, reg));
-}
-
-static uint8_t txx9ndfmc_read_byte(struct nand_chip *chip)
-{
- struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip));
-
- return txx9ndfmc_read(dev, TXX9_NDFDTR);
-}
-
-static void txx9ndfmc_write_buf(struct nand_chip *chip, const uint8_t *buf,
- int len)
-{
- struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip));
- void __iomem *ndfdtr = ndregaddr(dev, TXX9_NDFDTR);
- u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR);
-
- txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_WE, TXX9_NDFMCR);
- while (len--)
- __raw_writel(*buf++, ndfdtr);
- txx9ndfmc_write(dev, mcr, TXX9_NDFMCR);
-}
-
-static void txx9ndfmc_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
-{
- struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip));
- void __iomem *ndfdtr = ndregaddr(dev, TXX9_NDFDTR);
-
- while (len--)
- *buf++ = __raw_readl(ndfdtr);
-}
-
-static void txx9ndfmc_cmd_ctrl(struct nand_chip *chip, int cmd,
- unsigned int ctrl)
-{
- struct txx9ndfmc_priv *txx9_priv = nand_get_controller_data(chip);
- struct platform_device *dev = txx9_priv->dev;
- struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev);
-
- if (ctrl & NAND_CTRL_CHANGE) {
- u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR);
-
- mcr &= ~(TXX9_NDFMCR_CLE | TXX9_NDFMCR_ALE | TXX9_NDFMCR_CE);
- mcr |= ctrl & NAND_CLE ? TXX9_NDFMCR_CLE : 0;
- mcr |= ctrl & NAND_ALE ? TXX9_NDFMCR_ALE : 0;
- /* TXX9_NDFMCR_CE bit is 0:high 1:low */
- mcr |= ctrl & NAND_NCE ? TXX9_NDFMCR_CE : 0;
- if (txx9_priv->cs >= 0 && (ctrl & NAND_NCE)) {
- mcr &= ~TXX9_NDFMCR_CS_MASK;
- mcr |= TXX9_NDFMCR_CS(txx9_priv->cs);
- }
- txx9ndfmc_write(dev, mcr, TXX9_NDFMCR);
- }
- if (cmd != NAND_CMD_NONE)
- txx9ndfmc_write(dev, cmd & 0xff, TXX9_NDFDTR);
- if (plat->flags & NDFMC_PLAT_FLAG_DUMMYWRITE) {
- /* dummy write to update external latch */
- if ((ctrl & NAND_CTRL_CHANGE) && cmd == NAND_CMD_NONE)
- txx9ndfmc_write(dev, 0, TXX9_NDFDTR);
- }
-}
-
-static int txx9ndfmc_dev_ready(struct nand_chip *chip)
-{
- struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip));
-
- return !(txx9ndfmc_read(dev, TXX9_NDFSR) & TXX9_NDFSR_BUSY);
-}
-
-static int txx9ndfmc_calculate_ecc(struct nand_chip *chip, const uint8_t *dat,
- uint8_t *ecc_code)
-{
- struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip));
- int eccbytes;
- u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR);
-
- mcr &= ~TXX9_NDFMCR_ECC_ALL;
- txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR);
- txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_READ, TXX9_NDFMCR);
- for (eccbytes = chip->ecc.bytes; eccbytes > 0; eccbytes -= 3) {
- ecc_code[1] = txx9ndfmc_read(dev, TXX9_NDFDTR);
- ecc_code[0] = txx9ndfmc_read(dev, TXX9_NDFDTR);
- ecc_code[2] = txx9ndfmc_read(dev, TXX9_NDFDTR);
- ecc_code += 3;
- }
- txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR);
- return 0;
-}
-
-static int txx9ndfmc_correct_data(struct nand_chip *chip, unsigned char *buf,
- unsigned char *read_ecc,
- unsigned char *calc_ecc)
-{
- int eccsize;
- int corrected = 0;
- int stat;
-
- for (eccsize = chip->ecc.size; eccsize > 0; eccsize -= 256) {
- stat = rawnand_sw_hamming_correct(chip, buf, read_ecc,
- calc_ecc);
- if (stat < 0)
- return stat;
- corrected += stat;
- buf += 256;
- read_ecc += 3;
- calc_ecc += 3;
- }
- return corrected;
-}
-
-static void txx9ndfmc_enable_hwecc(struct nand_chip *chip, int mode)
-{
- struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip));
- u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR);
-
- mcr &= ~TXX9_NDFMCR_ECC_ALL;
- txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_RESET, TXX9_NDFMCR);
- txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR);
- txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_ON, TXX9_NDFMCR);
-}
-
-static void txx9ndfmc_initialize(struct platform_device *dev)
-{
- struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev);
- struct txx9ndfmc_drvdata *drvdata = platform_get_drvdata(dev);
- int tmout = 100;
-
- if (plat->flags & NDFMC_PLAT_FLAG_NO_RSTR)
- ; /* no NDFRSTR. Write to NDFSPR resets the NDFMC. */
- else {
- /* reset NDFMC */
- txx9ndfmc_write(dev,
- txx9ndfmc_read(dev, TXX9_NDFRSTR) |
- TXX9_NDFRSTR_RST,
- TXX9_NDFRSTR);
- while (txx9ndfmc_read(dev, TXX9_NDFRSTR) & TXX9_NDFRSTR_RST) {
- if (--tmout == 0) {
- dev_err(&dev->dev, "reset failed.\n");
- break;
- }
- udelay(1);
- }
- }
- /* setup Hold Time, Strobe Pulse Width */
- txx9ndfmc_write(dev, (drvdata->hold << 4) | drvdata->spw, TXX9_NDFSPR);
- txx9ndfmc_write(dev,
- (plat->flags & NDFMC_PLAT_FLAG_USE_BSPRT) ?
- TXX9_NDFMCR_BSPRT : 0, TXX9_NDFMCR);
-}
-
-#define TXX9NDFMC_NS_TO_CYC(gbusclk, ns) \
- DIV_ROUND_UP((ns) * DIV_ROUND_UP(gbusclk, 1000), 1000000)
-
-static int txx9ndfmc_attach_chip(struct nand_chip *chip)
-{
- struct mtd_info *mtd = nand_to_mtd(chip);
-
- if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
- return 0;
-
- chip->ecc.strength = 1;
-
- if (mtd->writesize >= 512) {
- chip->ecc.size = 512;
- chip->ecc.bytes = 6;
- } else {
- chip->ecc.size = 256;
- chip->ecc.bytes = 3;
- }
-
- chip->ecc.calculate = txx9ndfmc_calculate_ecc;
- chip->ecc.correct = txx9ndfmc_correct_data;
- chip->ecc.hwctl = txx9ndfmc_enable_hwecc;
-
- return 0;
-}
-
-static const struct nand_controller_ops txx9ndfmc_controller_ops = {
- .attach_chip = txx9ndfmc_attach_chip,
-};
-
-static int __init txx9ndfmc_probe(struct platform_device *dev)
-{
- struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev);
- int hold, spw;
- int i;
- struct txx9ndfmc_drvdata *drvdata;
- unsigned long gbusclk = plat->gbus_clock;
- struct resource *res;
-
- drvdata = devm_kzalloc(&dev->dev, sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata)
- return -ENOMEM;
- res = platform_get_resource(dev, IORESOURCE_MEM, 0);
- drvdata->base = devm_ioremap_resource(&dev->dev, res);
- if (IS_ERR(drvdata->base))
- return PTR_ERR(drvdata->base);
-
- hold = plat->hold ?: 20; /* tDH */
- spw = plat->spw ?: 90; /* max(tREADID, tWP, tRP) */
-
- hold = TXX9NDFMC_NS_TO_CYC(gbusclk, hold);
- spw = TXX9NDFMC_NS_TO_CYC(gbusclk, spw);
- if (plat->flags & NDFMC_PLAT_FLAG_HOLDADD)
- hold -= 2; /* actual hold time : (HOLD + 2) BUSCLK */
- spw -= 1; /* actual wait time : (SPW + 1) BUSCLK */
- hold = clamp(hold, 1, 15);
- drvdata->hold = hold;
- spw = clamp(spw, 1, 15);
- drvdata->spw = spw;
- dev_info(&dev->dev, "CLK:%ldMHz HOLD:%d SPW:%d\n",
- (gbusclk + 500000) / 1000000, hold, spw);
-
- nand_controller_init(&drvdata->controller);
- drvdata->controller.ops = &txx9ndfmc_controller_ops;
-
- platform_set_drvdata(dev, drvdata);
- txx9ndfmc_initialize(dev);
-
- for (i = 0; i < MAX_TXX9NDFMC_DEV; i++) {
- struct txx9ndfmc_priv *txx9_priv;
- struct nand_chip *chip;
- struct mtd_info *mtd;
-
- if (!(plat->ch_mask & (1 << i)))
- continue;
- txx9_priv = kzalloc(sizeof(struct txx9ndfmc_priv),
- GFP_KERNEL);
- if (!txx9_priv)
- continue;
- chip = &txx9_priv->chip;
- mtd = nand_to_mtd(chip);
- mtd->dev.parent = &dev->dev;
-
- chip->legacy.read_byte = txx9ndfmc_read_byte;
- chip->legacy.read_buf = txx9ndfmc_read_buf;
- chip->legacy.write_buf = txx9ndfmc_write_buf;
- chip->legacy.cmd_ctrl = txx9ndfmc_cmd_ctrl;
- chip->legacy.dev_ready = txx9ndfmc_dev_ready;
- chip->legacy.chip_delay = 100;
- chip->controller = &drvdata->controller;
-
- nand_set_controller_data(chip, txx9_priv);
- txx9_priv->dev = dev;
-
- if (plat->ch_mask != 1) {
- txx9_priv->cs = i;
- txx9_priv->mtdname = kasprintf(GFP_KERNEL, "%s.%u",
- dev_name(&dev->dev), i);
- } else {
- txx9_priv->cs = -1;
- txx9_priv->mtdname = kstrdup(dev_name(&dev->dev),
- GFP_KERNEL);
- }
- if (!txx9_priv->mtdname) {
- kfree(txx9_priv);
- dev_err(&dev->dev, "Unable to allocate MTD name.\n");
- continue;
- }
- if (plat->wide_mask & (1 << i))
- chip->options |= NAND_BUSWIDTH_16;
-
- if (nand_scan(chip, 1)) {
- kfree(txx9_priv->mtdname);
- kfree(txx9_priv);
- continue;
- }
- mtd->name = txx9_priv->mtdname;
-
- mtd_device_register(mtd, NULL, 0);
- drvdata->mtds[i] = mtd;
- }
-
- return 0;
-}
-
-static int __exit txx9ndfmc_remove(struct platform_device *dev)
-{
- struct txx9ndfmc_drvdata *drvdata = platform_get_drvdata(dev);
- int ret, i;
-
- if (!drvdata)
- return 0;
- for (i = 0; i < MAX_TXX9NDFMC_DEV; i++) {
- struct mtd_info *mtd = drvdata->mtds[i];
- struct nand_chip *chip;
- struct txx9ndfmc_priv *txx9_priv;
-
- if (!mtd)
- continue;
- chip = mtd_to_nand(mtd);
- txx9_priv = nand_get_controller_data(chip);
-
- ret = mtd_device_unregister(nand_to_mtd(chip));
- WARN_ON(ret);
- nand_cleanup(chip);
- kfree(txx9_priv->mtdname);
- kfree(txx9_priv);
- }
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int txx9ndfmc_resume(struct platform_device *dev)
-{
- if (platform_get_drvdata(dev))
- txx9ndfmc_initialize(dev);
- return 0;
-}
-#else
-#define txx9ndfmc_resume NULL
-#endif
-
-static struct platform_driver txx9ndfmc_driver = {
- .remove = __exit_p(txx9ndfmc_remove),
- .resume = txx9ndfmc_resume,
- .driver = {
- .name = "txx9ndfmc",
- },
-};
-
-module_platform_driver_probe(txx9ndfmc_driver, txx9ndfmc_probe);
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("TXx9 SoC NAND flash controller driver");
-MODULE_ALIAS("platform:txx9ndfmc");
diff --git a/include/linux/platform_data/txx9/ndfmc.h b/include/linux/platform_data/txx9/ndfmc.h
deleted file mode 100644
index 7aaa4cd34d31..000000000000
--- a/include/linux/platform_data/txx9/ndfmc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- *
- * (C) Copyright TOSHIBA CORPORATION 2007
- */
-#ifndef __TXX9_NDFMC_H
-#define __TXX9_NDFMC_H
-
-#define NDFMC_PLAT_FLAG_USE_BSPRT 0x01
-#define NDFMC_PLAT_FLAG_NO_RSTR 0x02
-#define NDFMC_PLAT_FLAG_HOLDADD 0x04
-#define NDFMC_PLAT_FLAG_DUMMYWRITE 0x08
-
-struct txx9ndfmc_platform_data {
- unsigned int shift;
- unsigned int gbus_clock;
- unsigned int hold; /* hold time in nanosecond */
- unsigned int spw; /* strobe pulse width in nanosecond */
- unsigned int flags;
- unsigned char ch_mask; /* available channel bitmask */
- unsigned char wp_mask; /* write-protect bitmask */
- unsigned char wide_mask; /* 16bit-nand bitmask */
-};
-
-void txx9_ndfmc_init(unsigned long baseaddr,
- const struct txx9ndfmc_platform_data *plat_data);
-
-#endif /* __TXX9_NDFMC_H */
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 07/10] char: hw_random: Remove tx4939 driver
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (5 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 06/10] mtd: Remove drivers used by TX49xx Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 08/10] rtc: tx4939: Remove driver Thomas Bogendoerfer
` (6 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove hw_random driver
for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/char/hw_random/Kconfig | 13 ---
drivers/char/hw_random/Makefile | 1 -
drivers/char/hw_random/tx4939-rng.c | 157 ----------------------------
3 files changed, 171 deletions(-)
delete mode 100644 drivers/char/hw_random/tx4939-rng.c
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 1fe006f3f12f..9d13d640384a 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -226,19 +226,6 @@ config HW_RANDOM_VIRTIO
To compile this driver as a module, choose M here: the
module will be called virtio-rng. If unsure, say N.
-config HW_RANDOM_TX4939
- tristate "TX4939 Random Number Generator support"
- depends on SOC_TX4939
- default HW_RANDOM
- help
- This driver provides kernel-side support for the Random Number
- Generator hardware found on TX4939 SoC.
-
- To compile this driver as a module, choose M here: the
- module will be called tx4939-rng.
-
- If unsure, say Y.
-
config HW_RANDOM_MXC_RNGA
tristate "Freescale i.MX RNGA Random Number Generator"
depends on SOC_IMX31
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 8933fada74f2..b2aa37162e24 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -20,7 +20,6 @@ obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
obj-$(CONFIG_HW_RANDOM_OMAP3_ROM) += omap3-rom-rng.o
obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
-obj-$(CONFIG_HW_RANDOM_TX4939) += tx4939-rng.o
obj-$(CONFIG_HW_RANDOM_MXC_RNGA) += mxc-rnga.o
obj-$(CONFIG_HW_RANDOM_IMX_RNGC) += imx-rngc.o
obj-$(CONFIG_HW_RANDOM_INGENIC_RNG) += ingenic-rng.o
diff --git a/drivers/char/hw_random/tx4939-rng.c b/drivers/char/hw_random/tx4939-rng.c
deleted file mode 100644
index c8bd34e740fd..000000000000
--- a/drivers/char/hw_random/tx4939-rng.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * RNG driver for TX4939 Random Number Generators (RNG)
- *
- * Copyright (C) 2009 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/err.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <linux/hw_random.h>
-#include <linux/gfp.h>
-
-#define TX4939_RNG_RCSR 0x00000000
-#define TX4939_RNG_ROR(n) (0x00000018 + (n) * 8)
-
-#define TX4939_RNG_RCSR_INTE 0x00000008
-#define TX4939_RNG_RCSR_RST 0x00000004
-#define TX4939_RNG_RCSR_FIN 0x00000002
-#define TX4939_RNG_RCSR_ST 0x00000001
-
-struct tx4939_rng {
- struct hwrng rng;
- void __iomem *base;
- u64 databuf[3];
- unsigned int data_avail;
-};
-
-static void rng_io_start(void)
-{
-#ifndef CONFIG_64BIT
- /*
- * readq is reading a 64-bit register using a 64-bit load. On
- * a 32-bit kernel however interrupts or any other processor
- * exception would clobber the upper 32-bit of the processor
- * register so interrupts need to be disabled.
- */
- local_irq_disable();
-#endif
-}
-
-static void rng_io_end(void)
-{
-#ifndef CONFIG_64BIT
- local_irq_enable();
-#endif
-}
-
-static u64 read_rng(void __iomem *base, unsigned int offset)
-{
- return ____raw_readq(base + offset);
-}
-
-static void write_rng(u64 val, void __iomem *base, unsigned int offset)
-{
- return ____raw_writeq(val, base + offset);
-}
-
-static int tx4939_rng_data_present(struct hwrng *rng, int wait)
-{
- struct tx4939_rng *rngdev = container_of(rng, struct tx4939_rng, rng);
- int i;
-
- if (rngdev->data_avail)
- return rngdev->data_avail;
- for (i = 0; i < 20; i++) {
- rng_io_start();
- if (!(read_rng(rngdev->base, TX4939_RNG_RCSR)
- & TX4939_RNG_RCSR_ST)) {
- rngdev->databuf[0] =
- read_rng(rngdev->base, TX4939_RNG_ROR(0));
- rngdev->databuf[1] =
- read_rng(rngdev->base, TX4939_RNG_ROR(1));
- rngdev->databuf[2] =
- read_rng(rngdev->base, TX4939_RNG_ROR(2));
- rngdev->data_avail =
- sizeof(rngdev->databuf) / sizeof(u32);
- /* Start RNG */
- write_rng(TX4939_RNG_RCSR_ST,
- rngdev->base, TX4939_RNG_RCSR);
- wait = 0;
- }
- rng_io_end();
- if (!wait)
- break;
- /* 90 bus clock cycles by default for generation */
- ndelay(90 * 5);
- }
- return rngdev->data_avail;
-}
-
-static int tx4939_rng_data_read(struct hwrng *rng, u32 *buffer)
-{
- struct tx4939_rng *rngdev = container_of(rng, struct tx4939_rng, rng);
-
- rngdev->data_avail--;
- *buffer = *((u32 *)&rngdev->databuf + rngdev->data_avail);
- return sizeof(u32);
-}
-
-static int __init tx4939_rng_probe(struct platform_device *dev)
-{
- struct tx4939_rng *rngdev;
- int i;
-
- rngdev = devm_kzalloc(&dev->dev, sizeof(*rngdev), GFP_KERNEL);
- if (!rngdev)
- return -ENOMEM;
- rngdev->base = devm_platform_ioremap_resource(dev, 0);
- if (IS_ERR(rngdev->base))
- return PTR_ERR(rngdev->base);
-
- rngdev->rng.name = dev_name(&dev->dev);
- rngdev->rng.data_present = tx4939_rng_data_present;
- rngdev->rng.data_read = tx4939_rng_data_read;
-
- rng_io_start();
- /* Reset RNG */
- write_rng(TX4939_RNG_RCSR_RST, rngdev->base, TX4939_RNG_RCSR);
- write_rng(0, rngdev->base, TX4939_RNG_RCSR);
- /* Start RNG */
- write_rng(TX4939_RNG_RCSR_ST, rngdev->base, TX4939_RNG_RCSR);
- rng_io_end();
- /*
- * Drop first two results. From the datasheet:
- * The quality of the random numbers generated immediately
- * after reset can be insufficient. Therefore, do not use
- * random numbers obtained from the first and second
- * generations; use the ones from the third or subsequent
- * generation.
- */
- for (i = 0; i < 2; i++) {
- rngdev->data_avail = 0;
- if (!tx4939_rng_data_present(&rngdev->rng, 1))
- return -EIO;
- }
-
- platform_set_drvdata(dev, rngdev);
- return devm_hwrng_register(&dev->dev, &rngdev->rng);
-}
-
-static struct platform_driver tx4939_rng_driver = {
- .driver = {
- .name = "tx4939-rng",
- },
-};
-
-module_platform_driver_probe(tx4939_rng_driver, tx4939_rng_probe);
-
-MODULE_DESCRIPTION("H/W Random Number Generator (RNG) driver for TX4939");
-MODULE_LICENSE("GPL");
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 08/10] rtc: tx4939: Remove driver
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (6 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 07/10] char: hw_random: Remove tx4939 driver Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 09/10] ide: tx4938ide: " Thomas Bogendoerfer
` (5 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove rtc driver for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/rtc/Kconfig | 7 -
drivers/rtc/Makefile | 1 -
drivers/rtc/rtc-tx4939.c | 303 ---------------------------------------
3 files changed, 311 deletions(-)
delete mode 100644 drivers/rtc/rtc-tx4939.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 6123f9f4fbc9..3b5510c9bffa 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1587,13 +1587,6 @@ config RTC_DRV_STARFIRE
If you say Y here you will get support for the RTC found on
Starfire systems.
-config RTC_DRV_TX4939
- tristate "TX4939 SoC"
- depends on SOC_TX4939 || COMPILE_TEST
- help
- Driver for the internal RTC (Realtime Clock) module found on
- Toshiba TX4939 SoC.
-
config RTC_DRV_MV
tristate "Marvell SoC RTC"
depends on ARCH_DOVE || ARCH_MVEBU || COMPILE_TEST
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index bb8f319b09fb..a020adde4bbd 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -171,7 +171,6 @@ obj-$(CONFIG_RTC_DRV_TPS6586X) += rtc-tps6586x.o
obj-$(CONFIG_RTC_DRV_TPS65910) += rtc-tps65910.o
obj-$(CONFIG_RTC_DRV_TPS80031) += rtc-tps80031.o
obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o
-obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o
obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o
obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o
obj-$(CONFIG_RTC_DRV_VRTC) += rtc-mrst.o
diff --git a/drivers/rtc/rtc-tx4939.c b/drivers/rtc/rtc-tx4939.c
deleted file mode 100644
index c3309db5448d..000000000000
--- a/drivers/rtc/rtc-tx4939.c
+++ /dev/null
@@ -1,303 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * TX4939 internal RTC driver
- * Based on RBTX49xx patch from CELF patch archive.
- *
- * (C) Copyright TOSHIBA CORPORATION 2005-2007
- */
-#include <linux/rtc.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/gfp.h>
-
-#define TX4939_RTCCTL_ALME 0x00000080
-#define TX4939_RTCCTL_ALMD 0x00000040
-#define TX4939_RTCCTL_BUSY 0x00000020
-
-#define TX4939_RTCCTL_COMMAND 0x00000007
-#define TX4939_RTCCTL_COMMAND_NOP 0x00000000
-#define TX4939_RTCCTL_COMMAND_GETTIME 0x00000001
-#define TX4939_RTCCTL_COMMAND_SETTIME 0x00000002
-#define TX4939_RTCCTL_COMMAND_GETALARM 0x00000003
-#define TX4939_RTCCTL_COMMAND_SETALARM 0x00000004
-
-#define TX4939_RTCTBC_PM 0x00000080
-#define TX4939_RTCTBC_COMP 0x0000007f
-
-#define TX4939_RTC_REG_RAMSIZE 0x00000100
-#define TX4939_RTC_REG_RWBSIZE 0x00000006
-
-struct tx4939_rtc_reg {
- __u32 ctl;
- __u32 adr;
- __u32 dat;
- __u32 tbc;
-};
-
-struct tx4939rtc_plat_data {
- struct rtc_device *rtc;
- struct tx4939_rtc_reg __iomem *rtcreg;
- spinlock_t lock;
-};
-
-static int tx4939_rtc_cmd(struct tx4939_rtc_reg __iomem *rtcreg, int cmd)
-{
- int i = 0;
-
- __raw_writel(cmd, &rtcreg->ctl);
- /* This might take 30us (next 32.768KHz clock) */
- while (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_BUSY) {
- /* timeout on approx. 100us (@ GBUS200MHz) */
- if (i++ > 200 * 100)
- return -EBUSY;
- cpu_relax();
- }
- return 0;
-}
-
-static int tx4939_rtc_set_time(struct device *dev, struct rtc_time *tm)
-{
- struct tx4939rtc_plat_data *pdata = dev_get_drvdata(dev);
- struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
- unsigned long secs = rtc_tm_to_time64(tm);
- int i, ret;
- unsigned char buf[6];
-
- buf[0] = 0;
- buf[1] = 0;
- buf[2] = secs;
- buf[3] = secs >> 8;
- buf[4] = secs >> 16;
- buf[5] = secs >> 24;
- spin_lock_irq(&pdata->lock);
- __raw_writel(0, &rtcreg->adr);
- for (i = 0; i < 6; i++)
- __raw_writel(buf[i], &rtcreg->dat);
- ret = tx4939_rtc_cmd(rtcreg,
- TX4939_RTCCTL_COMMAND_SETTIME |
- (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
- spin_unlock_irq(&pdata->lock);
- return ret;
-}
-
-static int tx4939_rtc_read_time(struct device *dev, struct rtc_time *tm)
-{
- struct tx4939rtc_plat_data *pdata = dev_get_drvdata(dev);
- struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
- int i, ret;
- unsigned long sec;
- unsigned char buf[6];
-
- spin_lock_irq(&pdata->lock);
- ret = tx4939_rtc_cmd(rtcreg,
- TX4939_RTCCTL_COMMAND_GETTIME |
- (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
- if (ret) {
- spin_unlock_irq(&pdata->lock);
- return ret;
- }
- __raw_writel(2, &rtcreg->adr);
- for (i = 2; i < 6; i++)
- buf[i] = __raw_readl(&rtcreg->dat);
- spin_unlock_irq(&pdata->lock);
- sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) |
- (buf[3] << 8) | buf[2];
- rtc_time64_to_tm(sec, tm);
- return 0;
-}
-
-static int tx4939_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
-{
- struct tx4939rtc_plat_data *pdata = dev_get_drvdata(dev);
- struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
- int i, ret;
- unsigned long sec;
- unsigned char buf[6];
-
- sec = rtc_tm_to_time64(&alrm->time);
- buf[0] = 0;
- buf[1] = 0;
- buf[2] = sec;
- buf[3] = sec >> 8;
- buf[4] = sec >> 16;
- buf[5] = sec >> 24;
- spin_lock_irq(&pdata->lock);
- __raw_writel(0, &rtcreg->adr);
- for (i = 0; i < 6; i++)
- __raw_writel(buf[i], &rtcreg->dat);
- ret = tx4939_rtc_cmd(rtcreg, TX4939_RTCCTL_COMMAND_SETALARM |
- (alrm->enabled ? TX4939_RTCCTL_ALME : 0));
- spin_unlock_irq(&pdata->lock);
- return ret;
-}
-
-static int tx4939_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
-{
- struct tx4939rtc_plat_data *pdata = dev_get_drvdata(dev);
- struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
- int i, ret;
- unsigned long sec;
- unsigned char buf[6];
- u32 ctl;
-
- spin_lock_irq(&pdata->lock);
- ret = tx4939_rtc_cmd(rtcreg,
- TX4939_RTCCTL_COMMAND_GETALARM |
- (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
- if (ret) {
- spin_unlock_irq(&pdata->lock);
- return ret;
- }
- __raw_writel(2, &rtcreg->adr);
- for (i = 2; i < 6; i++)
- buf[i] = __raw_readl(&rtcreg->dat);
- ctl = __raw_readl(&rtcreg->ctl);
- alrm->enabled = (ctl & TX4939_RTCCTL_ALME) ? 1 : 0;
- alrm->pending = (ctl & TX4939_RTCCTL_ALMD) ? 1 : 0;
- spin_unlock_irq(&pdata->lock);
- sec = ((unsigned long)buf[5] << 24) | (buf[4] << 16) |
- (buf[3] << 8) | buf[2];
- rtc_time64_to_tm(sec, &alrm->time);
- return rtc_valid_tm(&alrm->time);
-}
-
-static int tx4939_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
-{
- struct tx4939rtc_plat_data *pdata = dev_get_drvdata(dev);
-
- spin_lock_irq(&pdata->lock);
- tx4939_rtc_cmd(pdata->rtcreg,
- TX4939_RTCCTL_COMMAND_NOP |
- (enabled ? TX4939_RTCCTL_ALME : 0));
- spin_unlock_irq(&pdata->lock);
- return 0;
-}
-
-static irqreturn_t tx4939_rtc_interrupt(int irq, void *dev_id)
-{
- struct tx4939rtc_plat_data *pdata = dev_get_drvdata(dev_id);
- struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
- unsigned long events = RTC_IRQF;
-
- spin_lock(&pdata->lock);
- if (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALMD) {
- events |= RTC_AF;
- tx4939_rtc_cmd(rtcreg, TX4939_RTCCTL_COMMAND_NOP);
- }
- spin_unlock(&pdata->lock);
- rtc_update_irq(pdata->rtc, 1, events);
-
- return IRQ_HANDLED;
-}
-
-static const struct rtc_class_ops tx4939_rtc_ops = {
- .read_time = tx4939_rtc_read_time,
- .read_alarm = tx4939_rtc_read_alarm,
- .set_alarm = tx4939_rtc_set_alarm,
- .set_time = tx4939_rtc_set_time,
- .alarm_irq_enable = tx4939_rtc_alarm_irq_enable,
-};
-
-static int tx4939_nvram_read(void *priv, unsigned int pos, void *val,
- size_t bytes)
-{
- struct tx4939rtc_plat_data *pdata = priv;
- struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
- u8 *buf = val;
-
- spin_lock_irq(&pdata->lock);
- for (; bytes; bytes--) {
- __raw_writel(pos++, &rtcreg->adr);
- *buf++ = __raw_readl(&rtcreg->dat);
- }
- spin_unlock_irq(&pdata->lock);
- return 0;
-}
-
-static int tx4939_nvram_write(void *priv, unsigned int pos, void *val,
- size_t bytes)
-{
- struct tx4939rtc_plat_data *pdata = priv;
- struct tx4939_rtc_reg __iomem *rtcreg = pdata->rtcreg;
- u8 *buf = val;
-
- spin_lock_irq(&pdata->lock);
- for (; bytes; bytes--) {
- __raw_writel(pos++, &rtcreg->adr);
- __raw_writel(*buf++, &rtcreg->dat);
- }
- spin_unlock_irq(&pdata->lock);
- return 0;
-}
-
-static int __init tx4939_rtc_probe(struct platform_device *pdev)
-{
- struct rtc_device *rtc;
- struct tx4939rtc_plat_data *pdata;
- int irq, ret;
- struct nvmem_config nvmem_cfg = {
- .name = "tx4939_nvram",
- .size = TX4939_RTC_REG_RAMSIZE,
- .reg_read = tx4939_nvram_read,
- .reg_write = tx4939_nvram_write,
- };
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0)
- return -ENODEV;
- pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
- if (!pdata)
- return -ENOMEM;
- platform_set_drvdata(pdev, pdata);
-
- pdata->rtcreg = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(pdata->rtcreg))
- return PTR_ERR(pdata->rtcreg);
-
- spin_lock_init(&pdata->lock);
- tx4939_rtc_cmd(pdata->rtcreg, TX4939_RTCCTL_COMMAND_NOP);
- if (devm_request_irq(&pdev->dev, irq, tx4939_rtc_interrupt,
- 0, pdev->name, &pdev->dev) < 0)
- return -EBUSY;
- rtc = devm_rtc_allocate_device(&pdev->dev);
- if (IS_ERR(rtc))
- return PTR_ERR(rtc);
-
- rtc->ops = &tx4939_rtc_ops;
- rtc->range_max = U32_MAX;
-
- pdata->rtc = rtc;
-
- nvmem_cfg.priv = pdata;
- ret = devm_rtc_nvmem_register(rtc, &nvmem_cfg);
- if (ret)
- return ret;
-
- return devm_rtc_register_device(rtc);
-}
-
-static int __exit tx4939_rtc_remove(struct platform_device *pdev)
-{
- struct tx4939rtc_plat_data *pdata = platform_get_drvdata(pdev);
-
- spin_lock_irq(&pdata->lock);
- tx4939_rtc_cmd(pdata->rtcreg, TX4939_RTCCTL_COMMAND_NOP);
- spin_unlock_irq(&pdata->lock);
- return 0;
-}
-
-static struct platform_driver tx4939_rtc_driver = {
- .remove = __exit_p(tx4939_rtc_remove),
- .driver = {
- .name = "tx4939rtc",
- },
-};
-
-module_platform_driver_probe(tx4939_rtc_driver, tx4939_rtc_probe);
-
-MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
-MODULE_DESCRIPTION("TX4939 internal RTC driver");
-MODULE_LICENSE("GPL v2");
-MODULE_ALIAS("platform:tx4939rtc");
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 09/10] ide: tx4938ide: Remove driver
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (7 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 08/10] rtc: tx4939: Remove driver Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 10/10] ASoC: txx9: " Thomas Bogendoerfer
` (4 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove IDE support for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
drivers/ide/Kconfig | 10 -
drivers/ide/Makefile | 3 -
drivers/ide/tx4938ide.c | 209 -------------
drivers/ide/tx4939ide.c | 628 ----------------------------------------
4 files changed, 850 deletions(-)
delete mode 100644 drivers/ide/tx4938ide.c
delete mode 100644 drivers/ide/tx4939ide.c
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 19abf11c84c8..03303af8c96f 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -662,16 +662,6 @@ config BLK_DEV_IDE_PMAC_ATA100FIRST
CD-ROM on hda. This option changes this to more natural hda for
hard disk and hdc for CD-ROM.
-config BLK_DEV_IDE_TX4938
- tristate "TX4938 internal IDE support"
- depends on SOC_TX4938
- select IDE_TIMINGS
-
-config BLK_DEV_IDE_TX4939
- tristate "TX4939 internal IDE support"
- depends on SOC_TX4939
- select BLK_DEV_IDEDMA_SFF
-
config BLK_DEV_IDE_ICSIDE
tristate "ICS IDE interface support"
depends on ARM && ARCH_ACORN
diff --git a/drivers/ide/Makefile b/drivers/ide/Makefile
index 2605b3cdaf47..4d6655160a4a 100644
--- a/drivers/ide/Makefile
+++ b/drivers/ide/Makefile
@@ -106,6 +106,3 @@ obj-$(CONFIG_BLK_DEV_PLATFORM) += ide_platform.o
obj-$(CONFIG_BLK_DEV_IDE_ICSIDE) += icside.o
obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapide.o
obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o
-
-obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o
-obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o
diff --git a/drivers/ide/tx4938ide.c b/drivers/ide/tx4938ide.c
deleted file mode 100644
index 962eb92501b5..000000000000
--- a/drivers/ide/tx4938ide.c
+++ /dev/null
@@ -1,209 +0,0 @@
-/*
- * TX4938 internal IDE driver
- * Based on tx4939ide.c.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * (C) Copyright TOSHIBA CORPORATION 2005-2007
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <asm/ide.h>
-#include <asm/txx9/tx4938.h>
-
-static void tx4938ide_tune_ebusc(unsigned int ebus_ch,
- unsigned int gbus_clock,
- u8 pio)
-{
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
- u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]);
- unsigned int sp = (cr >> 4) & 3;
- unsigned int clock = gbus_clock / (4 - sp);
- unsigned int cycle = 1000000000 / clock;
- unsigned int shwt;
- int wt;
-
- /* Minimum DIOx- active time */
- wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
- /* IORDY setup time: 35ns */
- wt = max_t(int, wt, DIV_ROUND_UP(35, cycle));
- /* actual wait-cycle is max(wt & ~1, 1) */
- if (wt > 2 && (wt & 1))
- wt++;
- wt &= ~1;
- /* Address-valid to DIOR/DIOW setup */
- shwt = DIV_ROUND_UP(t->setup, cycle);
-
- /* -DIOx recovery time (SHWT * 4) and cycle time requirement */
- while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle)
- shwt++;
- if (shwt > 7) {
- pr_warn("tx4938ide: SHWT violation (%d)\n", shwt);
- shwt = 7;
- }
- pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n",
- ebus_ch, cycle, wt, shwt);
-
- __raw_writeq((cr & ~0x3f007ull) | (wt << 12) | shwt,
- &tx4938_ebuscptr->cr[ebus_ch]);
-}
-
-static void tx4938ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct tx4938ide_platform_info *pdata = dev_get_platdata(hwif->dev);
- u8 safe = drive->pio_mode - XFER_PIO_0;
- ide_drive_t *pair;
-
- pair = ide_get_pair_dev(drive);
- if (pair)
- safe = min_t(u8, safe, pair->pio_mode - XFER_PIO_0);
- tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe);
-}
-
-#ifdef __BIG_ENDIAN
-
-/* custom iops (independent from SWAP_IO_SPACE) */
-static void tx4938ide_input_data_swap(ide_drive_t *drive, struct ide_cmd *cmd,
- void *buf, unsigned int len)
-{
- unsigned long port = drive->hwif->io_ports.data_addr;
- unsigned short *ptr = buf;
- unsigned int count = (len + 1) / 2;
-
- while (count--)
- *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port));
- __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
-}
-
-static void tx4938ide_output_data_swap(ide_drive_t *drive, struct ide_cmd *cmd,
- void *buf, unsigned int len)
-{
- unsigned long port = drive->hwif->io_ports.data_addr;
- unsigned short *ptr = buf;
- unsigned int count = (len + 1) / 2;
-
- while (count--) {
- __raw_writew(le16_to_cpu(*ptr), (void __iomem *)port);
- ptr++;
- }
- __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
-}
-
-static const struct ide_tp_ops tx4938ide_tp_ops = {
- .exec_command = ide_exec_command,
- .read_status = ide_read_status,
- .read_altstatus = ide_read_altstatus,
- .write_devctl = ide_write_devctl,
-
- .dev_select = ide_dev_select,
- .tf_load = ide_tf_load,
- .tf_read = ide_tf_read,
-
- .input_data = tx4938ide_input_data_swap,
- .output_data = tx4938ide_output_data_swap,
-};
-
-#endif /* __BIG_ENDIAN */
-
-static const struct ide_port_ops tx4938ide_port_ops = {
- .set_pio_mode = tx4938ide_set_pio_mode,
-};
-
-static const struct ide_port_info tx4938ide_port_info __initconst = {
- .port_ops = &tx4938ide_port_ops,
-#ifdef __BIG_ENDIAN
- .tp_ops = &tx4938ide_tp_ops,
-#endif
- .host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA,
- .pio_mask = ATA_PIO5,
- .chipset = ide_generic,
-};
-
-static int __init tx4938ide_probe(struct platform_device *pdev)
-{
- struct ide_hw hw, *hws[] = { &hw };
- struct ide_host *host;
- struct resource *res;
- struct tx4938ide_platform_info *pdata = dev_get_platdata(&pdev->dev);
- int irq, ret, i;
- unsigned long mapbase, mapctl;
- struct ide_port_info d = tx4938ide_port_info;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0)
- return -ENODEV;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res)
- return -ENODEV;
-
- if (!devm_request_mem_region(&pdev->dev, res->start,
- resource_size(res), "tx4938ide"))
- return -EBUSY;
- mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start,
- 8 << pdata->ioport_shift);
- mapctl = (unsigned long)devm_ioremap(&pdev->dev,
- res->start + 0x10000 +
- (6 << pdata->ioport_shift),
- 1 << pdata->ioport_shift);
- if (!mapbase || !mapctl)
- return -EBUSY;
-
- memset(&hw, 0, sizeof(hw));
- if (pdata->ioport_shift) {
- unsigned long port = mapbase;
- unsigned long ctl = mapctl;
-
- hw.io_ports_array[0] = port;
-#ifdef __BIG_ENDIAN
- port++;
- ctl++;
-#endif
- for (i = 1; i <= 7; i++)
- hw.io_ports_array[i] =
- port + (i << pdata->ioport_shift);
- hw.io_ports.ctl_addr = ctl;
- } else
- ide_std_init_ports(&hw, mapbase, mapctl);
- hw.irq = irq;
- hw.dev = &pdev->dev;
-
- pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n",
- mapbase, mapctl, hw.irq);
- if (pdata->gbus_clock)
- tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0);
- else
- d.port_ops = NULL;
- ret = ide_host_add(&d, hws, 1, &host);
- if (!ret)
- platform_set_drvdata(pdev, host);
- return ret;
-}
-
-static int __exit tx4938ide_remove(struct platform_device *pdev)
-{
- struct ide_host *host = platform_get_drvdata(pdev);
-
- ide_host_remove(host);
- return 0;
-}
-
-static struct platform_driver tx4938ide_driver = {
- .driver = {
- .name = "tx4938ide",
- },
- .remove = __exit_p(tx4938ide_remove),
-};
-
-module_platform_driver_probe(tx4938ide_driver, tx4938ide_probe);
-
-MODULE_DESCRIPTION("TX4938 internal IDE driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:tx4938ide");
diff --git a/drivers/ide/tx4939ide.c b/drivers/ide/tx4939ide.c
deleted file mode 100644
index b1bbf807bb3d..000000000000
--- a/drivers/ide/tx4939ide.c
+++ /dev/null
@@ -1,628 +0,0 @@
-/*
- * TX4939 internal IDE driver
- * Based on RBTX49xx patch from CELF patch archive.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * (C) Copyright TOSHIBA CORPORATION 2005-2007
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/scatterlist.h>
-
-#include <asm/ide.h>
-
-#define MODNAME "tx4939ide"
-
-/* ATA Shadow Registers (8-bit except for Data which is 16-bit) */
-#define TX4939IDE_Data 0x000
-#define TX4939IDE_Error_Feature 0x001
-#define TX4939IDE_Sec 0x002
-#define TX4939IDE_LBA0 0x003
-#define TX4939IDE_LBA1 0x004
-#define TX4939IDE_LBA2 0x005
-#define TX4939IDE_DevHead 0x006
-#define TX4939IDE_Stat_Cmd 0x007
-#define TX4939IDE_AltStat_DevCtl 0x402
-/* H/W DMA Registers */
-#define TX4939IDE_DMA_Cmd 0x800 /* 8-bit */
-#define TX4939IDE_DMA_Stat 0x802 /* 8-bit */
-#define TX4939IDE_PRD_Ptr 0x804 /* 32-bit */
-/* ATA100 CORE Registers (16-bit) */
-#define TX4939IDE_Sys_Ctl 0xc00
-#define TX4939IDE_Xfer_Cnt_1 0xc08
-#define TX4939IDE_Xfer_Cnt_2 0xc0a
-#define TX4939IDE_Sec_Cnt 0xc10
-#define TX4939IDE_Start_Lo_Addr 0xc18
-#define TX4939IDE_Start_Up_Addr 0xc20
-#define TX4939IDE_Add_Ctl 0xc28
-#define TX4939IDE_Lo_Burst_Cnt 0xc30
-#define TX4939IDE_Up_Burst_Cnt 0xc38
-#define TX4939IDE_PIO_Addr 0xc88
-#define TX4939IDE_H_Rst_Tim 0xc90
-#define TX4939IDE_Int_Ctl 0xc98
-#define TX4939IDE_Pkt_Cmd 0xcb8
-#define TX4939IDE_Bxfer_Cnt_Hi 0xcc0
-#define TX4939IDE_Bxfer_Cnt_Lo 0xcc8
-#define TX4939IDE_Dev_TErr 0xcd0
-#define TX4939IDE_Pkt_Xfer_Ctl 0xcd8
-#define TX4939IDE_Start_TAddr 0xce0
-
-/* bits for Int_Ctl */
-#define TX4939IDE_INT_ADDRERR 0x80
-#define TX4939IDE_INT_REACHMUL 0x40
-#define TX4939IDE_INT_DEVTIMING 0x20
-#define TX4939IDE_INT_UDMATERM 0x10
-#define TX4939IDE_INT_TIMER 0x08
-#define TX4939IDE_INT_BUSERR 0x04
-#define TX4939IDE_INT_XFEREND 0x02
-#define TX4939IDE_INT_HOST 0x01
-
-#define TX4939IDE_IGNORE_INTS \
- (TX4939IDE_INT_ADDRERR | TX4939IDE_INT_REACHMUL | \
- TX4939IDE_INT_DEVTIMING | TX4939IDE_INT_UDMATERM | \
- TX4939IDE_INT_TIMER | TX4939IDE_INT_XFEREND)
-
-#ifdef __BIG_ENDIAN
-#define tx4939ide_swizzlel(a) ((a) ^ 4)
-#define tx4939ide_swizzlew(a) ((a) ^ 6)
-#define tx4939ide_swizzleb(a) ((a) ^ 7)
-#else
-#define tx4939ide_swizzlel(a) (a)
-#define tx4939ide_swizzlew(a) (a)
-#define tx4939ide_swizzleb(a) (a)
-#endif
-
-static u16 tx4939ide_readw(void __iomem *base, u32 reg)
-{
- return __raw_readw(base + tx4939ide_swizzlew(reg));
-}
-static u8 tx4939ide_readb(void __iomem *base, u32 reg)
-{
- return __raw_readb(base + tx4939ide_swizzleb(reg));
-}
-static void tx4939ide_writel(u32 val, void __iomem *base, u32 reg)
-{
- __raw_writel(val, base + tx4939ide_swizzlel(reg));
-}
-static void tx4939ide_writew(u16 val, void __iomem *base, u32 reg)
-{
- __raw_writew(val, base + tx4939ide_swizzlew(reg));
-}
-static void tx4939ide_writeb(u8 val, void __iomem *base, u32 reg)
-{
- __raw_writeb(val, base + tx4939ide_swizzleb(reg));
-}
-
-#define TX4939IDE_BASE(hwif) ((void __iomem *)(hwif)->extra_base)
-
-static void tx4939ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- int is_slave = drive->dn;
- u32 mask, val;
- const u8 pio = drive->pio_mode - XFER_PIO_0;
- u8 safe = pio;
- ide_drive_t *pair;
-
- pair = ide_get_pair_dev(drive);
- if (pair)
- safe = min_t(u8, safe, pair->pio_mode - XFER_PIO_0);
- /*
- * Update Command Transfer Mode for master/slave and Data
- * Transfer Mode for this drive.
- */
- mask = is_slave ? 0x07f00000 : 0x000007f0;
- val = ((safe << 8) | (pio << 4)) << (is_slave ? 16 : 0);
- hwif->select_data = (hwif->select_data & ~mask) | val;
- /* tx4939ide_tf_load_fixup() will set the Sys_Ctl register */
-}
-
-static void tx4939ide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- u32 mask, val;
- const u8 mode = drive->dma_mode;
-
- /* Update Data Transfer Mode for this drive. */
- if (mode >= XFER_UDMA_0)
- val = mode - XFER_UDMA_0 + 8;
- else
- val = mode - XFER_MW_DMA_0 + 5;
- if (drive->dn) {
- mask = 0x00f00000;
- val <<= 20;
- } else {
- mask = 0x000000f0;
- val <<= 4;
- }
- hwif->select_data = (hwif->select_data & ~mask) | val;
- /* tx4939ide_tf_load_fixup() will set the Sys_Ctl register */
-}
-
-static u16 tx4939ide_check_error_ints(ide_hwif_t *hwif)
-{
- void __iomem *base = TX4939IDE_BASE(hwif);
- u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl);
-
- if (ctl & TX4939IDE_INT_BUSERR) {
- /* reset FIFO */
- u16 sysctl = tx4939ide_readw(base, TX4939IDE_Sys_Ctl);
-
- tx4939ide_writew(sysctl | 0x4000, base, TX4939IDE_Sys_Ctl);
- /* wait 12GBUSCLK (typ. 60ns @ GBUS200MHz, max 270ns) */
- ndelay(270);
- tx4939ide_writew(sysctl, base, TX4939IDE_Sys_Ctl);
- }
- if (ctl & (TX4939IDE_INT_ADDRERR |
- TX4939IDE_INT_DEVTIMING | TX4939IDE_INT_BUSERR))
- pr_err("%s: Error interrupt %#x (%s%s%s )\n",
- hwif->name, ctl,
- ctl & TX4939IDE_INT_ADDRERR ? " Address-Error" : "",
- ctl & TX4939IDE_INT_DEVTIMING ? " DEV-Timing" : "",
- ctl & TX4939IDE_INT_BUSERR ? " Bus-Error" : "");
- return ctl;
-}
-
-static void tx4939ide_clear_irq(ide_drive_t *drive)
-{
- ide_hwif_t *hwif;
- void __iomem *base;
- u16 ctl;
-
- /*
- * tx4939ide_dma_test_irq() and tx4939ide_dma_end() do all job
- * for DMA case.
- */
- if (drive->waiting_for_dma)
- return;
- hwif = drive->hwif;
- base = TX4939IDE_BASE(hwif);
- ctl = tx4939ide_check_error_ints(hwif);
- tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl);
-}
-
-static u8 tx4939ide_cable_detect(ide_hwif_t *hwif)
-{
- void __iomem *base = TX4939IDE_BASE(hwif);
-
- return tx4939ide_readw(base, TX4939IDE_Sys_Ctl) & 0x2000 ?
- ATA_CBL_PATA40 : ATA_CBL_PATA80;
-}
-
-#ifdef __BIG_ENDIAN
-static void tx4939ide_dma_host_set(ide_drive_t *drive, int on)
-{
- ide_hwif_t *hwif = drive->hwif;
- u8 unit = drive->dn;
- void __iomem *base = TX4939IDE_BASE(hwif);
- u8 dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat);
-
- if (on)
- dma_stat |= (1 << (5 + unit));
- else
- dma_stat &= ~(1 << (5 + unit));
-
- tx4939ide_writeb(dma_stat, base, TX4939IDE_DMA_Stat);
-}
-#else
-#define tx4939ide_dma_host_set ide_dma_host_set
-#endif
-
-static u8 tx4939ide_clear_dma_status(void __iomem *base)
-{
- u8 dma_stat;
-
- /* read DMA status for INTR & ERROR flags */
- dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat);
- /* clear INTR & ERROR flags */
- tx4939ide_writeb(dma_stat | ATA_DMA_INTR | ATA_DMA_ERR, base,
- TX4939IDE_DMA_Stat);
- /* recover intmask cleared by writing to bit2 of DMA_Stat */
- tx4939ide_writew(TX4939IDE_IGNORE_INTS << 8, base, TX4939IDE_Int_Ctl);
- return dma_stat;
-}
-
-#ifdef __BIG_ENDIAN
-/* custom ide_build_dmatable to handle swapped layout */
-static int tx4939ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
-{
- ide_hwif_t *hwif = drive->hwif;
- u32 *table = (u32 *)hwif->dmatable_cpu;
- unsigned int count = 0;
- int i;
- struct scatterlist *sg;
-
- for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) {
- u32 cur_addr, cur_len, bcount;
-
- cur_addr = sg_dma_address(sg);
- cur_len = sg_dma_len(sg);
-
- /*
- * Fill in the DMA table, without crossing any 64kB boundaries.
- */
-
- while (cur_len) {
- if (count++ >= PRD_ENTRIES)
- goto use_pio_instead;
-
- bcount = 0x10000 - (cur_addr & 0xffff);
- if (bcount > cur_len)
- bcount = cur_len;
- /*
- * This workaround for zero count seems required.
- * (standard ide_build_dmatable does it too)
- */
- if (bcount == 0x10000)
- bcount = 0x8000;
- *table++ = bcount & 0xffff;
- *table++ = cur_addr;
- cur_addr += bcount;
- cur_len -= bcount;
- }
- }
-
- if (count) {
- *(table - 2) |= 0x80000000;
- return count;
- }
-
-use_pio_instead:
- printk(KERN_ERR "%s: %s\n", drive->name,
- count ? "DMA table too small" : "empty DMA table?");
-
- return 0; /* revert to PIO for this request */
-}
-#else
-#define tx4939ide_build_dmatable ide_build_dmatable
-#endif
-
-static int tx4939ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
-{
- ide_hwif_t *hwif = drive->hwif;
- void __iomem *base = TX4939IDE_BASE(hwif);
- u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR;
-
- /* fall back to PIO! */
- if (tx4939ide_build_dmatable(drive, cmd) == 0)
- return 1;
-
- /* PRD table */
- tx4939ide_writel(hwif->dmatable_dma, base, TX4939IDE_PRD_Ptr);
-
- /* specify r/w */
- tx4939ide_writeb(rw, base, TX4939IDE_DMA_Cmd);
-
- /* clear INTR & ERROR flags */
- tx4939ide_clear_dma_status(base);
-
- tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ?
- TX4939IDE_Xfer_Cnt_2 : TX4939IDE_Xfer_Cnt_1);
-
- tx4939ide_writew(blk_rq_sectors(cmd->rq), base, TX4939IDE_Sec_Cnt);
-
- return 0;
-}
-
-static int tx4939ide_dma_end(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = drive->hwif;
- u8 dma_stat, dma_cmd;
- void __iomem *base = TX4939IDE_BASE(hwif);
- u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl);
-
- /* get DMA command mode */
- dma_cmd = tx4939ide_readb(base, TX4939IDE_DMA_Cmd);
- /* stop DMA */
- tx4939ide_writeb(dma_cmd & ~ATA_DMA_START, base, TX4939IDE_DMA_Cmd);
-
- /* read and clear the INTR & ERROR bits */
- dma_stat = tx4939ide_clear_dma_status(base);
-
-#define CHECK_DMA_MASK (ATA_DMA_ACTIVE | ATA_DMA_ERR | ATA_DMA_INTR)
-
- /* verify good DMA status */
- if ((dma_stat & CHECK_DMA_MASK) == 0 &&
- (ctl & (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST)) ==
- (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST))
- /* INT_IDE lost... bug? */
- return 0;
- return ((dma_stat & CHECK_DMA_MASK) !=
- ATA_DMA_INTR) ? 0x10 | dma_stat : 0;
-}
-
-/* returns 1 if DMA IRQ issued, 0 otherwise */
-static int tx4939ide_dma_test_irq(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = drive->hwif;
- void __iomem *base = TX4939IDE_BASE(hwif);
- u16 ctl, ide_int;
- u8 dma_stat, stat;
- int found = 0;
-
- ctl = tx4939ide_check_error_ints(hwif);
- ide_int = ctl & (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST);
- switch (ide_int) {
- case TX4939IDE_INT_HOST:
- /* On error, XFEREND might not be asserted. */
- stat = tx4939ide_readb(base, TX4939IDE_AltStat_DevCtl);
- if ((stat & (ATA_BUSY | ATA_DRQ | ATA_ERR)) == ATA_ERR)
- found = 1;
- else
- /* Wait for XFEREND (Mask HOST and unmask XFEREND) */
- ctl &= ~TX4939IDE_INT_XFEREND << 8;
- ctl |= ide_int << 8;
- break;
- case TX4939IDE_INT_HOST | TX4939IDE_INT_XFEREND:
- dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat);
- if (!(dma_stat & ATA_DMA_INTR))
- pr_warn("%s: weird interrupt status. "
- "DMA_Stat %#02x int_ctl %#04x\n",
- hwif->name, dma_stat, ctl);
- found = 1;
- break;
- }
- /*
- * Do not clear XFEREND, HOST now. They will be cleared by
- * clearing bit2 of DMA_Stat.
- */
- ctl &= ~ide_int;
- tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl);
- return found;
-}
-
-#ifdef __BIG_ENDIAN
-static u8 tx4939ide_dma_sff_read_status(ide_hwif_t *hwif)
-{
- void __iomem *base = TX4939IDE_BASE(hwif);
-
- return tx4939ide_readb(base, TX4939IDE_DMA_Stat);
-}
-#else
-#define tx4939ide_dma_sff_read_status ide_dma_sff_read_status
-#endif
-
-static void tx4939ide_init_hwif(ide_hwif_t *hwif)
-{
- void __iomem *base = TX4939IDE_BASE(hwif);
-
- /* Soft Reset */
- tx4939ide_writew(0x8000, base, TX4939IDE_Sys_Ctl);
- /* at least 20 GBUSCLK (typ. 100ns @ GBUS200MHz, max 450ns) */
- ndelay(450);
- tx4939ide_writew(0x0000, base, TX4939IDE_Sys_Ctl);
- /* mask some interrupts and clear all interrupts */
- tx4939ide_writew((TX4939IDE_IGNORE_INTS << 8) | 0xff, base,
- TX4939IDE_Int_Ctl);
-
- tx4939ide_writew(0x0008, base, TX4939IDE_Lo_Burst_Cnt);
- tx4939ide_writew(0, base, TX4939IDE_Up_Burst_Cnt);
-}
-
-static int tx4939ide_init_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
-{
- hwif->dma_base =
- hwif->extra_base + tx4939ide_swizzleb(TX4939IDE_DMA_Cmd);
- /*
- * Note that we cannot use ATA_DMA_TABLE_OFS, ATA_DMA_STATUS
- * for big endian.
- */
- return ide_allocate_dma_engine(hwif);
-}
-
-static void tx4939ide_tf_load_fixup(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = drive->hwif;
- void __iomem *base = TX4939IDE_BASE(hwif);
- u16 sysctl = hwif->select_data >> (drive->dn ? 16 : 0);
-
- /*
- * Fix ATA100 CORE System Control Register. (The write to the
- * Device/Head register may write wrong data to the System
- * Control Register)
- * While Sys_Ctl is written here, dev_select() is not needed.
- */
- tx4939ide_writew(sysctl, base, TX4939IDE_Sys_Ctl);
-}
-
-static void tx4939ide_tf_load(ide_drive_t *drive, struct ide_taskfile *tf,
- u8 valid)
-{
- ide_tf_load(drive, tf, valid);
-
- if (valid & IDE_VALID_DEVICE)
- tx4939ide_tf_load_fixup(drive);
-}
-
-#ifdef __BIG_ENDIAN
-
-/* custom iops (independent from SWAP_IO_SPACE) */
-static void tx4939ide_input_data_swap(ide_drive_t *drive, struct ide_cmd *cmd,
- void *buf, unsigned int len)
-{
- unsigned long port = drive->hwif->io_ports.data_addr;
- unsigned short *ptr = buf;
- unsigned int count = (len + 1) / 2;
-
- while (count--)
- *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port));
- __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
-}
-
-static void tx4939ide_output_data_swap(ide_drive_t *drive, struct ide_cmd *cmd,
- void *buf, unsigned int len)
-{
- unsigned long port = drive->hwif->io_ports.data_addr;
- unsigned short *ptr = buf;
- unsigned int count = (len + 1) / 2;
-
- while (count--) {
- __raw_writew(le16_to_cpu(*ptr), (void __iomem *)port);
- ptr++;
- }
- __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
-}
-
-static const struct ide_tp_ops tx4939ide_tp_ops = {
- .exec_command = ide_exec_command,
- .read_status = ide_read_status,
- .read_altstatus = ide_read_altstatus,
- .write_devctl = ide_write_devctl,
-
- .dev_select = ide_dev_select,
- .tf_load = tx4939ide_tf_load,
- .tf_read = ide_tf_read,
-
- .input_data = tx4939ide_input_data_swap,
- .output_data = tx4939ide_output_data_swap,
-};
-
-#else /* __LITTLE_ENDIAN */
-
-static const struct ide_tp_ops tx4939ide_tp_ops = {
- .exec_command = ide_exec_command,
- .read_status = ide_read_status,
- .read_altstatus = ide_read_altstatus,
- .write_devctl = ide_write_devctl,
-
- .dev_select = ide_dev_select,
- .tf_load = tx4939ide_tf_load,
- .tf_read = ide_tf_read,
-
- .input_data = ide_input_data,
- .output_data = ide_output_data,
-};
-
-#endif /* __LITTLE_ENDIAN */
-
-static const struct ide_port_ops tx4939ide_port_ops = {
- .set_pio_mode = tx4939ide_set_pio_mode,
- .set_dma_mode = tx4939ide_set_dma_mode,
- .clear_irq = tx4939ide_clear_irq,
- .cable_detect = tx4939ide_cable_detect,
-};
-
-static const struct ide_dma_ops tx4939ide_dma_ops = {
- .dma_host_set = tx4939ide_dma_host_set,
- .dma_setup = tx4939ide_dma_setup,
- .dma_start = ide_dma_start,
- .dma_end = tx4939ide_dma_end,
- .dma_test_irq = tx4939ide_dma_test_irq,
- .dma_lost_irq = ide_dma_lost_irq,
- .dma_timer_expiry = ide_dma_sff_timer_expiry,
- .dma_sff_read_status = tx4939ide_dma_sff_read_status,
-};
-
-static const struct ide_port_info tx4939ide_port_info __initconst = {
- .init_hwif = tx4939ide_init_hwif,
- .init_dma = tx4939ide_init_dma,
- .port_ops = &tx4939ide_port_ops,
- .dma_ops = &tx4939ide_dma_ops,
- .tp_ops = &tx4939ide_tp_ops,
- .host_flags = IDE_HFLAG_MMIO,
- .pio_mask = ATA_PIO4,
- .mwdma_mask = ATA_MWDMA2,
- .udma_mask = ATA_UDMA5,
- .chipset = ide_generic,
-};
-
-static int __init tx4939ide_probe(struct platform_device *pdev)
-{
- struct ide_hw hw, *hws[] = { &hw };
- struct ide_host *host;
- struct resource *res;
- int irq, ret;
- unsigned long mapbase;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0)
- return -ENODEV;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res)
- return -ENODEV;
-
- if (!devm_request_mem_region(&pdev->dev, res->start,
- resource_size(res), MODNAME))
- return -EBUSY;
- mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start,
- resource_size(res));
- if (!mapbase)
- return -EBUSY;
- memset(&hw, 0, sizeof(hw));
- hw.io_ports.data_addr =
- mapbase + tx4939ide_swizzlew(TX4939IDE_Data);
- hw.io_ports.error_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_Error_Feature);
- hw.io_ports.nsect_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_Sec);
- hw.io_ports.lbal_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_LBA0);
- hw.io_ports.lbam_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_LBA1);
- hw.io_ports.lbah_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_LBA2);
- hw.io_ports.device_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_DevHead);
- hw.io_ports.command_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_Stat_Cmd);
- hw.io_ports.ctl_addr =
- mapbase + tx4939ide_swizzleb(TX4939IDE_AltStat_DevCtl);
- hw.irq = irq;
- hw.dev = &pdev->dev;
-
- pr_info("TX4939 IDE interface (base %#lx, irq %d)\n", mapbase, irq);
- host = ide_host_alloc(&tx4939ide_port_info, hws, 1);
- if (!host)
- return -ENOMEM;
- /* use extra_base for base address of the all registers */
- host->ports[0]->extra_base = mapbase;
- ret = ide_host_register(host, &tx4939ide_port_info, hws);
- if (ret) {
- ide_host_free(host);
- return ret;
- }
- platform_set_drvdata(pdev, host);
- return 0;
-}
-
-static int __exit tx4939ide_remove(struct platform_device *pdev)
-{
- struct ide_host *host = platform_get_drvdata(pdev);
-
- ide_host_remove(host);
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int tx4939ide_resume(struct platform_device *dev)
-{
- struct ide_host *host = platform_get_drvdata(dev);
- ide_hwif_t *hwif = host->ports[0];
-
- tx4939ide_init_hwif(hwif);
- return 0;
-}
-#else
-#define tx4939ide_resume NULL
-#endif
-
-static struct platform_driver tx4939ide_driver = {
- .driver = {
- .name = MODNAME,
- },
- .remove = __exit_p(tx4939ide_remove),
- .resume = tx4939ide_resume,
-};
-
-module_platform_driver_probe(tx4939ide_driver, tx4939ide_probe);
-
-MODULE_DESCRIPTION("TX4939 internal IDE driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:tx4939ide");
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [PATCH 10/10] ASoC: txx9: Remove driver
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (8 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 09/10] ide: tx4938ide: " Thomas Bogendoerfer
@ 2021-01-05 14:02 ` Thomas Bogendoerfer
2021-01-05 16:08 ` (subset) [PATCH 00/10] Remove support for TX49xx Mark Brown
` (3 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-05 14:02 UTC (permalink / raw)
To: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
CPU support for TX49xx is getting removed, so remove sound support for it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
sound/soc/Kconfig | 1 -
sound/soc/Makefile | 1 -
sound/soc/txx9/Kconfig | 30 ---
sound/soc/txx9/Makefile | 12 -
sound/soc/txx9/txx9aclc-ac97.c | 230 ----------------
sound/soc/txx9/txx9aclc-generic.c | 88 -------
sound/soc/txx9/txx9aclc.c | 422 ------------------------------
sound/soc/txx9/txx9aclc.h | 71 -----
8 files changed, 855 deletions(-)
delete mode 100644 sound/soc/txx9/Kconfig
delete mode 100644 sound/soc/txx9/Makefile
delete mode 100644 sound/soc/txx9/txx9aclc-ac97.c
delete mode 100644 sound/soc/txx9/txx9aclc-generic.c
delete mode 100644 sound/soc/txx9/txx9aclc.c
delete mode 100644 sound/soc/txx9/txx9aclc.h
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index 71a6fe87d1a1..47da9ce17693 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -71,7 +71,6 @@ source "sound/soc/stm/Kconfig"
source "sound/soc/sunxi/Kconfig"
source "sound/soc/tegra/Kconfig"
source "sound/soc/ti/Kconfig"
-source "sound/soc/txx9/Kconfig"
source "sound/soc/uniphier/Kconfig"
source "sound/soc/ux500/Kconfig"
source "sound/soc/xilinx/Kconfig"
diff --git a/sound/soc/Makefile b/sound/soc/Makefile
index ddbac3a2169f..508dbaa1814e 100644
--- a/sound/soc/Makefile
+++ b/sound/soc/Makefile
@@ -54,7 +54,6 @@ obj-$(CONFIG_SND_SOC) += stm/
obj-$(CONFIG_SND_SOC) += sunxi/
obj-$(CONFIG_SND_SOC) += tegra/
obj-$(CONFIG_SND_SOC) += ti/
-obj-$(CONFIG_SND_SOC) += txx9/
obj-$(CONFIG_SND_SOC) += uniphier/
obj-$(CONFIG_SND_SOC) += ux500/
obj-$(CONFIG_SND_SOC) += xilinx/
diff --git a/sound/soc/txx9/Kconfig b/sound/soc/txx9/Kconfig
deleted file mode 100644
index d928edf9f5a9..000000000000
--- a/sound/soc/txx9/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-##
-## TXx9 ACLC
-##
-config SND_SOC_TXX9ACLC
- tristate "SoC Audio for TXx9"
- depends on HAS_TXX9_ACLC && TXX9_DMAC
- help
- This option enables support for the AC Link Controllers in TXx9 SoC.
-
-config HAS_TXX9_ACLC
- bool
-
-config SND_SOC_TXX9ACLC_AC97
- tristate
- select AC97_BUS
- select SND_AC97_CODEC
- select SND_SOC_AC97_BUS
-
-
-##
-## Boards
-##
-config SND_SOC_TXX9ACLC_GENERIC
- tristate "Generic TXx9 ACLC sound machine"
- depends on SND_SOC_TXX9ACLC
- select SND_SOC_TXX9ACLC_AC97
- select SND_SOC_AC97_CODEC
- help
- This is a generic AC97 sound machine for use in TXx9 based systems.
diff --git a/sound/soc/txx9/Makefile b/sound/soc/txx9/Makefile
deleted file mode 100644
index 37ad833eb329..000000000000
--- a/sound/soc/txx9/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-# Platform
-snd-soc-txx9aclc-objs := txx9aclc.o
-snd-soc-txx9aclc-ac97-objs := txx9aclc-ac97.o
-
-obj-$(CONFIG_SND_SOC_TXX9ACLC) += snd-soc-txx9aclc.o
-obj-$(CONFIG_SND_SOC_TXX9ACLC_AC97) += snd-soc-txx9aclc-ac97.o
-
-# Machine
-snd-soc-txx9aclc-generic-objs := txx9aclc-generic.o
-
-obj-$(CONFIG_SND_SOC_TXX9ACLC_GENERIC) += snd-soc-txx9aclc-generic.o
diff --git a/sound/soc/txx9/txx9aclc-ac97.c b/sound/soc/txx9/txx9aclc-ac97.c
deleted file mode 100644
index d9e348444bd0..000000000000
--- a/sound/soc/txx9/txx9aclc-ac97.c
+++ /dev/null
@@ -1,230 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * TXx9 ACLC AC97 driver
- *
- * Copyright (C) 2009 Atsushi Nemoto
- *
- * Based on RBTX49xx patch from CELF patch archive.
- * (C) Copyright TOSHIBA CORPORATION 2004-2006
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/gfp.h>
-#include <asm/mach-tx39xx/ioremap.h> /* for TXX9_DIRECTMAP_BASE */
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/soc.h>
-#include "txx9aclc.h"
-
-#define AC97_DIR \
- (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
-
-#define AC97_RATES \
- SNDRV_PCM_RATE_8000_48000
-
-#ifdef __BIG_ENDIAN
-#define AC97_FMTS SNDRV_PCM_FMTBIT_S16_BE
-#else
-#define AC97_FMTS SNDRV_PCM_FMTBIT_S16_LE
-#endif
-
-static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
-
-/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
-static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
-
-static int txx9aclc_regready(struct txx9aclc_plat_drvdata *drvdata)
-{
- return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
-}
-
-/* AC97 controller reads codec register */
-static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
- unsigned short reg)
-{
- struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
- void __iomem *base = drvdata->base;
- u32 dat;
-
- if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
- return 0xffff;
- reg |= ac97->num << 7;
- dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
- __raw_writel(dat, base + ACREGACC);
- __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
- if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
- __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
- printk(KERN_ERR "ac97 read timeout (reg %#x)\n", reg);
- dat = 0xffff;
- goto done;
- }
- dat = __raw_readl(base + ACREGACC);
- if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
- printk(KERN_ERR "reg mismatch %x with %x\n",
- dat, reg);
- dat = 0xffff;
- goto done;
- }
- dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
-done:
- __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
- return dat;
-}
-
-/* AC97 controller writes to codec register */
-static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
- unsigned short val)
-{
- struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
- void __iomem *base = drvdata->base;
-
- __raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
- (val << ACREGACC_DAT_SHIFT),
- base + ACREGACC);
- __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
- if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
- printk(KERN_ERR
- "ac97 write timeout (reg %#x)\n", reg);
- }
- __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
-}
-
-static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
-{
- struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
- void __iomem *base = drvdata->base;
- u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;
-
- __raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
- udelay(1);
- __raw_writel(ACCTL_ENLINK, base + ACCTLEN);
- /* wait for primary codec ready status */
- __raw_writel(ready, base + ACINTEN);
- if (!wait_event_timeout(ac97_waitq,
- (__raw_readl(base + ACINTSTS) & ready) == ready,
- HZ)) {
- dev_err(&ac97->dev, "primary codec is not ready "
- "(status %#x)\n",
- __raw_readl(base + ACINTSTS));
- }
- __raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
- __raw_writel(ready, base + ACINTDIS);
-}
-
-/* AC97 controller operations */
-static struct snd_ac97_bus_ops txx9aclc_ac97_ops = {
- .read = txx9aclc_ac97_read,
- .write = txx9aclc_ac97_write,
- .reset = txx9aclc_ac97_cold_reset,
-};
-
-static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
-{
- struct txx9aclc_plat_drvdata *drvdata = dev_id;
- void __iomem *base = drvdata->base;
-
- __raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
- wake_up(&ac97_waitq);
- return IRQ_HANDLED;
-}
-
-static int txx9aclc_ac97_probe(struct snd_soc_dai *dai)
-{
- txx9aclc_drvdata = snd_soc_dai_get_drvdata(dai);
- return 0;
-}
-
-static int txx9aclc_ac97_remove(struct snd_soc_dai *dai)
-{
- struct txx9aclc_plat_drvdata *drvdata = snd_soc_dai_get_drvdata(dai);
-
- /* disable AC-link */
- __raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
- txx9aclc_drvdata = NULL;
- return 0;
-}
-
-static struct snd_soc_dai_driver txx9aclc_ac97_dai = {
- .probe = txx9aclc_ac97_probe,
- .remove = txx9aclc_ac97_remove,
- .playback = {
- .rates = AC97_RATES,
- .formats = AC97_FMTS,
- .channels_min = 2,
- .channels_max = 2,
- },
- .capture = {
- .rates = AC97_RATES,
- .formats = AC97_FMTS,
- .channels_min = 2,
- .channels_max = 2,
- },
-};
-
-static const struct snd_soc_component_driver txx9aclc_ac97_component = {
- .name = "txx9aclc-ac97",
-};
-
-static int txx9aclc_ac97_dev_probe(struct platform_device *pdev)
-{
- struct txx9aclc_plat_drvdata *drvdata;
- struct resource *r;
- int err;
- int irq;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0)
- return irq;
-
- drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata)
- return -ENOMEM;
-
- r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- drvdata->base = devm_ioremap_resource(&pdev->dev, r);
- if (IS_ERR(drvdata->base))
- return PTR_ERR(drvdata->base);
-
- platform_set_drvdata(pdev, drvdata);
- drvdata->physbase = r->start;
- if (sizeof(drvdata->physbase) > sizeof(r->start) &&
- r->start >= TXX9_DIRECTMAP_BASE &&
- r->start < TXX9_DIRECTMAP_BASE + 0x400000)
- drvdata->physbase |= 0xf00000000ull;
- err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
- 0, dev_name(&pdev->dev), drvdata);
- if (err < 0)
- return err;
-
- err = snd_soc_set_ac97_ops(&txx9aclc_ac97_ops);
- if (err < 0)
- return err;
-
- return devm_snd_soc_register_component(&pdev->dev, &txx9aclc_ac97_component,
- &txx9aclc_ac97_dai, 1);
-}
-
-static int txx9aclc_ac97_dev_remove(struct platform_device *pdev)
-{
- snd_soc_set_ac97_ops(NULL);
- return 0;
-}
-
-static struct platform_driver txx9aclc_ac97_driver = {
- .probe = txx9aclc_ac97_dev_probe,
- .remove = txx9aclc_ac97_dev_remove,
- .driver = {
- .name = "txx9aclc-ac97",
- },
-};
-
-module_platform_driver(txx9aclc_ac97_driver);
-
-MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
-MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:txx9aclc-ac97");
diff --git a/sound/soc/txx9/txx9aclc-generic.c b/sound/soc/txx9/txx9aclc-generic.c
deleted file mode 100644
index d6893721ba1d..000000000000
--- a/sound/soc/txx9/txx9aclc-generic.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Generic TXx9 ACLC machine driver
- *
- * Copyright (C) 2009 Atsushi Nemoto
- *
- * Based on RBTX49xx patch from CELF patch archive.
- * (C) Copyright TOSHIBA CORPORATION 2004-2006
- *
- * This is a very generic AC97 sound machine driver for boards which
- * have (AC97) audio at ACLC (e.g. RBTX49XX boards).
- */
-
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/soc.h>
-#include "txx9aclc.h"
-
-SND_SOC_DAILINK_DEFS(hifi,
- DAILINK_COMP_ARRAY(COMP_CPU("txx9aclc-ac97")),
- DAILINK_COMP_ARRAY(COMP_CODEC("ac97-codec", "ac97-hifi")),
- DAILINK_COMP_ARRAY(COMP_PLATFORM("txx9aclc-pcm-audio")));
-
-static struct snd_soc_dai_link txx9aclc_generic_dai = {
- .name = "AC97",
- .stream_name = "AC97 HiFi",
- SND_SOC_DAILINK_REG(hifi),
-};
-
-static struct snd_soc_card txx9aclc_generic_card = {
- .name = "Generic TXx9 ACLC Audio",
- .owner = THIS_MODULE,
- .dai_link = &txx9aclc_generic_dai,
- .num_links = 1,
-};
-
-static struct platform_device *soc_pdev;
-
-static int __init txx9aclc_generic_probe(struct platform_device *pdev)
-{
- int ret;
-
- soc_pdev = platform_device_alloc("soc-audio", -1);
- if (!soc_pdev)
- return -ENOMEM;
- platform_set_drvdata(soc_pdev, &txx9aclc_generic_card);
- ret = platform_device_add(soc_pdev);
- if (ret) {
- platform_device_put(soc_pdev);
- return ret;
- }
-
- return 0;
-}
-
-static int __exit txx9aclc_generic_remove(struct platform_device *pdev)
-{
- platform_device_unregister(soc_pdev);
- return 0;
-}
-
-static struct platform_driver txx9aclc_generic_driver = {
- .remove = __exit_p(txx9aclc_generic_remove),
- .driver = {
- .name = "txx9aclc-generic",
- },
-};
-
-static int __init txx9aclc_generic_init(void)
-{
- return platform_driver_probe(&txx9aclc_generic_driver,
- txx9aclc_generic_probe);
-}
-
-static void __exit txx9aclc_generic_exit(void)
-{
- platform_driver_unregister(&txx9aclc_generic_driver);
-}
-
-module_init(txx9aclc_generic_init);
-module_exit(txx9aclc_generic_exit);
-
-MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
-MODULE_DESCRIPTION("Generic TXx9 ACLC ALSA SoC audio driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:txx9aclc-generic");
diff --git a/sound/soc/txx9/txx9aclc.c b/sound/soc/txx9/txx9aclc.c
deleted file mode 100644
index 1d2d0d9b57b0..000000000000
--- a/sound/soc/txx9/txx9aclc.c
+++ /dev/null
@@ -1,422 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Generic TXx9 ACLC platform driver
- *
- * Copyright (C) 2009 Atsushi Nemoto
- *
- * Based on RBTX49xx patch from CELF patch archive.
- * (C) Copyright TOSHIBA CORPORATION 2004-2006
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/scatterlist.h>
-#include <linux/slab.h>
-#include <linux/dmaengine.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/pcm_params.h>
-#include <sound/soc.h>
-#include "txx9aclc.h"
-
-#define DRV_NAME "txx9aclc"
-
-static struct txx9aclc_soc_device {
- struct txx9aclc_dmadata dmadata[2];
-} txx9aclc_soc_device;
-
-/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
-static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
-
-static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
- struct txx9aclc_dmadata *dmadata);
-
-static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
- /*
- * REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
- * needs more works for noncoherent MIPS.
- */
- .info = SNDRV_PCM_INFO_INTERLEAVED |
- SNDRV_PCM_INFO_BATCH |
- SNDRV_PCM_INFO_PAUSE,
- .period_bytes_min = 1024,
- .period_bytes_max = 8 * 1024,
- .periods_min = 2,
- .periods_max = 4096,
- .buffer_bytes_max = 32 * 1024,
-};
-
-static int txx9aclc_pcm_hw_params(struct snd_soc_component *component,
- struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
-{
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct txx9aclc_dmadata *dmadata = runtime->private_data;
-
- dev_dbg(component->dev,
- "runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
- "runtime->min_align %ld\n",
- (unsigned long)runtime->dma_area,
- (unsigned long)runtime->dma_addr, runtime->dma_bytes,
- runtime->min_align);
- dev_dbg(component->dev,
- "periods %d period_bytes %d stream %d\n",
- params_periods(params), params_period_bytes(params),
- substream->stream);
-
- dmadata->substream = substream;
- dmadata->pos = 0;
- return 0;
-}
-
-static int txx9aclc_pcm_prepare(struct snd_soc_component *component,
- struct snd_pcm_substream *substream)
-{
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct txx9aclc_dmadata *dmadata = runtime->private_data;
-
- dmadata->dma_addr = runtime->dma_addr;
- dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
- dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
-
- if (dmadata->buffer_bytes == dmadata->period_bytes) {
- dmadata->frag_bytes = dmadata->period_bytes >> 1;
- dmadata->frags = 2;
- } else {
- dmadata->frag_bytes = dmadata->period_bytes;
- dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
- }
- dmadata->frag_count = 0;
- dmadata->pos = 0;
- return 0;
-}
-
-static void txx9aclc_dma_complete(void *arg)
-{
- struct txx9aclc_dmadata *dmadata = arg;
- unsigned long flags;
-
- /* dma completion handler cannot submit new operations */
- spin_lock_irqsave(&dmadata->dma_lock, flags);
- if (dmadata->frag_count >= 0) {
- dmadata->dmacount--;
- if (!WARN_ON(dmadata->dmacount < 0))
- queue_work(system_highpri_wq, &dmadata->work);
- }
- spin_unlock_irqrestore(&dmadata->dma_lock, flags);
-}
-
-static struct dma_async_tx_descriptor *
-txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
-{
- struct dma_chan *chan = dmadata->dma_chan;
- struct dma_async_tx_descriptor *desc;
- struct scatterlist sg;
-
- sg_init_table(&sg, 1);
- sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
- dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
- sg_dma_address(&sg) = buf_dma_addr;
- desc = dmaengine_prep_slave_sg(chan, &sg, 1,
- dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
- DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
- if (!desc) {
- dev_err(&chan->dev->device, "cannot prepare slave dma\n");
- return NULL;
- }
- desc->callback = txx9aclc_dma_complete;
- desc->callback_param = dmadata;
- dmaengine_submit(desc);
- return desc;
-}
-
-#define NR_DMA_CHAIN 2
-
-static void txx9aclc_dma_work(struct work_struct *work)
-{
- struct txx9aclc_dmadata *dmadata =
- container_of(work, struct txx9aclc_dmadata, work);
- struct dma_chan *chan = dmadata->dma_chan;
- struct dma_async_tx_descriptor *desc;
- struct snd_pcm_substream *substream = dmadata->substream;
- u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
- ACCTL_AUDODMA : ACCTL_AUDIDMA;
- int i;
- unsigned long flags;
-
- spin_lock_irqsave(&dmadata->dma_lock, flags);
- if (dmadata->frag_count < 0) {
- struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
- void __iomem *base = drvdata->base;
-
- spin_unlock_irqrestore(&dmadata->dma_lock, flags);
- dmaengine_terminate_all(chan);
- /* first time */
- for (i = 0; i < NR_DMA_CHAIN; i++) {
- desc = txx9aclc_dma_submit(dmadata,
- dmadata->dma_addr + i * dmadata->frag_bytes);
- if (!desc)
- return;
- }
- dmadata->dmacount = NR_DMA_CHAIN;
- dma_async_issue_pending(chan);
- spin_lock_irqsave(&dmadata->dma_lock, flags);
- __raw_writel(ctlbit, base + ACCTLEN);
- dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
- spin_unlock_irqrestore(&dmadata->dma_lock, flags);
- return;
- }
- if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
- spin_unlock_irqrestore(&dmadata->dma_lock, flags);
- return;
- }
- while (dmadata->dmacount < NR_DMA_CHAIN) {
- dmadata->dmacount++;
- spin_unlock_irqrestore(&dmadata->dma_lock, flags);
- desc = txx9aclc_dma_submit(dmadata,
- dmadata->dma_addr +
- dmadata->frag_count * dmadata->frag_bytes);
- if (!desc)
- return;
- dma_async_issue_pending(chan);
-
- spin_lock_irqsave(&dmadata->dma_lock, flags);
- dmadata->frag_count++;
- dmadata->frag_count %= dmadata->frags;
- dmadata->pos += dmadata->frag_bytes;
- dmadata->pos %= dmadata->buffer_bytes;
- if ((dmadata->frag_count * dmadata->frag_bytes) %
- dmadata->period_bytes == 0)
- snd_pcm_period_elapsed(substream);
- }
- spin_unlock_irqrestore(&dmadata->dma_lock, flags);
-}
-
-static int txx9aclc_pcm_trigger(struct snd_soc_component *component,
- struct snd_pcm_substream *substream, int cmd)
-{
- struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
- struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
- void __iomem *base = drvdata->base;
- unsigned long flags;
- int ret = 0;
- u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
- ACCTL_AUDODMA : ACCTL_AUDIDMA;
-
- spin_lock_irqsave(&dmadata->dma_lock, flags);
- switch (cmd) {
- case SNDRV_PCM_TRIGGER_START:
- dmadata->frag_count = -1;
- queue_work(system_highpri_wq, &dmadata->work);
- break;
- case SNDRV_PCM_TRIGGER_STOP:
- case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- case SNDRV_PCM_TRIGGER_SUSPEND:
- __raw_writel(ctlbit, base + ACCTLDIS);
- break;
- case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- case SNDRV_PCM_TRIGGER_RESUME:
- __raw_writel(ctlbit, base + ACCTLEN);
- break;
- default:
- ret = -EINVAL;
- }
- spin_unlock_irqrestore(&dmadata->dma_lock, flags);
- return ret;
-}
-
-static snd_pcm_uframes_t
-txx9aclc_pcm_pointer(struct snd_soc_component *component,
- struct snd_pcm_substream *substream)
-{
- struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
-
- return bytes_to_frames(substream->runtime, dmadata->pos);
-}
-
-static int txx9aclc_pcm_open(struct snd_soc_component *component,
- struct snd_pcm_substream *substream)
-{
- struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
- struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
- int ret;
-
- ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
- if (ret)
- return ret;
- /* ensure that buffer size is a multiple of period size */
- ret = snd_pcm_hw_constraint_integer(substream->runtime,
- SNDRV_PCM_HW_PARAM_PERIODS);
- if (ret < 0)
- return ret;
- substream->runtime->private_data = dmadata;
- return 0;
-}
-
-static int txx9aclc_pcm_close(struct snd_soc_component *component,
- struct snd_pcm_substream *substream)
-{
- struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
- struct dma_chan *chan = dmadata->dma_chan;
-
- dmadata->frag_count = -1;
- dmaengine_terminate_all(chan);
- return 0;
-}
-
-static int txx9aclc_pcm_new(struct snd_soc_component *component,
- struct snd_soc_pcm_runtime *rtd)
-{
- struct snd_card *card = rtd->card->snd_card;
- struct snd_soc_dai *dai = asoc_rtd_to_cpu(rtd, 0);
- struct snd_pcm *pcm = rtd->pcm;
- struct platform_device *pdev = to_platform_device(component->dev);
- struct txx9aclc_soc_device *dev;
- struct resource *r;
- int i;
- int ret;
-
- /* at this point onwards the AC97 component has probed and this will be valid */
- dev = snd_soc_dai_get_drvdata(dai);
-
- dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
- dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
- for (i = 0; i < 2; i++) {
- r = platform_get_resource(pdev, IORESOURCE_DMA, i);
- if (!r) {
- ret = -EBUSY;
- goto exit;
- }
- dev->dmadata[i].dma_res = r;
- ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
- if (ret)
- goto exit;
- }
-
- snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
- card->dev, 64 * 1024, 4 * 1024 * 1024);
- return 0;
-
-exit:
- for (i = 0; i < 2; i++) {
- if (dev->dmadata[i].dma_chan)
- dma_release_channel(dev->dmadata[i].dma_chan);
- dev->dmadata[i].dma_chan = NULL;
- }
- return ret;
-}
-
-static bool filter(struct dma_chan *chan, void *param)
-{
- struct txx9aclc_dmadata *dmadata = param;
- char *devname;
- bool found = false;
-
- devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
- (int)dmadata->dma_res->start);
- if (strcmp(dev_name(chan->device->dev), devname) == 0) {
- chan->private = &dmadata->dma_slave;
- found = true;
- }
- kfree(devname);
- return found;
-}
-
-static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
- struct txx9aclc_dmadata *dmadata)
-{
- struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
- struct txx9dmac_slave *ds = &dmadata->dma_slave;
- dma_cap_mask_t mask;
-
- spin_lock_init(&dmadata->dma_lock);
-
- ds->reg_width = sizeof(u32);
- if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- ds->tx_reg = drvdata->physbase + ACAUDODAT;
- ds->rx_reg = 0;
- } else {
- ds->tx_reg = 0;
- ds->rx_reg = drvdata->physbase + ACAUDIDAT;
- }
-
- /* Try to grab a DMA channel */
- dma_cap_zero(mask);
- dma_cap_set(DMA_SLAVE, mask);
- dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
- if (!dmadata->dma_chan) {
- printk(KERN_ERR
- "DMA channel for %s is not available\n",
- dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
- "playback" : "capture");
- return -EBUSY;
- }
- INIT_WORK(&dmadata->work, txx9aclc_dma_work);
- return 0;
-}
-
-static int txx9aclc_pcm_probe(struct snd_soc_component *component)
-{
- snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
- return 0;
-}
-
-static void txx9aclc_pcm_remove(struct snd_soc_component *component)
-{
- struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
- struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
- void __iomem *base = drvdata->base;
- int i;
-
- /* disable all FIFO DMAs */
- __raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
- /* dummy R/W to clear pending DMAREQ if any */
- __raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
-
- for (i = 0; i < 2; i++) {
- struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
- struct dma_chan *chan = dmadata->dma_chan;
-
- if (chan) {
- dmadata->frag_count = -1;
- dmaengine_terminate_all(chan);
- dma_release_channel(chan);
- }
- dev->dmadata[i].dma_chan = NULL;
- }
-}
-
-static const struct snd_soc_component_driver txx9aclc_soc_component = {
- .name = DRV_NAME,
- .probe = txx9aclc_pcm_probe,
- .remove = txx9aclc_pcm_remove,
- .open = txx9aclc_pcm_open,
- .close = txx9aclc_pcm_close,
- .hw_params = txx9aclc_pcm_hw_params,
- .prepare = txx9aclc_pcm_prepare,
- .trigger = txx9aclc_pcm_trigger,
- .pointer = txx9aclc_pcm_pointer,
- .pcm_construct = txx9aclc_pcm_new,
-};
-
-static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
-{
- return devm_snd_soc_register_component(&pdev->dev,
- &txx9aclc_soc_component, NULL, 0);
-}
-
-static struct platform_driver txx9aclc_pcm_driver = {
- .driver = {
- .name = "txx9aclc-pcm-audio",
- },
-
- .probe = txx9aclc_soc_platform_probe,
-};
-
-module_platform_driver(txx9aclc_pcm_driver);
-
-MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
-MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
-MODULE_LICENSE("GPL");
diff --git a/sound/soc/txx9/txx9aclc.h b/sound/soc/txx9/txx9aclc.h
deleted file mode 100644
index 37c691ba56ed..000000000000
--- a/sound/soc/txx9/txx9aclc.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * TXx9 SoC AC Link Controller
- */
-
-#ifndef __TXX9ACLC_H
-#define __TXX9ACLC_H
-
-#include <linux/interrupt.h>
-#include <asm/txx9/dmac.h>
-
-#define ACCTLEN 0x00 /* control enable */
-#define ACCTLDIS 0x04 /* control disable */
-#define ACCTL_ENLINK 0x00000001 /* enable/disable AC-link */
-#define ACCTL_AUDODMA 0x00000100 /* AUDODMA enable/disable */
-#define ACCTL_AUDIDMA 0x00001000 /* AUDIDMA enable/disable */
-#define ACCTL_AUDOEHLT 0x00010000 /* AUDO error halt
- enable/disable */
-#define ACCTL_AUDIEHLT 0x00100000 /* AUDI error halt
- enable/disable */
-#define ACREGACC 0x08 /* codec register access */
-#define ACREGACC_DAT_SHIFT 0 /* data field */
-#define ACREGACC_REG_SHIFT 16 /* address field */
-#define ACREGACC_CODECID_SHIFT 24 /* CODEC ID field */
-#define ACREGACC_READ 0x80000000 /* CODEC read */
-#define ACREGACC_WRITE 0x00000000 /* CODEC write */
-#define ACINTSTS 0x10 /* interrupt status */
-#define ACINTMSTS 0x14 /* interrupt masked status */
-#define ACINTEN 0x18 /* interrupt enable */
-#define ACINTDIS 0x1c /* interrupt disable */
-#define ACINT_CODECRDY(n) (0x00000001 << (n)) /* CODECn ready */
-#define ACINT_REGACCRDY 0x00000010 /* ACREGACC ready */
-#define ACINT_AUDOERR 0x00000100 /* AUDO underrun error */
-#define ACINT_AUDIERR 0x00001000 /* AUDI overrun error */
-#define ACDMASTS 0x80 /* DMA request status */
-#define ACDMA_AUDO 0x00000001 /* AUDODMA pending */
-#define ACDMA_AUDI 0x00000010 /* AUDIDMA pending */
-#define ACAUDODAT 0xa0 /* audio out data */
-#define ACAUDIDAT 0xb0 /* audio in data */
-#define ACREVID 0xfc /* revision ID */
-
-struct txx9aclc_dmadata {
- struct resource *dma_res;
- struct txx9dmac_slave dma_slave;
- struct dma_chan *dma_chan;
- struct work_struct work;
- spinlock_t dma_lock;
- int stream; /* SNDRV_PCM_STREAM_PLAYBACK or SNDRV_PCM_STREAM_CAPTURE */
- struct snd_pcm_substream *substream;
- unsigned long pos;
- dma_addr_t dma_addr;
- unsigned long buffer_bytes;
- unsigned long period_bytes;
- unsigned long frag_bytes;
- int frags;
- int frag_count;
- int dmacount;
-};
-
-struct txx9aclc_plat_drvdata {
- void __iomem *base;
- u64 physbase;
-};
-
-static inline struct txx9aclc_plat_drvdata *txx9aclc_get_plat_drvdata(
- struct snd_soc_dai *dai)
-{
- return dev_get_drvdata(dai->dev);
-}
-
-#endif /* __TXX9ACLC_H */
--
2.29.2
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 06/10] mtd: Remove drivers used by TX49xx
2021-01-05 14:02 ` [PATCH 06/10] mtd: Remove drivers used by TX49xx Thomas Bogendoerfer
@ 2021-01-05 14:06 ` Miquel Raynal
0 siblings, 0 replies; 26+ messages in thread
From: Miquel Raynal @ 2021-01-05 14:06 UTC (permalink / raw)
To: Thomas Bogendoerfer
Cc: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Richard Weinberger, Vignesh Raghavendra,
Jakub Kicinski, Alessandro Zummo, Alexandre Belloni, Mark Brown,
Wim Van Sebroeck, Guenter Roeck, Liam Girdwood, Jaroslav Kysela,
Takashi Iwai, linux-mips, linux-kernel, linux-crypto, dmaengine,
linux-ide, linux-mtd, netdev, linux-rtc, linux-spi,
linux-watchdog, alsa-devel
Hi Thomas,
Thomas Bogendoerfer <tsbogend@alpha.franken.de> wrote on Tue, 5 Jan
2021 15:02:51 +0100:
> CPU support for TX49xx is getting removed, so remove MTD support for it.
>
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
If the removal happens, you may take this patch through the mips tree.
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
One less driver to convert to ->exec_op() :-)
> ---
> drivers/mtd/maps/Kconfig | 6 -
> drivers/mtd/maps/Makefile | 1 -
> drivers/mtd/maps/rbtx4939-flash.c | 133 -------
> drivers/mtd/nand/raw/Kconfig | 7 -
> drivers/mtd/nand/raw/Makefile | 1 -
> drivers/mtd/nand/raw/txx9ndfmc.c | 423 -----------------------
> include/linux/platform_data/txx9/ndfmc.h | 28 --
> 7 files changed, 599 deletions(-)
> delete mode 100644 drivers/mtd/maps/rbtx4939-flash.c
> delete mode 100644 drivers/mtd/nand/raw/txx9ndfmc.c
> delete mode 100644 include/linux/platform_data/txx9/ndfmc.h
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 01/10] MIPS: TX49xx: Drop support
2021-01-05 14:02 ` [PATCH 01/10] MIPS: TX49xx: Drop support Thomas Bogendoerfer
@ 2021-01-05 14:59 ` Guenter Roeck
0 siblings, 0 replies; 26+ messages in thread
From: Guenter Roeck @ 2021-01-05 14:59 UTC (permalink / raw)
To: Thomas Bogendoerfer, Matt Mackall, Herbert Xu, Dan Williams,
Vinod Koul, David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Liam Girdwood,
Jaroslav Kysela, Takashi Iwai, linux-mips, linux-kernel,
linux-crypto, dmaengine, linux-ide, linux-mtd, netdev, linux-rtc,
linux-spi, linux-watchdog, alsa-devel
On 1/5/21 6:02 AM, Thomas Bogendoerfer wrote:
> Looks like there are no boards with TX49xx CPUS other than reference
> boards available. So it's time to drop Linux support for it.
>
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> ---
> drivers/watchdog/Kconfig | 2 +-
Acked-by: Guenter Roeck <linux@roeck-us.net>
Guenter
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: (subset) [PATCH 00/10] Remove support for TX49xx
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (9 preceding siblings ...)
2021-01-05 14:02 ` [PATCH 10/10] ASoC: txx9: " Thomas Bogendoerfer
@ 2021-01-05 16:08 ` Mark Brown
2021-01-06 8:37 ` Geert Uytterhoeven
` (2 subsequent siblings)
13 siblings, 0 replies; 26+ messages in thread
From: Mark Brown @ 2021-01-05 16:08 UTC (permalink / raw)
To: linux-rtc, Matt Mackall, linux-mtd, linux-crypto, netdev,
alsa-devel, dmaengine, Guenter Roeck, Wim Van Sebroeck,
Miquel Raynal, Richard Weinberger, Dan Williams, David S. Miller,
linux-mips, Takashi Iwai, Alessandro Zummo, Jaroslav Kysela,
Vignesh Raghavendra, Jakub Kicinski, linux-watchdog, Herbert Xu,
Alexandre Belloni, linux-kernel, linux-ide, Thomas Bogendoerfer,
Vinod Koul, Liam Girdwood, linux-spi
On Tue, 5 Jan 2021 15:02:45 +0100, Thomas Bogendoerfer wrote:
> I couldn't find any buyable product other than reference boards using
> TX49xx CPUs. And since nobody showed interest in keeping support for
> it, it's time to remove it.
>
> I've split up the removal into seperate parts for different maintainers.
> So if the patch fits your needs, please take it via your tree or
> give me an ack so I can apply them the mips-next tree.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
Thanks!
[04/10] spi: txx9: Remove driver
commit: 74523a5dae0c96d6503fe72da66ee37fd23eb8f5
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 05/10] dma: tx49 removal
2021-01-05 14:02 ` [PATCH 05/10] dma: tx49 removal Thomas Bogendoerfer
@ 2021-01-06 6:18 ` Vinod Koul
2021-01-06 19:10 ` Joe Perches
1 sibling, 0 replies; 26+ messages in thread
From: Vinod Koul @ 2021-01-06 6:18 UTC (permalink / raw)
To: Thomas Bogendoerfer
Cc: Matt Mackall, Herbert Xu, Dan Williams, David S. Miller,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
Jakub Kicinski, Alessandro Zummo, Alexandre Belloni, Mark Brown,
Wim Van Sebroeck, Guenter Roeck, Liam Girdwood, Jaroslav Kysela,
Takashi Iwai, linux-mips, linux-kernel, linux-crypto, dmaengine,
linux-ide, linux-mtd, netdev, linux-rtc, linux-spi,
linux-watchdog, alsa-devel
On 05-01-21, 15:02, Thomas Bogendoerfer wrote:
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Applied after fixing subsystem name, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 00/10] Remove support for TX49xx
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (10 preceding siblings ...)
2021-01-05 16:08 ` (subset) [PATCH 00/10] Remove support for TX49xx Mark Brown
@ 2021-01-06 8:37 ` Geert Uytterhoeven
2021-01-06 16:03 ` Atsushi Nemoto
2021-01-06 18:48 ` Thomas Bogendoerfer
2021-01-06 14:58 ` (subset) " Mark Brown
2021-01-12 23:33 ` Alexandre Belloni
13 siblings, 2 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2021-01-06 8:37 UTC (permalink / raw)
To: Thomas Bogendoerfer
Cc: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
open list:BROADCOM NVRAM DRIVER, Linux Kernel Mailing List,
Linux Crypto Mailing List, dmaengine, linux-ide, MTD Maling List,
netdev, linux-rtc, linux-spi, Linux Watchdog Mailing List,
ALSA Development Mailing List, Atsushi Nemoto
Hi Thomas,
CC Nemoto-san (de-facto TX49XX maintainer)
On Tue, Jan 5, 2021 at 3:03 PM Thomas Bogendoerfer
<tsbogend@alpha.franken.de> wrote:
> I couldn't find any buyable product other than reference boards using
> TX49xx CPUs. And since nobody showed interest in keeping support for
> it, it's time to remove it.
I have an RBTX4927 development board in my board farm, boot-test every
bi-weekly renesas-drivers release on it, and fix kernel issues when they
appear.
Is that sufficient to keep it?
TX49xx SoCs were used in Sony LocationFree base stations, running
VxWorks. You can no longer buy them.
I'm not aware of anyone ever porting Linux to them.
https://en.wikipedia.org/wiki/LocationFree_Player
> spi: txx9: Remove driver
I only noticed the planned removal when I saw the SPI patch was applied.
Doesn't matter for me, as SPI is only present on TX4938, not on TX4927 ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: (subset) [PATCH 00/10] Remove support for TX49xx
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (11 preceding siblings ...)
2021-01-06 8:37 ` Geert Uytterhoeven
@ 2021-01-06 14:58 ` Mark Brown
2021-01-12 23:33 ` Alexandre Belloni
13 siblings, 0 replies; 26+ messages in thread
From: Mark Brown @ 2021-01-06 14:58 UTC (permalink / raw)
To: Takashi Iwai, linux-kernel, linux-mtd, Guenter Roeck,
Dan Williams, Wim Van Sebroeck, linux-rtc, Thomas Bogendoerfer,
linux-spi, linux-ide, Jaroslav Kysela, linux-crypto,
linux-watchdog, Richard Weinberger, dmaengine, Liam Girdwood,
Alexandre Belloni, Jakub Kicinski, Herbert Xu, netdev,
Miquel Raynal, Matt Mackall, alsa-devel, linux-mips,
Vignesh Raghavendra, Vinod Koul, David S. Miller,
Alessandro Zummo
On Tue, 5 Jan 2021 15:02:45 +0100, Thomas Bogendoerfer wrote:
> I couldn't find any buyable product other than reference boards using
> TX49xx CPUs. And since nobody showed interest in keeping support for
> it, it's time to remove it.
>
> I've split up the removal into seperate parts for different maintainers.
> So if the patch fits your needs, please take it via your tree or
> give me an ack so I can apply them the mips-next tree.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[10/10] ASoC: txx9: Remove driver
commit: a8644292ea46064f990e4a3c4585bdb294c0d89a
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 00/10] Remove support for TX49xx
2021-01-06 8:37 ` Geert Uytterhoeven
@ 2021-01-06 16:03 ` Atsushi Nemoto
2021-01-06 18:48 ` Thomas Bogendoerfer
1 sibling, 0 replies; 26+ messages in thread
From: Atsushi Nemoto @ 2021-01-06 16:03 UTC (permalink / raw)
To: geert
Cc: tsbogend, mpm, herbert, dan.j.williams, vkoul, davem,
miquel.raynal, richard, vigneshr, kuba, a.zummo,
alexandre.belloni, broonie, wim, linux, lgirdwood, perex, tiwai,
linux-mips, linux-kernel, linux-crypto, dmaengine, linux-ide,
linux-mtd, netdev, linux-rtc, linux-spi, linux-watchdog,
alsa-devel
Hi Geert!
On Wed, 6 Jan 2021 09:37:11 +0100, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> Hi Thomas,
>
> CC Nemoto-san (de-facto TX49XX maintainer)
>
> On Tue, Jan 5, 2021 at 3:03 PM Thomas Bogendoerfer
> <tsbogend@alpha.franken.de> wrote:
>> I couldn't find any buyable product other than reference boards using
>> TX49xx CPUs. And since nobody showed interest in keeping support for
>> it, it's time to remove it.
>
> I have an RBTX4927 development board in my board farm, boot-test every
> bi-weekly renesas-drivers release on it, and fix kernel issues when they
> appear.
>
> Is that sufficient to keep it?
It have been about 10 years since last time I see any TX49 board :-)
AFAIK Geert is the last user of TX49 SoC.
I'm OK with whole TX49xx (and TX39xx) removal if Geert (or any other
users) agreed.
---
Atsushi Nemoto
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 00/10] Remove support for TX49xx
2021-01-06 8:37 ` Geert Uytterhoeven
2021-01-06 16:03 ` Atsushi Nemoto
@ 2021-01-06 18:48 ` Thomas Bogendoerfer
2021-01-06 20:41 ` Geert Uytterhoeven
1 sibling, 1 reply; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-06 18:48 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
open list:BROADCOM NVRAM DRIVER, Linux Kernel Mailing List,
Linux Crypto Mailing List, dmaengine, linux-ide, MTD Maling List,
netdev, linux-rtc, linux-spi, Linux Watchdog Mailing List,
ALSA Development Mailing List, Atsushi Nemoto
On Wed, Jan 06, 2021 at 09:37:11AM +0100, Geert Uytterhoeven wrote:
> Hi Thomas,
>
> CC Nemoto-san (de-facto TX49XX maintainer)
>
> On Tue, Jan 5, 2021 at 3:03 PM Thomas Bogendoerfer
> <tsbogend@alpha.franken.de> wrote:
> > I couldn't find any buyable product other than reference boards using
> > TX49xx CPUs. And since nobody showed interest in keeping support for
> > it, it's time to remove it.
>
> I have an RBTX4927 development board in my board farm, boot-test every
> bi-weekly renesas-drivers release on it, and fix kernel issues when they
> appear.
>
> Is that sufficient to keep it?
for me it is. But now we probaly need some reverts then...
I wonder whether you have seen my mail about the removal
https://lore.kernel.org/linux-mips/20201207105627.GA15866@alpha.franken.de
and my call for people owning MIPS machines
https://lore.kernel.org/linux-mips/20200227144910.GA25011@alpha.franken.de/
Still "unclaimed" machines are
IMG Pistachio SoC based boards (MACH_PISTACHIO(
Toshiba TX39 series based machines (MACH_TX39XX)
NEC VR4100 series based machines (MACH_VR41XX)
Netlogic XLR/XLS based systems (NLM_XLR_BOARD)
Netlogic XLP based systems (NLM_XLP_BOARD)
Sibyte BCM91120C-CRhine (SIBYTE_CRHINE)
Sibyte BCM91120x-Carmel (SIBYTE_CARMEL)
Sibyte BCM91125C-CRhone (SIBYTE_CRHONE)
Sibyte BCM91125E-Rhone (SIBYTE_RHONE)
Sibyte BCM91250C2-LittleSur (SIBYTE_LITTLESUR)
Sibyte BCM91250E-Sentosa (SIBYTE_SENTOSA)
Is there something on this list you also regulary use ?
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 05/10] dma: tx49 removal
2021-01-05 14:02 ` [PATCH 05/10] dma: tx49 removal Thomas Bogendoerfer
2021-01-06 6:18 ` Vinod Koul
@ 2021-01-06 19:10 ` Joe Perches
2021-01-07 16:40 ` Thomas Bogendoerfer
1 sibling, 1 reply; 26+ messages in thread
From: Joe Perches @ 2021-01-06 19:10 UTC (permalink / raw)
To: Thomas Bogendoerfer, Matt Mackall, Herbert Xu, Dan Williams,
Vinod Koul, David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
On Tue, 2021-01-05 at 15:02 +0100, Thomas Bogendoerfer wrote:
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
[]
> diff --git a/drivers/dma/txx9dmac.h b/drivers/dma/txx9dmac.h
[]
> @@ -26,11 +26,6 @@
> * DMA channel.
> */
>
>
> -#ifdef CONFIG_MACH_TX49XX
> -static inline bool txx9_dma_have_SMPCHN(void)
> -{
> - return true;
> -}
> #define TXX9_DMA_USE_SIMPLE_CHAIN
> #else
> static inline bool txx9_dma_have_SMPCHN(void)
This doesn't look like it compiles as there's now an #else
without an #if
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 00/10] Remove support for TX49xx
2021-01-06 18:48 ` Thomas Bogendoerfer
@ 2021-01-06 20:41 ` Geert Uytterhoeven
2021-01-07 1:17 ` Atsushi Nemoto
0 siblings, 1 reply; 26+ messages in thread
From: Geert Uytterhoeven @ 2021-01-06 20:41 UTC (permalink / raw)
To: Thomas Bogendoerfer
Cc: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
open list:BROADCOM NVRAM DRIVER, Linux Kernel Mailing List,
Linux Crypto Mailing List, dmaengine, linux-ide, MTD Maling List,
netdev, linux-rtc, linux-spi, Linux Watchdog Mailing List,
ALSA Development Mailing List, Atsushi Nemoto
Hi Thomas,
On Wed, Jan 6, 2021 at 7:49 PM Thomas Bogendoerfer
<tsbogend@alpha.franken.de> wrote:
> On Wed, Jan 06, 2021 at 09:37:11AM +0100, Geert Uytterhoeven wrote:
> > On Tue, Jan 5, 2021 at 3:03 PM Thomas Bogendoerfer
> > <tsbogend@alpha.franken.de> wrote:
> > > I couldn't find any buyable product other than reference boards using
> > > TX49xx CPUs. And since nobody showed interest in keeping support for
> > > it, it's time to remove it.
> >
> > I have an RBTX4927 development board in my board farm, boot-test every
> > bi-weekly renesas-drivers release on it, and fix kernel issues when they
> > appear.
> >
> > Is that sufficient to keep it?
>
> for me it is. But now we probaly need some reverts then...
Indeed. Fortunately not all of it, as some removals were TX4938-only.
> I wonder whether you have seen my mail about the removal
>
> https://lore.kernel.org/linux-mips/20201207105627.GA15866@alpha.franken.de
>
> and my call for people owning MIPS machines
>
> https://lore.kernel.org/linux-mips/20200227144910.GA25011@alpha.franken.de/
Sorry, I'm not following the linux-mips list that closely, so I hadn't
seen them. It's always a good idea to CC linux-kernel, and perhaps the
few people who last touched the affected files.
> Still "unclaimed" machines are
>
> IMG Pistachio SoC based boards (MACH_PISTACHIO(
> Toshiba TX39 series based machines (MACH_TX39XX)
> NEC VR4100 series based machines (MACH_VR41XX)
> Netlogic XLR/XLS based systems (NLM_XLR_BOARD)
> Netlogic XLP based systems (NLM_XLP_BOARD)
> Sibyte BCM91120C-CRhine (SIBYTE_CRHINE)
> Sibyte BCM91120x-Carmel (SIBYTE_CARMEL)
> Sibyte BCM91125C-CRhone (SIBYTE_CRHONE)
> Sibyte BCM91125E-Rhone (SIBYTE_RHONE)
> Sibyte BCM91250C2-LittleSur (SIBYTE_LITTLESUR)
> Sibyte BCM91250E-Sentosa (SIBYTE_SENTOSA)
>
> Is there something on this list you also regulary use ?
No, I don't have anything from the list above.
The RBTX4927 is basically my last MIPS-based system I do boot
current kernels on.
In active use, not for development:
- Ubiquiti EdgeRouter-X (Ralink-based).
Stored in my attic:
- NetGear WNDR4300 (AtherOS-based),
- MikroTik Routerboard 150 (ADMtek-based, no (longer?) supported upstream),
- NEC DDB VRC-5476 (upstream support removed 15 years ago ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 00/10] Remove support for TX49xx
2021-01-06 20:41 ` Geert Uytterhoeven
@ 2021-01-07 1:17 ` Atsushi Nemoto
2021-01-07 8:04 ` Geert Uytterhoeven
0 siblings, 1 reply; 26+ messages in thread
From: Atsushi Nemoto @ 2021-01-07 1:17 UTC (permalink / raw)
To: geert
Cc: tsbogend, mpm, herbert, dan.j.williams, vkoul, davem,
miquel.raynal, richard, vigneshr, kuba, a.zummo,
alexandre.belloni, broonie, wim, linux, lgirdwood, perex, tiwai,
linux-mips, linux-kernel, linux-crypto, dmaengine, linux-ide,
linux-mtd, netdev, linux-rtc, linux-spi, linux-watchdog,
alsa-devel
On Wed, 6 Jan 2021 21:41:24 +0100, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>> > Is that sufficient to keep it?
>>
>> for me it is. But now we probaly need some reverts then...
>
> Indeed. Fortunately not all of it, as some removals were TX4938-only.
These patches should not break RBTX4927:
net: tc35815: Drop support for TX49XX boards
spi: txx9: Remove driver
mtd: Remove drivers used by TX49xx
char: hw_random: Remove tx4939 driver
rtc: tx4939: Remove driver
ide: tx4938ide: Remove driver
And these patches just break audio-support only.
dma: tx49 removal
ASoC: txx9: Remove driver
I think dma and ASoC drivers are hard to maintain now, and can be
dropped for basic support for RBTX4927.
(TX39 boards does not have audio-support, so dma txx9 driver can be
dropped too)
---
Atsushi Nemoto
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 00/10] Remove support for TX49xx
2021-01-07 1:17 ` Atsushi Nemoto
@ 2021-01-07 8:04 ` Geert Uytterhoeven
0 siblings, 0 replies; 26+ messages in thread
From: Geert Uytterhoeven @ 2021-01-07 8:04 UTC (permalink / raw)
To: Atsushi Nemoto
Cc: Alexandre Belloni, R, Vignesh, Liam Girdwood,
ALSA Development Mailing List, Takashi Iwai, linux-ide,
MTD Maling List, Miquel Raynal, linux-spi, linux-rtc,
Wim Van Sebroeck, Herbert Xu, Richard Weinberger, Jakub Kicinski,
Guenter Roeck, Linux Watchdog Mailing List, Mark Brown,
Matt Mackall, Dan Williams, Jaroslav Kysela, Alessandro Zummo,
Thomas Bogendoerfer, netdev, open list:BROADCOM NVRAM DRIVER,
Linux Kernel Mailing List, Vinod, Linux Crypto Mailing List,
dmaengine, David S. Miller
Hi Nemoto-san,
On Thu, Jan 7, 2021 at 2:18 AM Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:
> On Wed, 6 Jan 2021 21:41:24 +0100, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> >> > Is that sufficient to keep it?
> >>
> >> for me it is. But now we probaly need some reverts then...
> >
> > Indeed. Fortunately not all of it, as some removals were TX4938-only.
>
> These patches should not break RBTX4927:
>
> net: tc35815: Drop support for TX49XX boards
> spi: txx9: Remove driver
> mtd: Remove drivers used by TX49xx
> char: hw_random: Remove tx4939 driver
> rtc: tx4939: Remove driver
> ide: tx4938ide: Remove driver
Indeed.
> And these patches just break audio-support only.
>
> dma: tx49 removal
> ASoC: txx9: Remove driver
>
> I think dma and ASoC drivers are hard to maintain now, and can be
> dropped for basic support for RBTX4927.
> (TX39 boards does not have audio-support, so dma txx9 driver can be
> dropped too)
Agreed, I don't test audio anyway, but I know it used to work (I had
intended to use the board as an MPD media server, but never got beyond
the prototyping phase).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 05/10] dma: tx49 removal
2021-01-06 19:10 ` Joe Perches
@ 2021-01-07 16:40 ` Thomas Bogendoerfer
2021-01-08 8:27 ` Vinod Koul
0 siblings, 1 reply; 26+ messages in thread
From: Thomas Bogendoerfer @ 2021-01-07 16:40 UTC (permalink / raw)
To: Joe Perches
Cc: Matt Mackall, Herbert Xu, Dan Williams, Vinod Koul,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
On Wed, Jan 06, 2021 at 11:10:38AM -0800, Joe Perches wrote:
> On Tue, 2021-01-05 at 15:02 +0100, Thomas Bogendoerfer wrote:
> > Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> []
> > diff --git a/drivers/dma/txx9dmac.h b/drivers/dma/txx9dmac.h
> []
> > @@ -26,11 +26,6 @@
> > * DMA channel.
> > */
> >
> >
> > -#ifdef CONFIG_MACH_TX49XX
> > -static inline bool txx9_dma_have_SMPCHN(void)
> > -{
> > - return true;
> > -}
> > #define TXX9_DMA_USE_SIMPLE_CHAIN
> > #else
> > static inline bool txx9_dma_have_SMPCHN(void)
>
> This doesn't look like it compiles as there's now an #else
> without an #if
you are right, no idea what I had in mind while doing that.
Vinod,
as this patch series found a still active user of the platform,
could you drop the patch from your tree, or do you want a revert
from me ?
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 05/10] dma: tx49 removal
2021-01-07 16:40 ` Thomas Bogendoerfer
@ 2021-01-08 8:27 ` Vinod Koul
0 siblings, 0 replies; 26+ messages in thread
From: Vinod Koul @ 2021-01-08 8:27 UTC (permalink / raw)
To: Thomas Bogendoerfer
Cc: Joe Perches, Matt Mackall, Herbert Xu, Dan Williams,
David S. Miller, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Jakub Kicinski, Alessandro Zummo,
Alexandre Belloni, Mark Brown, Wim Van Sebroeck, Guenter Roeck,
Liam Girdwood, Jaroslav Kysela, Takashi Iwai, linux-mips,
linux-kernel, linux-crypto, dmaengine, linux-ide, linux-mtd,
netdev, linux-rtc, linux-spi, linux-watchdog, alsa-devel
On 07-01-21, 17:40, Thomas Bogendoerfer wrote:
> On Wed, Jan 06, 2021 at 11:10:38AM -0800, Joe Perches wrote:
> > On Tue, 2021-01-05 at 15:02 +0100, Thomas Bogendoerfer wrote:
> > > Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> > []
> > > diff --git a/drivers/dma/txx9dmac.h b/drivers/dma/txx9dmac.h
> > []
> > > @@ -26,11 +26,6 @@
> > > * DMA channel.
> > > */
> > >
> > >
> > > -#ifdef CONFIG_MACH_TX49XX
> > > -static inline bool txx9_dma_have_SMPCHN(void)
> > > -{
> > > - return true;
> > > -}
> > > #define TXX9_DMA_USE_SIMPLE_CHAIN
> > > #else
> > > static inline bool txx9_dma_have_SMPCHN(void)
> >
> > This doesn't look like it compiles as there's now an #else
> > without an #if
>
> you are right, no idea what I had in mind while doing that.
>
> Vinod,
>
> as this patch series found a still active user of the platform,
> could you drop the patch from your tree, or do you want a revert
> from me ?
Dropped now
--
~Vinod
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: (subset) [PATCH 00/10] Remove support for TX49xx
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
` (12 preceding siblings ...)
2021-01-06 14:58 ` (subset) " Mark Brown
@ 2021-01-12 23:33 ` Alexandre Belloni
13 siblings, 0 replies; 26+ messages in thread
From: Alexandre Belloni @ 2021-01-12 23:33 UTC (permalink / raw)
To: Jaroslav Kysela, Matt Mackall, linux-mtd, netdev, Herbert Xu,
Vinod Koul, dmaengine, Dan Williams, Richard Weinberger,
Alessandro Zummo, David S. Miller, Mark Brown, Jakub Kicinski,
Miquel Raynal, Takashi Iwai, Liam Girdwood, Guenter Roeck,
linux-crypto, Vignesh Raghavendra, linux-kernel, linux-rtc,
Thomas Bogendoerfer, linux-mips, linux-watchdog, alsa-devel,
Wim Van Sebroeck, linux-ide, linux-spi
Cc: Alexandre Belloni
On Tue, 5 Jan 2021 15:02:45 +0100, Thomas Bogendoerfer wrote:
> I couldn't find any buyable product other than reference boards using
> TX49xx CPUs. And since nobody showed interest in keeping support for
> it, it's time to remove it.
>
> I've split up the removal into seperate parts for different maintainers.
> So if the patch fits your needs, please take it via your tree or
> give me an ack so I can apply them the mips-next tree.
>
> [...]
Applied, thanks!
[08/10] rtc: tx4939: Remove driver
commit: 446667df283002fdda0530523347ffd1cf053373
Best regards,
--
Alexandre Belloni <alexandre.belloni@bootlin.com>
^ permalink raw reply [flat|nested] 26+ messages in thread
end of thread, other threads:[~2021-01-12 23:35 UTC | newest]
Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-05 14:02 [PATCH 00/10] Remove support for TX49xx Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 01/10] MIPS: TX49xx: Drop support Thomas Bogendoerfer
2021-01-05 14:59 ` Guenter Roeck
2021-01-05 14:02 ` [PATCH 02/10] net: tc35815: Drop support for TX49XX boards Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 03/10] net: 8390: " Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 04/10] spi: txx9: Remove driver Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 05/10] dma: tx49 removal Thomas Bogendoerfer
2021-01-06 6:18 ` Vinod Koul
2021-01-06 19:10 ` Joe Perches
2021-01-07 16:40 ` Thomas Bogendoerfer
2021-01-08 8:27 ` Vinod Koul
2021-01-05 14:02 ` [PATCH 06/10] mtd: Remove drivers used by TX49xx Thomas Bogendoerfer
2021-01-05 14:06 ` Miquel Raynal
2021-01-05 14:02 ` [PATCH 07/10] char: hw_random: Remove tx4939 driver Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 08/10] rtc: tx4939: Remove driver Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 09/10] ide: tx4938ide: " Thomas Bogendoerfer
2021-01-05 14:02 ` [PATCH 10/10] ASoC: txx9: " Thomas Bogendoerfer
2021-01-05 16:08 ` (subset) [PATCH 00/10] Remove support for TX49xx Mark Brown
2021-01-06 8:37 ` Geert Uytterhoeven
2021-01-06 16:03 ` Atsushi Nemoto
2021-01-06 18:48 ` Thomas Bogendoerfer
2021-01-06 20:41 ` Geert Uytterhoeven
2021-01-07 1:17 ` Atsushi Nemoto
2021-01-07 8:04 ` Geert Uytterhoeven
2021-01-06 14:58 ` (subset) " Mark Brown
2021-01-12 23:33 ` Alexandre Belloni
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