[PATCH 1/4] arm64: dts: fsl: ls1028a: Add qDMA node

[PATCH 1/4] arm64: dts: fsl: ls1028a: Add qDMA node

[Peng Ma]

Add the qDMA device tree nodes for LS1028A devices

Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 2896bbc..8116fb3 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -336,6 +336,26 @@
 				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		qdma: dma-controller@8380000 {
+			compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
+			reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+			      <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+			      <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "qdma-error", "qdma-queue0",
+				"qdma-queue1", "qdma-queue2", "qdma-queue3";
+			dma-channels = <8>;
+			block-number = <1>;
+			block-offset = <0x10000>;
+			fsl,dma-queues = <2>;
+			status-sizes = <64>;
+			queue-sizes = <64 64>;
+		};
+
 		pcie@1f0000000 { /* Integrated Endpoint Root Complex */
 			compatible = "pci-host-ecam-generic";
 			reg = <0x01 0xf0000000 0x0 0x100000>;
-- 
1.7.1

[PATCH 2/4] arm64: dts: fsl: ls1028a: Add eDMA node

[Peng Ma]

Add the eDMA device tree nodes for LS1028A devices

Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 8116fb3..71b87cb 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -235,6 +235,21 @@
 			status = "disabled";
 		};
 
+		edma0: edma@22c0000 {
+			#dma-cells = <2>;
+			compatible = "fsl,vf610-edma";
+			reg = <0x0 0x22c0000 0x0 0x10000>,
+			      <0x0 0x22d0000 0x0 0x10000>,
+			      <0x0 0x22e0000 0x0 0x10000>;
+			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "edma-tx", "edma-err";
+			dma-channels = <32>;
+			clock-names = "dmamux0", "dmamux1";
+			clocks = <&clockgen 4 1>,
+				 <&clockgen 4 1>;
+		};
+
 		gpio1: gpio@2300000 {
 			compatible = "fsl,qoriq-gpio";
 			reg = <0x0 0x2300000 0x0 0x10000>;
-- 
1.7.1

[PATCH 3/4] dmaengine: fsl-edma: support little endian for edma driver

[Peng Ma]

improve edma driver to support little endian.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
 drivers/dma/fsl-edma-common.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index 680b2a0..6bf238e 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -83,9 +83,14 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
 	u32 ch = fsl_chan->vchan.chan.chan_id;
 	void __iomem *muxaddr;
 	unsigned int chans_per_mux, ch_off;
+	int endian_diff[4] = {3, 1, -1, -3};
 
 	chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR;
 	ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
+
+	if (!fsl_chan->edma->big_endian)
+		ch_off += endian_diff[ch_off % 4];
+
 	muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
 	slot = EDMAMUX_CHCFG_SOURCE(slot);
 
-- 
1.7.1

[PATCH 4/4] dt-bindings: fsl-qdma: Add LS1028A qDMA bindings

[Peng Ma]

Add LS1028A qDMA controller bindings to fsl-qdma bindings.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
 Documentation/devicetree/bindings/dma/fsl-qdma.txt |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
index 6a0ff90..da371c4 100644
--- a/Documentation/devicetree/bindings/dma/fsl-qdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
@@ -7,6 +7,7 @@ Required properties:
 
 - compatible:		Must be one of
 			 "fsl,ls1021a-qdma": for LS1021A Board
+			 "fsl,ls1028a-qdma": for LS1028A Board
 			 "fsl,ls1043a-qdma": for ls1043A Board
 			 "fsl,ls1046a-qdma": for ls1046A Board
 - reg:			Should contain the register's base address and length.
-- 
1.7.1

Re: [PATCH 3/4] dmaengine: fsl-edma: support little endian for edma driver

[Vinod Koul]

On 06-05-19, 09:03, Peng Ma wrote:
> improve edma driver to support little endian.

Can you explain a bit more how adding the below lines adds little endian
support...

> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> ---
>  drivers/dma/fsl-edma-common.c |    5 +++++
>  1 files changed, 5 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
> index 680b2a0..6bf238e 100644
> --- a/drivers/dma/fsl-edma-common.c
> +++ b/drivers/dma/fsl-edma-common.c
> @@ -83,9 +83,14 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
>  	u32 ch = fsl_chan->vchan.chan.chan_id;
>  	void __iomem *muxaddr;
>  	unsigned int chans_per_mux, ch_off;
> +	int endian_diff[4] = {3, 1, -1, -3};
>  
>  	chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR;
>  	ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
> +
> +	if (!fsl_chan->edma->big_endian)
> +		ch_off += endian_diff[ch_off % 4];
> +
>  	muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
>  	slot = EDMAMUX_CHCFG_SOURCE(slot);
>  
> -- 
> 1.7.1

-- 
~Vinod

RE: [EXT] Re: [PATCH 3/4] dmaengine: fsl-edma: support little endian for edma driver

[Peng Ma]

Hi Vinod,

Thank for you reply.
the registers (CHCFG0 - CHCFG15) on big endian socs as fallows:
CHCFG0		0x0
CHCFG1		0x1
CHCFG2		0x2
CHCFG3		0x3
......
CHCFG12		0xC
CHCFG13		0xD
CHCFG14		0xE
CHCFG15		0xF

On little endian socs as fallows:
CHCFG3		0x0
CHCFG2		0x1
CHCFG1		0x2
CHCFG0		0x3
......
CHCFG15		0xC
CHCFG14		0xD
CHCFG13		0xE
CHCFG12		0xF

To fit this map we should add this patch.

Best Regards,
Peng
>-----Original Message-----
>From: Vinod Koul <vkoul@kernel.org>
>Sent: 2019年5月21日 12:38
>To: Peng Ma <peng.ma@nxp.com>
>Cc: robh+dt@kernel.org; shawnguo@kernel.org; mark.rutland@arm.com; Leo
>Li <leoyang.li@nxp.com>; dan.j.williams@intel.com;
>dmaengine@vger.kernel.org; devicetree@vger.kernel.org;
>linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
>Subject: [EXT] Re: [PATCH 3/4] dmaengine: fsl-edma: support little endian for
>edma driver
>
>Caution: EXT Email
>
>On 06-05-19, 09:03, Peng Ma wrote:
>> improve edma driver to support little endian.
>
>Can you explain a bit more how adding the below lines adds little endian
>support...
>
>>
>> Signed-off-by: Peng Ma <peng.ma@nxp.com>
>> ---
>>  drivers/dma/fsl-edma-common.c |    5 +++++
>>  1 files changed, 5 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/dma/fsl-edma-common.c
>> b/drivers/dma/fsl-edma-common.c index 680b2a0..6bf238e 100644
>> --- a/drivers/dma/fsl-edma-common.c
>> +++ b/drivers/dma/fsl-edma-common.c
>> @@ -83,9 +83,14 @@ void fsl_edma_chan_mux(struct fsl_edma_chan
>*fsl_chan,
>>       u32 ch = fsl_chan->vchan.chan.chan_id;
>>       void __iomem *muxaddr;
>>       unsigned int chans_per_mux, ch_off;
>> +     int endian_diff[4] = {3, 1, -1, -3};
>>
>>       chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR;
>>       ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
>> +
>> +     if (!fsl_chan->edma->big_endian)
>> +             ch_off += endian_diff[ch_off % 4];
>> +
>>       muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
>>       slot = EDMAMUX_CHCFG_SOURCE(slot);
>>
>> --
>> 1.7.1
>
>--
>~Vinod

Re: [PATCH 4/4] dt-bindings: fsl-qdma: Add LS1028A qDMA bindings

[Rob Herring]

On Mon,  6 May 2019 09:03:44 +0000, Peng Ma wrote:
> Add LS1028A qDMA controller bindings to fsl-qdma bindings.
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> ---
>  Documentation/devicetree/bindings/dma/fsl-qdma.txt |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH 1/4] arm64: dts: fsl: ls1028a: Add qDMA node

[Shawn Guo]

On Mon, May 06, 2019 at 09:03:41AM +0000, Peng Ma wrote:
> Add the qDMA device tree nodes for LS1028A devices
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>

Applied, thanks.

Re: [PATCH 4/4] dt-bindings: fsl-qdma: Add LS1028A qDMA bindings

[Shawn Guo]

On Mon, May 06, 2019 at 09:03:44AM +0000, Peng Ma wrote:
> Add LS1028A qDMA controller bindings to fsl-qdma bindings.
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>

Applied, thanks.

Re: [PATCH 2/4] arm64: dts: fsl: ls1028a: Add eDMA node

[Shawn Guo]

On Mon, May 06, 2019 at 09:03:42AM +0000, Peng Ma wrote:
> Add the eDMA device tree nodes for LS1028A devices
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |   15 +++++++++++++++
>  1 files changed, 15 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 8116fb3..71b87cb 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -235,6 +235,21 @@
>  			status = "disabled";
>  		};
>  
> +		edma0: edma@22c0000 {
> +			#dma-cells = <2>;
> +			compatible = "fsl,vf610-edma";
> +			reg = <0x0 0x22c0000 0x0 0x10000>,
> +			      <0x0 0x22d0000 0x0 0x10000>,
> +			      <0x0 0x22e0000 0x0 0x10000>;
> +			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "edma-tx", "edma-err";
> +			dma-channels = <32>;
> +			clock-names = "dmamux0", "dmamux1";
> +			clocks = <&clockgen 4 1>,
> +				 <&clockgen 4 1>;
> +		};
> +

The edma@22c0000 node had already been added by commit below:

  f54f7be5c5ac ("arm64: dts: ls1028a: Add Audio DT nodes")

Shawn

>  		gpio1: gpio@2300000 {
>  			compatible = "fsl,qoriq-gpio";
>  			reg = <0x0 0x2300000 0x0 0x10000>;
> -- 
> 1.7.1
> 

RE: [EXT] Re: [PATCH 2/4] arm64: dts: fsl: ls1028a: Add eDMA node

[Peng Ma]

>-----Original Message-----
>From: Shawn Guo <shawnguo@kernel.org>
>Sent: 2019年6月18日 21:13
>To: Peng Ma <peng.ma@nxp.com>
>Cc: vkoul@kernel.org; robh+dt@kernel.org; mark.rutland@arm.com; Leo Li
><leoyang.li@nxp.com>; dan.j.williams@intel.com; dmaengine@vger.kernel.org;
>devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
>linux-arm-kernel@lists.infradead.org
>Subject: [EXT] Re: [PATCH 2/4] arm64: dts: fsl: ls1028a: Add eDMA node
>
>Caution: EXT Email
>
>On Mon, May 06, 2019 at 09:03:42AM +0000, Peng Ma wrote:
>> Add the eDMA device tree nodes for LS1028A devices
>>
>> Signed-off-by: Peng Ma <peng.ma@nxp.com>
>> ---
>>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |   15 +++++++++++++++
>>  1 files changed, 15 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>> index 8116fb3..71b87cb 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>> @@ -235,6 +235,21 @@
>>                       status = "disabled";
>>               };
>>
>> +             edma0: edma@22c0000 {
>> +                     #dma-cells = <2>;
>> +                     compatible = "fsl,vf610-edma";
>> +                     reg = <0x0 0x22c0000 0x0 0x10000>,
>> +                           <0x0 0x22d0000 0x0 0x10000>,
>> +                           <0x0 0x22e0000 0x0 0x10000>;
>> +                     interrupts = <GIC_SPI 56
>IRQ_TYPE_LEVEL_HIGH>,
>> +                                  <GIC_SPI 56
>IRQ_TYPE_LEVEL_HIGH>;
>> +                     interrupt-names = "edma-tx", "edma-err";
>> +                     dma-channels = <32>;
>> +                     clock-names = "dmamux0", "dmamux1";
>> +                     clocks = <&clockgen 4 1>,
>> +                              <&clockgen 4 1>;
>> +             };
>> +
>
>The edma@22c0000 node had already been added by commit below:
>
>  f54f7be5c5ac ("arm64: dts: ls1028a: Add Audio DT nodes")
>
[Peng Ma] OK, got it, thanks.

Best Regards,
Peng
>Shawn
>
>>               gpio1: gpio@2300000 {
>>                       compatible = "fsl,qoriq-gpio";
>>                       reg = <0x0 0x2300000 0x0 0x10000>;
>> --
>> 1.7.1
>>