From: Michael Matz <matz@suse.de>
To: Borislav Petkov <bp@alien8.de>
Cc: David Laight <David.Laight@ACULAB.COM>,
'Dave Jiang' <dave.jiang@intel.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"jing.lin@intel.com" <jing.lin@intel.com>,
"ashok.raj@intel.com" <ashok.raj@intel.com>,
"sanjay.k.kumar@intel.com" <sanjay.k.kumar@intel.com>,
"fenghua.yu@intel.com" <fenghua.yu@intel.com>,
"kevin.tian@intel.com" <kevin.tian@intel.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 1/5] x86/asm: Carve out a generic movdir64b() helper for general usage
Date: Thu, 24 Sep 2020 14:07:25 +0000 (UTC) [thread overview]
Message-ID: <alpine.LSU.2.20.2009241356020.20802@wotan.suse.de> (raw)
In-Reply-To: <20200924101506.GD5030@zn.tnic>
Hello,
even though we hashed it out downthread, let me make some additional
remarks:
On Thu, 24 Sep 2020, Borislav Petkov wrote:
> > /* MOVDIR64B [rdx], rax */
This comment is confusing as it uses Intel syntax for the operand forms,
but AT&T order (dest last).
> volatile struct { char _[64]; } *__dst = dst;
>
> ...
>
> : "=m" (__dst)
This and the other occurences in this thread up to now always miss that
the 'm' constraints want the object itself, not the address of the object.
So you want '"m" (*__src)', same for dst, and so on.
> Micha, the instruction is:
>
> MOVDIR64B %(rdx), rax
>
> "Move 64-bytes as direct-store with guaranteed 64-byte write atomicity
> from the source memory operand address to destination memory address
> specified as offset to ES segment in the register operand."
It's unfortunate that the introduction of this mnemonic into binutils
did it wrong already, but what the instruction should really read like in
AT&T mode is:
movdir64b (%rdx), (%rax)
or even
movdir64b (%rdx), es:(%rax)
because both are memory operands really (even though the destination can
only be encoded with a direct register, as these are the constraints of
x86 insn encodings). It's comparable to movs, which, also having two
memory operands is written:
movsb %ds:(%rsi),%es:(%rdi)
Ciao,
Michael.
next prev parent reply other threads:[~2020-09-24 14:07 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <160090233730.44288.4446779116422752486.stgit@djiang5-desk3.ch.intel.com>
2020-09-23 23:10 ` [PATCH v5 3/5] dmaengine: idxd: Add shared workqueue support Dave Jiang
2020-09-23 23:11 ` [PATCH v5 4/5] dmaengine: idxd: Clean up descriptors with fault error Dave Jiang
2020-09-23 23:11 ` [PATCH v5 5/5] dmaengine: idxd: Add ABI documentation for shared wq Dave Jiang
[not found] ` <160090264332.44288.7575027054245105525.stgit@djiang5-desk3.ch.intel.com>
2020-09-24 8:24 ` [PATCH v5 1/5] x86/asm: Carve out a generic movdir64b() helper for general usage David Laight
2020-09-24 10:15 ` Borislav Petkov
2020-09-24 10:42 ` David Laight
2020-09-24 11:02 ` Borislav Petkov
2020-09-24 11:25 ` David Laight
2020-09-24 14:07 ` Michael Matz [this message]
2020-09-24 13:07 ` Borislav Petkov
2020-09-24 13:27 ` David Laight
2020-09-24 15:07 ` Dave Jiang
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