From: Stefan Wahren <wahrenst@gmx.net> To: Lukas Wunner <lukas@wunner.de> Cc: Mark Brown <broonie@kernel.org>, Vinod Koul <vkoul@kernel.org>, linux-spi@vger.kernel.org, dmaengine@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Eric Anholt <eric@anholt.net>, Nuno Sa <nuno.sa@analog.com>, Martin Sperl <kernel@martin.sperl.org>, Noralf Tronnes <noralf@tronnes.org>, Robert Jarzmik <robert.jarzmik@free.fr>, Florian Kauer <florian.kauer@koalo.de>, Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com> Subject: Re: [PATCH 05/10] spi: bcm2835: Work around DONE bit erratum Date: Mon, 19 Aug 2019 21:20:22 +0200 Message-ID: <b09eae55-04c9-0e22-23d0-4dbc8490ed2f@gmx.net> (raw) In-Reply-To: <20190811195709.u5gkllkfxutufvt7@wunner.de> Am 11.08.19 um 21:57 schrieb Lukas Wunner: > On Sun, Aug 11, 2019 at 09:45:09PM +0200, Stefan Wahren wrote: >> Am 03.08.19 um 12:10 schrieb Lukas Wunner: >>> Commit 3bd7f6589f67 ("spi: bcm2835: Overcome sglist entry length >>> limitation") amended the BCM2835 SPI driver with support for DMA >>> transfers whose buffers are not aligned to 4 bytes and require more than >>> one sglist entry. >>> >>> When testing this feature with upcoming commits to speed up TX-only and >>> RX-only transfers, I noticed that SPI transmission sometimes breaks. >>> A function introduced by the commit, bcm2835_spi_transfer_prologue(), >>> performs one or two PIO transmissions as a prologue to the actual DMA >>> transmission. It turns out that the breakage goes away if the DONE bit >>> in the CS register is set when ending such a PIO transmission. >>> >>> The DONE bit signifies emptiness of the TX FIFO. According to the spec, >>> the bit is of type RO, so writing it should never have any effect. >>> Perhaps the spec is wrong and the bit is actually of type RW1C. >>> E.g. the I2C controller on the BCM2835 does have an RW1C DONE bit which >>> needs to be cleared by the driver. Another, possibly more likely >>> explanation is that it's a hardware erratum since the issue does not >>> occur consistently. >>> >>> Either way, amend bcm2835_spi_transfer_prologue() to always write the >>> DONE bit. >>> >>> Usually a transmission is ended by bcm2835_spi_reset_hw(). If the >>> transmission was successful, the TX FIFO is empty and thus the DONE bit >>> is set when bcm2835_spi_reset_hw() reads the CS register. The bit is >>> then written back to the register, so we happen to do the right thing. >>> >>> However if DONE is not set, e.g. because transmission is aborted with >>> a non-empty TX FIFO, the bit won't be written by bcm2835_spi_reset_hw() >>> and it seems possible that transmission might subsequently break. To be >>> on the safe side, likewise amend bcm2835_spi_reset_hw() to always write >>> the bit. >> has the issue already reported to Raspberry Pi Trading? > You mean to fix such errata in future revisions? I thought about document this issue in some kind of errata or on their website. > > I wouldn't know who to report this to, Roger Thornton or James Adams perhaps? > > I'm not sure if the SPI controller isn't just an IP block licensed from > a third party, that might make it difficult to get errata fixed. > > Thanks, > > Lukas
next prev parent reply index Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-03 10:10 [PATCH 00/10] Raspberry Pi SPI speedups Lukas Wunner 2019-08-03 10:10 ` [PATCH 01/10] dmaengine: bcm2835: Allow reusable descriptors Lukas Wunner 2019-08-08 12:30 ` Vinod Koul 2019-08-03 10:10 ` [PATCH 04/10] spi: bcm2835: Drop dma_pending flag Lukas Wunner 2019-08-03 10:10 ` [PATCH 05/10] spi: bcm2835: Work around DONE bit erratum Lukas Wunner 2019-08-11 19:45 ` Stefan Wahren 2019-08-11 19:57 ` Lukas Wunner 2019-08-11 20:29 ` Eric Anholt 2019-08-19 19:20 ` Stefan Wahren [this message] 2019-08-03 10:10 ` [PATCH 09/10] dmaengine: bcm2835: Avoid accessing memory when copying zeroes Lukas Wunner 2019-08-08 12:31 ` Vinod Koul 2019-08-03 10:10 ` [PATCH 07/10] spi: bcm2835: Speed up TX-only DMA transfers by clearing RX FIFO Lukas Wunner 2019-08-03 10:10 ` [PATCH 06/10] spi: bcm2835: Cache CS register value for ->prepare_message() Lukas Wunner 2019-08-03 10:10 ` [PATCH 02/10] dmaengine: bcm2835: Allow cyclic transactions without interrupt Lukas Wunner 2019-08-08 12:30 ` Vinod Koul 2019-08-03 10:10 ` [PATCH 08/10] dmaengine: bcm2835: Document struct bcm2835_dmadev Lukas Wunner 2019-08-08 12:31 ` Vinod Koul 2019-08-03 10:10 ` [PATCH 10/10] spi: bcm2835: Speed up RX-only DMA transfers by zero-filling TX FIFO Lukas Wunner 2019-08-03 10:10 ` [PATCH 03/10] spi: Guarantee cacheline alignment of driver-private data Lukas Wunner 2019-09-10 11:29 ` Mark Brown 2019-08-03 16:01 ` [PATCH 00/10] Raspberry Pi SPI speedups Noralf Trønnes 2019-08-11 19:50 ` Stefan Wahren 2019-08-11 19:52 ` Lukas Wunner 2019-08-19 19:22 ` Stefan Wahren 2019-08-21 15:21 ` kernel 2019-08-24 10:33 ` Lukas Wunner 2019-09-07 9:06 ` Lukas Wunner 2019-09-09 16:56 ` Mark Brown 2019-09-10 11:21 ` Mark Brown
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